KR20000026250A - Method and apparatus for operating finite field - Google Patents

Method and apparatus for operating finite field Download PDF

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Publication number
KR20000026250A
KR20000026250A KR1019980043710A KR19980043710A KR20000026250A KR 20000026250 A KR20000026250 A KR 20000026250A KR 1019980043710 A KR1019980043710 A KR 1019980043710A KR 19980043710 A KR19980043710 A KR 19980043710A KR 20000026250 A KR20000026250 A KR 20000026250A
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KR
South Korea
Prior art keywords
vector
register
finite field
multiplication
stores
Prior art date
Application number
KR1019980043710A
Other languages
Korean (ko)
Other versions
KR100322739B1 (en
Inventor
Chang Hee Lee
Ki Ho Kim
Jong In Yim
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Samsung Electronics Co Ltd
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Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Priority to KR1019980043710A priority Critical patent/KR100322739B1/en
Publication of KR20000026250A publication Critical patent/KR20000026250A/en
Application granted granted Critical
Publication of KR100322739B1 publication Critical patent/KR100322739B1/en

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
    • G06F7/724—Finite field arithmetic
    • G06F7/726—Inversion; Reciprocal calculation; Division of elements of a finite field

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • General Engineering & Computer Science (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Correction Of Errors (AREA)

Abstract

PURPOSE: An apparatus for operating a finite field is provided to have a simple configuration using a shift register and an inner multiplication logic circuit by providing such a specific dual base that when a normal base is used, a finite field multiplication is constructed in a permutation of a bit unit of a simple type. CONSTITUTION: In an apparatus for calculating a first vector(B), a second vector(C) and a third vector(D) sequentially, a first register(10) stores the first vector(B), and rotates the first vector toward an upper bit by a clock input. A second register(12) receives the second vector(C) in the reverse direction of a bit order that the first vector(B) is stored to the first register, and stores the received vector(C). An inner multiplication module(15) is composed of (m+1) AND gates and an exclusive-AND gate, and calculates an inner multiplication of values stored in the first register and the second register by the clock, respectively.
KR1019980043710A 1998-10-19 1998-10-19 Finite Field Computation Method and Its Apparatus KR100322739B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019980043710A KR100322739B1 (en) 1998-10-19 1998-10-19 Finite Field Computation Method and Its Apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019980043710A KR100322739B1 (en) 1998-10-19 1998-10-19 Finite Field Computation Method and Its Apparatus

Publications (2)

Publication Number Publication Date
KR20000026250A true KR20000026250A (en) 2000-05-15
KR100322739B1 KR100322739B1 (en) 2002-06-22

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ID=19554533

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019980043710A KR100322739B1 (en) 1998-10-19 1998-10-19 Finite Field Computation Method and Its Apparatus

Country Status (1)

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KR (1) KR100322739B1 (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20020086005A (en) * 2001-05-10 2002-11-18 학교법인 정석학원 Inverse operator for elliptic curve cryptosystems
KR100416291B1 (en) * 2001-06-08 2004-01-31 이광엽 Apparatus and method of finite-field inversion and multiplication based on elliptic curve cryptography
KR100486726B1 (en) * 2002-11-09 2005-05-03 삼성전자주식회사 Method and Apparatus for basis conversion in a finite field
KR100586598B1 (en) * 1999-12-18 2006-06-02 주식회사 케이티 Modular Arithmetic Apparatus and Method for Finite Field
KR100859185B1 (en) * 2006-05-18 2008-09-18 학교법인 영광학원 Multiplier Over ??2m using Gaussian Normal Basis
US7539719B2 (en) 2003-10-16 2009-05-26 Samsung Electronics Co., Ltd. Method and apparatus for performing multiplication in finite field GF(2n)
KR100950581B1 (en) * 2007-12-06 2010-04-01 고려대학교 산학협력단 Bit-parallel multiplier and multiplying method for finite field using redundant representation
KR100976229B1 (en) * 2009-02-13 2010-08-17 고려대학교 산학협력단 Low space bit-parellel polynomial multipier and method thereof
KR100976232B1 (en) * 2009-02-13 2010-08-17 고려대학교 산학협력단 Fast bit-parellel polynomial multipier and method thereof
KR101030514B1 (en) * 2009-04-03 2011-04-26 대구대학교 산학협력단 Efficient optimal normal basis multipliers over composite

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8683296B2 (en) 2011-12-30 2014-03-25 Streamscale, Inc. Accelerated erasure coding system and method
US8914706B2 (en) 2011-12-30 2014-12-16 Streamscale, Inc. Using parity data for concurrent data authentication, correction, compression, and encryption

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100586598B1 (en) * 1999-12-18 2006-06-02 주식회사 케이티 Modular Arithmetic Apparatus and Method for Finite Field
KR20020086005A (en) * 2001-05-10 2002-11-18 학교법인 정석학원 Inverse operator for elliptic curve cryptosystems
KR100416291B1 (en) * 2001-06-08 2004-01-31 이광엽 Apparatus and method of finite-field inversion and multiplication based on elliptic curve cryptography
KR100486726B1 (en) * 2002-11-09 2005-05-03 삼성전자주식회사 Method and Apparatus for basis conversion in a finite field
US7346641B2 (en) 2002-11-09 2008-03-18 Samsung Electronics Co., Ltd. Method and apparatus for basis conversion in finite field
US7539719B2 (en) 2003-10-16 2009-05-26 Samsung Electronics Co., Ltd. Method and apparatus for performing multiplication in finite field GF(2n)
KR100859185B1 (en) * 2006-05-18 2008-09-18 학교법인 영광학원 Multiplier Over ??2m using Gaussian Normal Basis
KR100950581B1 (en) * 2007-12-06 2010-04-01 고려대학교 산학협력단 Bit-parallel multiplier and multiplying method for finite field using redundant representation
KR100976229B1 (en) * 2009-02-13 2010-08-17 고려대학교 산학협력단 Low space bit-parellel polynomial multipier and method thereof
KR100976232B1 (en) * 2009-02-13 2010-08-17 고려대학교 산학협력단 Fast bit-parellel polynomial multipier and method thereof
KR101030514B1 (en) * 2009-04-03 2011-04-26 대구대학교 산학협력단 Efficient optimal normal basis multipliers over composite

Also Published As

Publication number Publication date
KR100322739B1 (en) 2002-06-22

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