KR20000015257A - Method for revising a synchronization which an error is occurred - Google Patents

Abstract

PURPOSE: A method for revising a synchronous with an error is occurred, which detects an error of a synchronous data and revises the detected error by a decoder of an optical disk reproducer. CONSTITUTION: The method for revising a synchronous with an error is occurred comprises the steps of: (S01-S11) detecting a pseudo synchronous data among inputted data series by a certain unit; (S12) identifying a content of data detected in the detection steps (S01-S11); and (S22) revising the detected pseudo synchronous data to a normal synchronous data according to the identified content, wherein the pseudo synchronous data is verified as to whether a synchronous pattern is existed. Thereby, it is possible to quickly reset a reference synchronous data for decoding according to data having an adjacent synchronous pattern.

Description

Fault correction method

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to error detection and correction of synchronization data by a decoder of an optical disc player, and more particularly, to a synchronization pattern among data input bit by bit in a decoder of an optical disc player. The present invention relates to an error-prone synchronization correction method that detects data and corrects previously detected data to normal synchronization data when data having a synchronization pattern is redetected at an interval of 1 error correction (ECC) block following the detected data. .

The decoder of the optical disc player receives 8-bit (1 byte) symbol data in units of 1ECC block (2352 bytes) output after the EFM demodulation and ECC decoding processes from the digital signal processing unit (DSP). The 1ECC block data is composed of 12 bytes of synchronization data, 4 bytes of header data, and 2336 bytes of information data as shown in FIG. 1A. The decoder ECC decodes the data of the ECC block unit configured as described above. And de-scramble the data to correct the error.

However, in the conventional data error correction method, since 12-byte synchronization data of the 1ECC block data to be input is not included in the error correction range, when an error occurs in synchronization data, 2340 bytes of data (4-byte header) Data + 2336 bytes of information data) cannot be reproduced normally.

Therefore, in order to solve this problem, when 12 bytes of sync data are not completely identical to normal sync data (00FFFFFFFFFFFFFFFFFFFF00) due to an error, but partially identical (for example, 00FFxxxxxxxxxxxxxxxxFF00, that is, when both ends are the same) This is determined as pseudo synchronization data, and the pseudo synchronization data is included in the category of data having a synchronization pattern similar to the normal synchronization data, and the decoder controls a control pulse that is enabled every 2352 bytes (Fig. 2). According to ①), it is checked whether the first 12 bytes of data input in units of 1ECC block have a sync pattern, and even if error sync data is pseudo sync data with a sync pattern, it is judged as asynchronous data. The error-prone part (A in FIG. 1B) among the pseudo synchronous data corresponds to normal synchronous data (A in FIG. 1A). A method of performing decoding of an optical disc player using the corrected sync data by correction with FF has also been proposed.

However, since the synchronous data detection (2 in FIG. 2) is performed by the control pulse (1 in FIG. 2) which is enabled every 2352 bytes corresponding to one ECC block in the proposed method as described above, Likewise, if the data of the synchronization pattern input due to an error is out of the control pulse generation time point (T in FIG. 2), the detection of the synchronization data itself is impossible, and the data of the subsequent synchronization pattern is continuously connected to the control pulse generation time point. If it is shifted to (although the interval of subsequent synchronization data is normally input in units of 2352 bytes as shown in ③ of Fig. 2), the problem of delayed decoding of subsequent data still remains since the synchronization data is not detected thereafter. It became.

Accordingly, the present invention has been made to solve the above problems, and in the decoder of the optical disc player, the pseudo synchronization data detected from the data input in units of bits is subsequently input by the header data and the data of the synchronization pattern. It is an object of the present invention to provide an error-prone synchronous correction method for correcting pseudo synchronous data to normal synchronous data after being surely verified with pseudo synchronous data.

1A shows a data string output from a digital signal processor,

FIG. 1B illustrates an example of synchronous data having errors in the data string of FIG.

2 shows examples of normal synchronization data and examples of abnormal synchronization data.

3 shows a configuration of an optical disc player,

4 illustrates a detailed configuration of a synchronization signal error detection and correction unit in the decoder of FIG.

5 is a flowchart of an error-prone synchronization correction method according to the present invention.

※ Explanation of code for main part of drawing

10: motor drive unit 10b: rotational speed detection unit

20: spindle motor 30: optical pickup

40: slad motor 50: R / F section

60: digital signal processing unit (DSP) 70: phase synchronization unit (PLL)

80 decoder 81 sync detector

82: buffer 83: synchronization correction unit

90: servo unit 100: MICOM

In order to achieve the above object, an error-prone synchronization correction method according to the present invention includes: a first step of detecting pseudo synchronization data among data strings of a predetermined unit; A second step of confirming contents of data consecutive to the detected data sequence; And a third step of correcting the detected pseudosynchronization data to normal synchronization data according to the identified contents.

In the error-prone synchronization correction method according to the present invention as described above, a pseudo-synchronization data identical to a predetermined normal synchronization data is detected among data streams of a predetermined unit input first, and continuously input to the detected pseudo-synchronous data. After checking the contents of the data and verifying the detected pseudo-synchronous data according to the checked contents, the error occurrence part of the pseudo-synchronous data is corrected to normal synchronous data.

Hereinafter, an embodiment of an error-prone synchronization correction method according to the present invention will be described in detail with reference to the accompanying drawings.

As shown in Fig. 3, the optical disk reproducing apparatus includes a spindle motor 20 for rotating the mounted optical disk; An optical pickup 30 for condensing the light on the signal recording surface of the rotating optical disk, and then reading the recorded digital signal by detecting the light reflected by the pit and converting the light into an electrical signal; A sled motor 40 for moving the optical pickup 30 in a radial direction of the optical disk; A motor driver 10 for driving both motors 20 and 40; A servo unit 90 for controlling rotation of the optical pickup 30 and the optical disk by a focus error (F.E.) and tracking error (T.E.) signals output from the optical pickup (30); An R / F unit 50 for filtering the analog high frequency signal read out by the optical pickup 30; A phase-locked-loop (70) for synchronizing a reproduction synchronization clock applied from the outside according to the phase of the analog signal output from the R / F unit (50); A digital signal processor (DSP) which performs an EFM demodulation and an ECC decoding process by digitally converting an analog signal output from the R / F unit 50 based on the reproducing synchronization clock synchronously output from the phase synchronization unit 70. Digital Signal Processor (60); Detects the synchronization signal of the data output from the digital signal processor 60, descrambles the data according to the detected synchronization signal, restores the original data, and restores the ECC of the restored data. A decoder 80 which finally performs data error correction by performing decoding; And a microcomputer (MICOM) 100 for controlling the servo unit 90 and the phase synchronizing unit 70 according to the detected rotation speed information and controlling the data reproduction process.

Also, as shown in FIG. 4, the synchronization signal error detection and correction unit in the decoder 80 compares the data output from the digital signal processing unit 60 with the synchronization pattern every time the clock is input in units of bits from the outside. A synchronization detector 81 outputting a control signal informing of the data corresponding to the synchronization pattern to the outside as a result of the comparison; A buffer 82 for temporarily storing data output from the synchronization detector 81; According to the control signal applied from the sync detector 81, the data of the sync pattern input from the buffer 82 is error-corrected according to the normal sync data in case of an error generated pseudo sync data, and the normal sync data is separately It includes a synchronization correction unit 83 that outputs as it is without error correction.

Hereinafter, with reference to the configuration of Figures 3 and 4, Figure 5 which is the flow of the error-prone synchronization correction method according to the present invention will be described in detail.

The high frequency signal read out from the optical disc CD is filtered through the R / F unit 50 (S01), and the filtered RF signal is subjected to the phase synchronization signal applied from the phase synchronizer 70. The digital signal processor 60 converts and outputs 8-bit digital data through an EFM demodulation process and inputs the same to the decoder 80 (S02).

The data input to the decoder 80 first passes through the sync detector 81, and the sync detector 81 determines whether the input data 12 bytes are equal to a preset sync pattern of 12 bytes in bit units. (S03). That is, the synchronization detecting unit 81 checks whether the first two byte value of the input data is "00FF" and the last two byte value is "FF00". If the number of 1s is counted for each bit in 8-byte data that is the remaining interval (region A of FIG. 1A) except for the above, and the number of bits having the count result 1 is included in the predetermined range (56 to 63), as described above. The data obtained through the procedure is determined as pseudo synchronous data, and the pseudo synchronous data is included in the category of data having a synchronization pattern together with the normal synchronous data.

When the pseudo synchronization data having the synchronization pattern is detected as described above (S10 and S11), the synchronization detection unit 81 has a preset header of 4 bytes of data continuously input to the detected 12 bytes of the pseudo synchronization data. It is checked whether the pattern is the same (S12). In the header pattern, as shown in Table 1, not only each byte provides independent information, but also the data value of each byte is also set to the BCD value.

1 byte 2 bytes 3 bytes 4 bytes Data value 0 to 74 0 to 59 0 to 74 0 to 2 Data information Minite Second Block Mode

When the 4-byte data is confirmed to be a header pattern corresponding to each data value designated as shown in Table 1, the sync detection unit 81 verifies that the previously detected 12-byte data is true pseudo-synchronous data. It is made (S22).

12 bytes of pseudo-synchronized data and 4 bytes of header data, which have undergone the above-described verification and verification, are temporarily stored in the buffer 82 (S23), and the synchronization detector 81 has a unit of bits that are subsequently input to the temporarily stored data. The data is repeatedly detected by the same process as described above with respect to the data (S24 to S28).

At this time, the synchronization detecting unit 81 is a data generated by the pseudo-synchronous data previously detected and temporarily stored in the buffer 82 by the clock generated from the inside of the decoder 80, and the data having the newly detected synchronization pattern. When the separation distance is calculated (S29), and the calculation result corresponds to 2352 bytes (as in ③ in Fig. 2) (S30), the synchronization correction unit 83 is input from the synchronization detection unit 81 By a control signal, a correction operation is performed such that the pseudo-synchronous data read out from the buffer 82 coincides with normal synchronization data (i.e., 1 is imposed on all bits in part A (3 to 10 bytes) in FIG. 1B). After output to the outside (S41).

On the other hand, when it is confirmed that the input data is completely consistent with the preset normal synchronization data (when the number of 1 counted from each bit in 8-byte data is 64) (S11), The normal synchronization data is stored in the buffer 82 without the header pattern checking process subsequently input to the synchronization pattern data (S23), and thereafter, without passing a separate correction operation while passing through the synchronization correction unit 83 from the buffer 82. This will be output as is.

Thereafter, the synchronous data output from the synchronous correcting unit 83 through the above-described process is forcibly set as the reference synchronous data of the decoder 80 in the optical disc player (S42).

Further, if the separation distance between the data of the sync pattern stored in the buffer 82 and the data having the currently detected sync pattern is greater than 2352 bytes or less than 2352 bytes (as in ④ in Fig. 2) ( In operation S30, the synchronization detector 81 updates and stores the data of the currently detected synchronization pattern in the buffer 82 instead of the data stored in the buffer 82 (S35). The previous operation is repeated until the separation distance between the data having the sync pattern subsequently input to the data of the sync pattern is 2352 bytes (S24 to S30).

In the error correction method according to the present invention made as described above, even if the synchronous data is partially damaged, it is recognized as pseudo synchronous data within a limited range and included in the data having the synchronous pattern together with the normal synchronous data, in bit units. When the separation distance between the data having the detected synchronization pattern and the subsequent synchronization pattern data is confirmed to be 2352 bytes, the error-prone pseudosynchronization data is corrected to normal synchronization data to decode the information data by the corrected normal synchronization data. By performing the process of verifying whether the pseudo-synchronized data detected in bit units have a synchronization pattern, the possibility of mistaken for asynchronous data as the synchronization data is excluded, and decoding by the data having the closest synchronization pattern after an error occurs. Can be quickly reset It is a very useful invention.

Claims (1)

A first step of detecting pseudo synchronous data among data strings of a predetermined unit inputted; A second step of confirming contents of data consecutive to the detected data sequence; And And a third step of correcting the detected pseudosynchronization data to normal synchronization data according to the identified contents.