JPH087497A - Reproducing device - Google Patents

Abstract

PURPOSE:To reduce an invalid data area by performing no error correction detection only in a part in which an abnormal state occurs at a reproducing time. CONSTITUTION:A reproduction decoding circuit 33 is provided with a jitter correcting RAM. Then, when a rotational speed of a disk 1 is changed rapidly due to disturbance, the fact is detected by detecting a difference between the write address and the read address of the jitter correcting RAM. The detection output is supplied to a system controller 20. Then, from the decision, it is decided whether or not a data position where a C1 system is error correction processed is the occurrence position of the abnormal state. When the fact that it is the occurrence position of the abnormal state is decided by the decision result, the data are outputted according to a pointer based on the result of the error correction detection and the error correction process using parity calculation of a C2 system. Thus, a continuous error is limited to 5-10 frames in an inevitable C1 error area, and the data are extracted rapidly and stably.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a reproducing apparatus suitable for application to, for example, a reproducing apparatus for a disc on which digital audio data is recorded.

[0002]

2. Description of the Related Art For example, when an audio signal is digitized and recorded / reproduced, it is error-correction coded and recorded, and at the time of reproduction, this error-correction code is used to correct a correctable error. . As the error correction code, CIRC (Cross Interleave-Reed-Solomon code) is excellent in that it has a strong correction capability with a small circuit scale, and therefore, such as a compact disc.
It is often used (see, for example, JP-A-1-170222).

[0003]

However, in a reproducing apparatus for a disc in which an audio signal is recorded by using CIRC as an error correction code, a jitter correction RAM overflows due to a disturbance caused by physical vibration during reproduction. When an abnormal condition such as an underflow, underflow, or track jump occurs, a large interleave error occurs in the reproduced signal at the joint portion before and after the abnormal condition occurs.

This will be described below by taking CIRC as an example in the case of a compact disc. Figure 5
Shows a recording / reproducing process especially for CIRC of a recording / reproducing signal system for a compact disc. The two-stage Reed-Solomon code used for CIRC is called C1 and C2, and at the time of recording, digital audio data has 24 bytes (symbols) as one unit in parallel and scramble circuit. 1, the data is rearranged, and then the data is supplied to the C2 encoder 2. With this C2 encoder 2, GF
(28,24,5) Reed-Solomon code C of (2 ⁸ ).
2 is generated, and a 4-byte (symbol) -length parity Q is added. Therefore, 28 from the C2 encoder 2
Data for bytes (symbols) is obtained and supplied to the interleave circuit 3 to be subjected to interleave (data rearrangement) processing in which the maximum interleave length reaches 108 frames (32 bytes for one frame).

Next, in the C1 encoder 4, the GF
(2 ⁸ ) (32,28,5) Reed-Solomon code C
1 is generated, and a parity P having a 4-byte (symbol) length is added. Thus, from the C1 encoder 4, 32
Data in units of bytes (symbols) (this is called one frame) is obtained and supplied to the recording modulation circuit 5,
After adding a synchronization signal and EFM modulation, the data is converted into serial data and recorded on the disk 6.

The data read from the disk 6 by the optical head is binarized by the RF amplifier 7 and supplied to the reproduction / demodulation circuit 8. The reproduction demodulation circuit 8 performs EFM demodulation or the like, converts the parallel data into one frame (32 bytes), and supplies the parallel data to the error correction decoding unit 10.

Further, the reproduction demodulation circuit 8 is provided with a jitter correction RAM having a capacity of, for example, about 8 frames in order to correct a time axis error (jitter) included in the reproduction signal. Then, the reproduced data is R synchronized with the clock (including the same jitter as the reproduced data) synchronized with the reproduced data.
The reproduction data written in the AM is written in the RA.
From M, the read data without jitter is read by the reference clock (not including jitter).

This jitter correction has a jitter margin (± 4 frames in this case) according to the capacity of the RAM, and if the jitter is within the range of the jitter margin, it can be removed by the above correction operation. . However, during reproduction, if the rotational speed of the disk changes abruptly due to disturbance, the reproduction data will increase or decrease rapidly, making it impossible to catch up with the jitter margin, and the jitter correction RAM overflows. Or underflow occurs, which causes discontinuity in the reproduced data before and after that.

The error correction decoding unit 10 is functionally composed of a C1 decoder 11 and a de-interleave processing unit 1.
2, a C2 decoder 13 and a descramble processing unit 14 are included.

The Reed-Solomon code C1 is capable of detecting and correcting a 2-byte (symbol) error, and corrects the error that can be corrected by the C1 decoder 11. After this C1 decoder 11, the data rearranged at the time of recording is rearranged by de-interleaving. After that, the C2 decoder 13 uses the result of the error correction decoding processing by C1 to perform the error correction decoding processing by the Reed-Solomon code C2. After this C2 decoder 13, in the descramble processing unit 14,
The original audio data is rearranged in order to obtain the digital audio data output.

In the reproducing system shown in FIG.
The digitized output data has each byte (symbol) (m · n)
When expressed by (m is a frame number and n is a byte unit within the frame), it is a signal that repeats in 32 bytes (symbol) = 1 frame unit as shown in FIG. 6A.

Then, in the error correction decoding unit 10,
Practically, in memory, as shown in FIG. 6B,
The data is rearranged in byte units, and error detection and correction processing is performed using the two systems C1 and C2.

The sequence of C1 is the data of the output signal of the RF amplifier 7 for each frame, and the 3 in a row in the vertical direction of FIG. 6B.
2 bytes, for example (1.1), (1.2), (1.3)
……, (1 ・ n), ……, (1.31), (1.32)
4 bytes (1.29), (1
* 30), (1.31), and (1.32) are the parity P. As described above, this C1 enables 2-byte error detection and correction.

As shown in the diagonal direction of FIG. 6B, the sequence of C2 is one byte in every four frames of the data that has been captured in the past (parity P of the data of one frame is P). Excluded), eg FIG. 6B
As shown in (−103.1), (−99.2),
(-95.3), ..., (-107 + 4n.n), ...
, 28 bytes including (1.28) are actually used as audio data.
The remaining 4 bytes are the parity Q used for error detection and correction. This C2 also detects and corrects 2 bytes, and if the error pointer of the result of C1 is used, erasure correction (erasure correction) of up to 4 bytes is possible.

7 and 8 are flowcharts showing an example of a conventional error detection / correction processing routine using the C1 and C2.

First, a parity calculation is performed for C1 series data of 32 bytes in one frame obtained from the RF amplifier 21 (step 101), and it is determined whether or not there is an error in the C1 series data (step 10).
2). Immediately if there are no errors, step 103
Then, the pointer for each of the 28 data bytes (index indicating whether or not the byte is in error) is "O".
K ", that is, a code that is not an error is written.

When an error is detected in step 102, the process proceeds to step 104, and it is determined whether or not the number of errors in the C1 series is less than or equal to the correctable number of errors.
If the number of correctable errors, that is, the number of errors of 2 bytes or less, proceeds from step 104 to step 105,
After correcting the error, the process proceeds to step 103 and 28
Store "OK" in all pointers of this byte.

When it is determined in step 104 that the number of detected errors is 3 or more and the error cannot be corrected, the process proceeds to step 106, and all pointers of 28 bytes are "NG", that is, an error occurs. Write a code that indicates that there is.

After step 103 or step 106, the process proceeds to step 107 in FIG. 4, where the parity of the C2 sequence is calculated using the past data, and step 10
At 8, it is determined whether or not there is an error in this C2 sequence.

If there is no error in the sequence of C2,
Immediately, the process proceeds to step 109, and "O" is set as a pointer for each of the 24 data bytes in this C2 sequence.
K ”is written and data is output.

When it is detected that there is an error in step 108, the process proceeds to step 110, and it is judged whether or not the error number E in the C2 series is equal to or less than the correctable error number m (E≤m). In the case of this example, since erasure correction is performed, the correctable error number m is up to 4 bytes.

If the number of errors E in the C2 series is less than or equal to the number of correctable errors m, the steps 110 to 1
In step 11, the result (pointer) of the C1 series is collated with the calculation result of the C2 series. As a result of the collation, it is determined in step 112 whether the two match (the numbers of errors match).

The steps 111 and 112 serve as an erroneous correction detecting means, and are for detecting erroneous correction by detecting correct data as an error.

If the result of the determination in step 112 is that they match, the process proceeds to step 113 to correct the error in the C2 sequence, and then proceeds to step 109 to obtain the 24-byte data of the C2 sequence. The data is output by adding an "OK" flag to all of the above.

When the number of detected errors does not match the number of "NG" of the pointer of C1 as a result of the determination in step 112, the process proceeds to step 114, and the 2 of the sequence of C2 is detected.
The data is output with all pointers of the 4-byte data set to "NG".

In step 110, if the number of detected errors E is larger than the correctable error number m as a result of the parity calculation of the sequence of C2, the process proceeds from step 110 to step 115 and each byte in the sequence C2. With reference to the pointer of the result of the sequence of C1, the number of byte data in which the pointer is “NG” is larger than m is determined.

If it is determined in step 115 that the number is less than m, it is considered that either the error detection of the C1 series or the error detection of the C2 series is erroneous. Therefore, the process proceeds from step 115 to step 114.
The pointer for all of the 24-byte data of the C2 series is set to "NG", and the data is output.

In step 115, when the number of data bytes for which the pointer is "NG" is larger than m as a result of the C1 sequence, it is determined that the calculation result of the C2 sequence matches, and the process proceeds from step 115 to step 116. , C1 series processing result pointers, "OK" and "NG" flags are added to each data byte and data is output.

It should be noted that, by using these "OK" and "NG" flags, in the subsequent stage, for the "NG" bytes,
Data interpolation is performed by means of average value interpolation or pre-holding.

As described above, as a result of the error detection / correction by C1 and C2, the error flag for the output data has no error (as a result of C1 and C2, the error is zero) "OK", "NG" ( Both C1 and C2 have E> m). There are three cases of all errors (results of C1 and C2 do not match).

By the way, in a system for performing error correction decoding processing by such convolutional signal processing, when an abnormal state such as overflow or underflow of the jitter correction RAM or track jump occurs as shown in FIG. 6B. In the state where the data is rearranged in byte units on the memory, the state becomes as shown in FIG. 9A, and as shown in FIG. 9B, there is a problem that a region where all the errors are error is large.

That is, when an abnormal state as described above occurs, since the clocks of the data before the abnormal state and the data after the abnormal state are asynchronous during reproduction, the PLL circuit for clock synchronization during reproduction is The lock is released, and as shown in FIG. 9B, a continuous error occurs for C1 in a section of about 5 to 10 frames and about 300 bytes from the joint. Then, when the parity calculation for the system of C2 is performed,
Up to the C2 system immediately before the C2 system shown by S1 to S2 in FIG. 9B (the circle is a data byte included in the C2 system), the above-described normal 1-2 errors are handled, and in most cases, The error is corrected and no problem occurs. Further, even if there is an error that cannot be corrected, as described above, appropriate processing can be performed, so that no inconvenience occurs.

However, in the case of the system of C2 shown by S2 in FIG. 9B, the number of errors of the result of the parity calculation of C1 is 2 even if there is no error other than the C1 error area of FIG. 9B. On the other hand, in the result of the parity calculation of C2,
In addition to the two errors detected in C1, one byte of data after the occurrence of the abnormal state is included in the C2 series, so the number of errors is detected as three.

Therefore, in the case of the above-mentioned abnormal situation, step 111 which is the erroneous correction detecting means of FIG.
And 112, all 24 byte data of the C2 sequence are erroneous. In other words, correct data before and after the C1 error area, which is an inevitable error occurrence section caused by a clock disturbance when an abnormal state occurs, is also regarded as an error.

The state in which all errors of the byte data of the C2 series continues to the C2 series of S4 of FIG. 9B and is regarded as a continuous error for about 120 frames.

That is, when the conventional error correction decoding process of the routines shown in FIGS. 7 and 8 is executed even when an abnormal state occurs, an error of about 10 frames which cannot be avoided is about 120. It was considered as a large continuous error that spreads over frames, and originally there was the inconvenience that correct data could not be reproduced.

The applicant of the present invention compresses audio data and intermittently records it on a small magneto-optical disk having a diameter smaller than a CD, for example, 64 mm, with a predetermined data amount as a recording unit. Proposed a disc recording / reproducing apparatus for reading compressed data from a disc intermittently, temporarily storing it in a buffer memory, reading the data from this memory as appropriate, and expanding the data to reproduce the original audio data. (See Japanese Patent Application No. 2-221725, for example).

Since such a disk recording / reproducing apparatus has a small disk, it can be made compact and a portable apparatus can be realized.

In the case of the above-mentioned disk recording / reproducing apparatus, since the recording is intermittent, the continuous recording is performed for each data of the intermittent recording unit. The unit data amount of this intermittent recording / reproduction is 32 sectors of audio data (a sector is a CD-ROM sector, about 2 Kbytes).
Then, in a disc for recording an audio signal for a time of 74 minutes, the joint recording is performed about 2000 times.

Further, since the data is compressed, during reproduction, the reproduction is intermittent, and abnormal states such as track jumps frequently occur. When the reproducing apparatus is a portable type, an abnormal state such as overflow of the jitter correction RAM frequently occurs due to disturbance when the reproducing apparatus is carried.

In view of the above points, the present invention provides a reproducing apparatus which can perform error correction decoding processing so that data in an abnormal state such as a jitter correction RAM overflow or a track jump can be reproduced as much as possible. Is intended.

[0042]

In order to solve the above problems, in the reproducing apparatus according to the present invention, when the reference codes of the embodiments described later are made to correspond to each other, data is recorded by error correction coding with two or more different series. A reproducing apparatus for reproducing the data from the recorded medium, wherein an abnormal state detecting means (step 201) for detecting an abnormal state during reproduction and an erroneous correction detecting means (step 201) for detecting an erroneous correction by the error correcting code (step 201). 111, 112) are provided so that the erroneous correction detecting means does not work in a portion where the abnormal state is detected.

[0043]

Taking the case where the error correction code is the above-mentioned CIRC as an example, the erroneous correction detection means for performing the parity calculation of the C2 series after the parity calculation of the C1 series and confirming the consistency of the calculation results of the both, Since it works even in an abnormal playback state, the section where continuous errors occur becomes long.

In the configuration of the present invention described above, the erroneous correction detecting means is disabled in the abnormal reproduction state (that is, the error correction by the sequence of C2 is not performed). PL for playback
A relatively short physical error section (a section known from the result of the parity calculation of the C1 series) that occurs due to the disturbance of the L circuit is sufficient.

[0045]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 3 shows the present invention in which audio data is compressed and recorded on a disc smaller than the above-mentioned CD.
This is an embodiment in the case of being applied to a disc recording / reproducing apparatus which expands data at the time of reproduction and reproduces original audio data.

In FIG. 3, reference numeral 1 is an optical disk. The outer diameter of the disc 1 in this example is 64 mm.
, Recording tracks are formed in a spiral shape at a pitch of 1.6 μm, for example. The disk 1 is rotationally driven by a spindle motor 30M, and a servo circuit 32 described later is used.
Is controlled to rotate at a constant linear velocity, for example, 1.2 to 1.4 m / s. And on disk 1,
By recording the audio information as a digital signal and by compressing it, the target information can be recorded and reproduced in 130 Mbytes or more.

In the case of this example, the disc 1 to be reproduced can be two or more different types of discs, as will be described later. For example, a read-only type optical disc in which a signal is recorded by a pit string formed by an injection mold or the like, and a rewritable magneto-optical disc having a magneto-optical recording film capable of recording / reproducing and erasing are considered.

Further, a pre-groove for light spot control (for tracking control) is formed in advance on the disc 1. Especially, in this example, a wobbling signal for tracking is added to this pre-groove. The absolute address code is recorded in a superimposed manner. The disc 1 is housed in a disc cartridge 2 to prevent dust and scratches.

Further, on the disc 1, information about the audio data recorded on the disc is recorded at the innermost track position. This is generally called a TOC (Table of content), and includes the number of recorded songs, information about the recording position of each song, the playing time of each song, and the like.

[Recording System of Recording / Reproducing Apparatus] The embodiment of the recording / reproducing apparatus shown in FIG. 3 is devised so that the structure can be simplified as much as possible by using an IC. First, the time of recording on a magneto-optical disk will be described. During recording and reproduction, a mode switching signal R / P from a system controller 20 configured by using a microcomputer,
The mode of each circuit unit is switched. A key input operation unit (not shown) is connected to the system controller 20, and an operation mode is designated by an input operation in this key input operation unit.

The left and right two-channel stereo analog audio signals that have passed through the input terminal 21 are sampled at a sampling frequency of 44.1 kHz in the A / D converter 22.
It is sampled by z and each sampling value is converted into a 16-bit digital signal. The 16-bit digital signal is supplied to the data compression / expansion processing circuit 23. The data compression / expansion processing circuit 23 functions as a data compression circuit during recording and functions as a data expansion circuit during reproduction. This processing circuit 2 for data compression and decompression
3 has a buffer memory (not shown).

At the time of this recording, the input digital data is compressed to, for example, about 1/5. Various methods can be used for this data compression,
For example, an ADPCM (Adaptive Delta) with a quantization number of 4 bits
Pulse Code Modulation) can be used. In addition, for example, the input digital data is divided into a plurality of bands so that the higher the band is, the wider the band is, and a plurality of samples are provided for each of the divided bands (the number of samples should be the same in each band).
It is also possible to use a method of forming a block consisting of, performing orthogonal transformation for each block of each band, obtaining coefficient data, and performing bit allocation for each block based on this coefficient data. The data compression method in this case considers the human auditory perception characteristics to sound, and can perform data compression with high efficiency (see Japanese Patent Application No. 1-278207).

In this way, the digital data DA from the A / D converter 22 is compressed to about 1/5 by the data compression processing in the data compression / expansion processing circuit 23,
This compressed data is stored in the buffer memory 2 controlled by the shock proof memory controller 24.
5 is transferred. In the case of this example, the buffer memory 2
5 is a D-RAM having a capacity of 1M to 4M bits.

If there is no track jump in which the recording position on the disk 1 jumps due to vibration or the like during recording, the memory controller 24 outputs a predetermined amount of compressed data in a recording unit at intermittent recording timing as described later. The data is sequentially read from the buffer memory 25 at a transfer speed that is about 5 times the write speed, and the read compressed data is transferred to the data encoding / decoding circuit 26.

The data encode / decode circuit 26 is
It works as an encoding circuit during recording, and buffer memory 2
The compressed data transferred from the No. 5 is encoded into the data of the sector structure of the CD-ROM. One sector is about 2K bytes. In the case of this example, the recording unit data includes 32 sectors of audio data. Data of a recording unit including audio data of 32 sectors will be referred to as a cluster hereinafter.

Further, during the recording, the memory controller 24 controls the memory so that the data stored in the buffer memory 25 is reduced as much as possible during the normal operation. For example, when the amount of data in the buffer memory 25 becomes a predetermined amount or more, only one cluster of data is read from the buffer memory 25, transferred to the data encoding / decoding circuit 26, and always written in a amount of the predetermined amount or more. Memory control is performed so that space is reserved.

When it is detected that a track jump has occurred during recording, the memory controller 24 stops the data transfer to the circuit 26 and stores the compressed data from the processing circuit 23 in the buffer memory 25. Then, when the recording position is corrected to the correct track position, control is performed to restart the data transfer from the buffer memory 25 to the circuit 26.

Whether or not a track jump has occurred is detected by, for example, providing a vibrometer in the apparatus and detecting whether or not the magnitude of the tracking error causes a vibration detection output and a tracking error. It can be carried out. Further, as described above, since the absolute address code is recorded on the disc 1 of this example so as to be superposed on the wobbling signal for tracking control when forming the pre-groove, the absolute address from this pre-groove is recorded. It is also possible to read the code at the time of recording and detect the track jump from the decoded output. When a track jump occurs, the power of the laser light for magneto-optical recording is lowered so that past recorded data will not be erased.

The correction of the recording position when the track jump occurs can be performed by using the absolute address code.

As will be understood from the above, the data capacity of the buffer memory 25 in this case is as follows.
It is necessary to have at least a capacity capable of accumulating compressed data corresponding to a time period from the occurrence of the track jump to the correct correction of the recording position. In this example, the buffer memory 25 has a capacity of 1M to 4M bits as described above, and this capacity is selected to have a margin to sufficiently satisfy the above conditions.

The output data (data in cluster units) of the data encoding / decoding circuit 26 is supplied to the recording encoding circuit 27. The recording encoding circuit 27 performs an error detection / correction encoding process on the data, and a modulation process suitable for recording, in this example, an EFM encoding process. In this example, the code for error detection and correction is ACIR in which interleaving is changed with respect to the CIRC (Cross Interleaved Reed-Solomon Code) of CD.
C (Add-on Interleave + CIRC) is used. Since the recorded data is intermittent data in cluster units, a plurality of sectors for cluster connection (joint recording) (hereinafter referred to as linking sectors) are provided before and after the 32 sectors of audio data. Is added.

That is, FIG. 4 is a diagram for explaining the recording data after the encoding process, and Ck, Ck + 1, C
k + 2, ... Are k-th, (k + 1) -th, (k +
2), ..., Cluster data is shown. That is, the recording data is arranged in an array in which four linking sectors L1 to L4 are inserted between clusters each including 32 sectors B0 to B31. In this case, when one cluster, for example, the cluster Ck is recorded, as shown in FIG. 4, three sectors before the 32 sectors B0 to B31 of this cluster data Ck and one sector after the cluster data Ck are recorded. And linking sectors are added to record 36 sectors.

Linking sectors to be added before the cluster data Ck are two sectors L for run-in block.
2, L3, and one sector L4 for sub data.
The sub-data sector L4 is currently an undefined area. Sector L1 after cluster data Ck
Are for run-out blocks. In this way, the recorded data is handled intermittently in units of 36 sectors.

In the recording encode circuit 27, the above-mentioned AC
1 for each cluster of data by IRC processing
Interleaving processing of an interleaving length of 08 frames (corresponding to about 1.1 sectors) is performed, but the recorded data in this one cluster falls within the range of the sectors L1 to L4 for linking, and It does not affect the recorded data of the preceding and following clusters.

Further, in this example, linking sectors L1 to L3 other than the sub data sector L4 are provided with specific pattern data distinguishable from other sectors, for example, dummy data such as all 0s. As described above, since the linking sectors L1 to L3 are recorded with the pattern data distinguishable from other sectors, the linking sectors L1 to L3 are detected by detecting the specific pattern data, as described later. It can be detected as a joint position.

The encoded data from the recording encoding circuit 27 is supplied to the magnetic head 29 via the magnetic head drive circuit 28. The magnetic head drive circuit 28 drives the magnetic head so as to apply a modulation magnetic field according to the recording data to the disk 1 (magneto-optical disk). The recording data supplied to the head is in cluster units, and recording is performed intermittently.

The disc 1 is housed in the cartridge 2, but when it is loaded into the apparatus, the shutter plate is opened and the disc 1 is exposed from the shutter opening. The disk drive motor 30 is inserted in the spindle insertion opening.
The rotation shaft of M is inserted and connected, and the disk 1 is rotationally driven. In this case, the disk drive motor 30M is controlled by the servo control circuit 32, which will be described later, to have a linear velocity of 1.2 to 1.4 m.
The rotation speed is controlled so that the disk 1 is rotationally driven at / s.

The magnetic head 29 faces the disk 1 exposed from the shutter opening of the cartridge 2.
An optical head 30 is provided at a position facing the surface of the disk 1 opposite to the surface facing the magnetic head. The optical head 30 is composed of, for example, a laser light source such as a laser diode, a collimator lens, an objective lens, a polarization beam splitter, an optical component such as a cylindrical lens, a photodetector, and the like. Laser light with a constant power, which is larger than the normal time, is emitted. Data is recorded on the disk 1 by thermomagnetic recording by this light irradiation and the modulation magnetic field by the magnetic head 29. The magnetic head 29 and the optical head 30 are both configured to be movable in the radial direction of the disk 1.

At the time of this recording, the output of the optical head 30 is supplied to the absolute address decoding circuit 34 via the RF circuit 31, and the absolute address code from the pre-groove of the disc 1 is extracted and decoded. And
The decoded absolute address information is supplied to the recording encoder circuit 27, inserted as absolute address information in the recording data, and recorded on the disc 1. The absolute address information from the absolute address decoding circuit 34 is also supplied to the system controller 20 and used for recognition of the recording position and position control as described above. Then, each cluster data is recorded at the absolute address position on the disk 1 indicated by the absolute address information recorded in the data.

Here, in the sectors B0 to B31 of the main data of each cluster data, when expressed by a 2-digit hexadecimal number,
Sector numbers represented by (00) to (1F) are assigned. The linking sector L1 is (FC), the linking sector L2 is (FD), and the linking sector L is
3 is assigned (FE), and the sub-data sector L4 is assigned a sector number denoted by (FF). These sector numbers are included in the absolute address information.

A signal from the RF circuit 31 is supplied to the servo control circuit 32, a servo control signal for constant linear velocity servo of the motor 30M is formed from the signal from the pre-groove of the disk 1, and the motor 30M is driven. Speed controlled.

After the end of this recording, T at the innermost circumference of the disc
Data relating to recording data is recorded in the OC.

[Reproduction System of Recording / Reproduction Device] The device of this example is capable of reproducing two types of discs, a read-only type optical disc and a rewritable type magneto-optical disc, and discriminating between these two types of discs. Can be performed, for example, by detecting the identification recessed hole provided in each disk cartridge 2 when the disk cartridge 2 is loaded in the apparatus. Further, since the light reflectance is different between the read-only type disc and the rewritable type disc, it is possible to discriminate between the two types of discs from the received light amount. Although not shown, the discriminating outputs of these two types of discs are supplied to the system controller 20.

The disk loaded in the apparatus is rotationally driven by the disk drive motor 30M. Then, in the same manner as during recording, the disk drive motor 30M is driven by the servo control circuit 32 by the signal from the pre-groove so that the disk 1 has the same speed as during recording, that is, the linear velocity of 1.2 to 1.4 m / s. Then, the rotation speed is controlled to be constant.

During this reproduction, the optical head 30 detects the reflected light of the laser beam applied to the target track to detect the focus error by, for example, the astigmatism method, or the tracking error by, for example, the push-pull method. In the case of a read-only type optical disc, the reproduced signal is detected by utilizing the diffraction phenomenon of light in the pit row of the target track, and in the case of a rewritable type magneto-optical disc, the reflected light from the target track is detected. The reproduction signal is detected by detecting the difference in the polarization angle (Kerr rotation angle) of.

The reproduction of the reproduction data from the disc 1 by the optical head 30 is performed by a fixed amount under the control of the system controller 20, and in this example, intermittently in cluster units.

The output of the optical head 30 is supplied to the RF circuit 31. The RF circuit 31 extracts the focus error signal and the tracking error signal from the output of the optical head 30 and supplies them to the servo control circuit 32, and also binarizes the reproduction signal and supplies it to the reproduction decoding circuit 33.

The servo control circuit 32 controls the focus of the optical system of the optical head 30 so that the focus error signal becomes zero, and also controls the optical system of the optical head 30 so that the tracking error signal becomes zero. Performs tracking control.

Further, the RF circuit 31 extracts the absolute address code from the pre-groove and supplies it to the absolute address decoding circuit 34. Then, the absolute address information from the decoding circuit 34 is supplied to the system controller 20 and is used for the servo control circuit 32 to control the reproducing position of the optical head 30 in the disk radial direction. The system controller 20 can also use the address information in sector units extracted from the reproduction data to manage the position on the recording track scanned by the optical head 30.

During this reproduction, as will be described later, the disc 1
The compressed data read from is written in the buffer memory 25, read and expanded, but due to the difference in the transmission rate of both data, the timing of intermittent data read from the disk 1 by the optical head 30 is For example, the system controller 20 controls the memory controller 24 while monitoring so that the amount of data stored in the buffer memory 25 does not fall below a predetermined amount.

The data read from the disk 1 is R
It is supplied to the reproduction decoding circuit 33 via the F circuit 31. The reproduction decoding circuit 33 receives the binarized reproduction signal from the RF circuit 31, and performs processing corresponding to the recording encoding circuit 27, that is, EFM decoding processing, decoding processing for error detection and correction, interpolation processing, and the like. To do.

Further, the reproduction decoding circuit 33 is, for example, 8
A jitter correction RAM having a capacity of about a frame (EFM frame) is provided. Then, as described above, the reproduction data is written to the jitter correction RAM at the clock synchronized with the reproduction data, and the written reproduction data is read from the jitter correction RAM at the reference clock, Playback data without jitter.

When the rotational speed of the disk suddenly changes due to disturbance during reproduction, the jitter correction RAM overflows or underflows. These overflows and underflows are caused by the jitter correction. It is detected by monitoring the difference between the write address and the read address of the RAM for use. The detection output is supplied to the system controller 20.

The error detection / correction processing routine in the reproduction decoding circuit 33 is changed between the normal data section and the abnormal state occurrence section during reproduction, as will be described later. Only the error correction using the sequence of C1 is executed without operating the erroneous correction detecting means using the sequence of C2.

The output data of the reproduction / decoding circuit 33 is supplied to the data encoding / decoding circuit 26. The data encoding / decoding circuit 26 functions as a decoding circuit during reproduction, and decodes the data of the sector structure of the CD-ROM into the original data in a compressed state.

This data encoding / decoding circuit 26
Output data is transferred to the buffer memory 25 controlled by the memory controller 24 and written at a predetermined writing speed.

At the time of this reproduction, if there is no track jump in which the reproduction position jumps due to vibration or the like during reproduction, the memory controller 24 writes the compressed data from the buffer memory 25 at the write speed. The data is sequentially read at a transfer rate of about ⅕, and the read data is transferred to the data compression / expansion processing circuit 23.
In this case, as described above, the memory controller 24 determines that the amount of data stored in the buffer memory 25 is
Writing / reading of the buffer memory 25 is controlled so as not to fall below a predetermined level.

When it is detected that a track jump has occurred during reproduction, the system controller 20 causes the memory controller 24 to stop writing data from the circuit 26 to the buffer memory 25, thereby compressing / expanding the data. Only data transfer to the processing circuit 23 is performed. Then, when the playback position is corrected, the buffer memory 25
The control for restarting the data writing from the circuit 26 to the circuit is performed.

Whether or not a track jump has occurred is detected, for example, by using a tracking error method, a vibrometer method, both methods, and wobbling for tracking control on the pre-groove of the optical disk, as in the case of recording. A method of using an absolute address code recorded by being superimposed on a signal (that is, the absolute address decoding circuit 34
Method of using the decode output of) or a method of detecting the track jump by taking the OR of the vibrometer and the absolute address code. Further, since the absolute address information and the sector unit address information are extracted from the reproduction data during the reproduction as described above, this can be used.

As will be understood from the above, the data capacity of the buffer memory 25 at the time of reproduction corresponds to the time from the occurrence of the track jump to the correct correction of the reproduction position. The minimum capacity that can always store data is required. This is because with such a capacity, data can be continuously transferred from the buffer memory 25 to the data compression / expansion processing circuit 23 even if a track jump occurs. The 1M to 4M bits as the capacity of the buffer memory 25 in this example is selected as a capacity having a margin so as to sufficiently satisfy the above condition.

Further, as described above, the memory controller 24 performs memory control so that, during normal operation, the buffer memory 25 stores as much predetermined data as the required minimum amount or more. In this case, for example, when the amount of data in the buffer memory 25 becomes equal to or less than a predetermined amount, a data read request is issued to the system controller 20 and the optical head 30 intermittently takes in data from the disk 1. The data is written from the circuit 26, and the memory is controlled so that a read space of a predetermined data amount or more is always secured.

The data compression / expansion processing circuit 23 functions as a data expansion circuit at the time of reproduction, takes in the ADPCM data from the buffer memory 25 into the buffer memory (not shown), and reverses the data compression processing at the time of recording. It is processed and stretched about 5 times.

The digital audio data from the data compression / expansion processing circuit 23 is supplied to the D / A converter 35, converted into a 2-channel analog audio signal, and output from the output terminal 36. In this example, the digital audio data before D / A conversion is
It may be output from the output terminal 37 as it is.

[Explanation of Error Detection / Correction Method] As described above, the reproduction decoding circuit 33 executes C
In the error detection and correction method using the 1 and C2 series data, the parity calculation of the C2 series is not performed in the portion where the abnormal state occurs, and the erroneous correction detection means does not work.

That is, FIGS. 1 and 2 are flowcharts of the error correction decoding process executed by the reproduction decoding circuit 33, and the steps for performing the same processes as those in the conventional example of FIGS. 7 and 8 are the same. The reference numerals are given and the description thereof is omitted.

In this example, the error correction using the parity of the C1 sequence is not immediately followed by the error correction using the parity of the C2 sequence, but the error correction process is performed. For the data, it is determined whether or not an abnormal state has occurred. If the abnormal state has not occurred, the same error correction processing as in the related art using the parity of the C2 series is performed, and if the abnormal state has occurred, C
The error correction process using the sequence 2 is not performed.

That is, as shown in FIG. 1, after the steps 103 and 106 which are the steps for ending the error correction processing by the sequence of C1, the step 107 is directly executed as shown in FIGS. Instead of proceeding, proceed to step 201. Then, in this step 201,
It is determined whether or not the data that has been subjected to the error correction processing based on the C1 series is the data in the portion where the abnormal state has occurred.

When it is judged that an abnormal state has occurred,
There are the following four cases. (1) When the jitter correction RAM overflows or underflows. (2) The track jump instruction is the system controller 2
When sent from 0. In this case, since the playback position has made a track jump, a command to jump to that track position was issued when a track jump command to return to the original position was issued and when the subsequent data position was another track during recording. There is a time. (3) When the reproduction frame synchronization signal in the reproduction decoding circuit 33 is in an abnormal state. (4) When an abnormal condition is detected by other information and a command is issued from the microcomputer.

Any one of the above (1) to (4) is detected, and in step 201, it is judged whether or not the data position where the error correction processing of the C1 series is performed is the position where the abnormal state occurs. To be done. If the result of that determination is that it is not the position where the abnormal state has occurred, the routine proceeds from step 201 to step 107, and the parity calculation of the C2 sequence consisting of steps 108 to 116 is used as in the conventional case. Erroneous correction detection (step 111,
11) and the step of error-correctable error correction processing.

If the result of determination in step 201 is that it is an abnormal state occurrence position, the process proceeds from step 201 to step 116, and error correction detection and error correction using parity calculation of the C2 sequence are possible. The error correction process is not performed, and the data is output according to the pointer based on the result of the C1 error correction process.

As a result of the above error correction decoding processing, at the data position where the abnormal state occurs, the error correction detection using the C2 series is not performed, and only the error correction by the C1 series is performed. 5 to 10 frames in the unavoidable C1 error area shown in 9B are sufficient. Therefore, the data can be extracted quickly and stably.

That is, in the format of the disk recording / reproducing apparatus of this example, interleaving for 108 frames is performed in addition to the processing of CIRC. Therefore, the conventional error correction processing routine of FIGS. 120 frames + 108 when executed even in the state position
When the number of consecutive errors corresponding to frames = 230 frames is generated and a positional error occurs due to a disc rotation deviation or the like, there is a possibility that the consecutive errors may have an effect for a long time. The continuous error can be recorded in and reproduced from the data in a stable manner because the continuous error can be recorded in the error region where the C1 sequence becomes an error due to the disturbance of the output clock of the PLL circuit.

The above is an example in which the present invention is applied to a reproducing apparatus for a disc smaller than a CD (a so-called mini disc). However, the present invention is an apparatus for intermittently recording / reproducing data as described above. The present invention is applicable not only to the above case but also to all cases during disc reproduction.

The error correction code is CIR.
The present invention is not limited to C, and the present invention can be applied when various error correction codes are used, and the number of error correction coding sequences may of course be two or more. The recording medium is not limited to the disc-shaped recording medium, and the present invention can be applied to a tape or a card.

[0105]

As described above, according to the present invention, in a reproducing apparatus for digitally recorded data which is error coded in two or more different series, an error occurs in a portion where an abnormal state occurs during reproduction. Since the correction detection is not performed, the invalid data area can be reduced.

[Brief description of drawings]

FIG. 1 is a diagram showing a part of a flowchart of error correction decoding processing of a reproducing apparatus according to the present invention.

FIG. 2 is a diagram showing a part of a flowchart of an error correction decoding process of the reproducing apparatus according to the present invention.

FIG. 3 is a block diagram of an embodiment of a disc recording / reproducing apparatus to which the present invention is applied.

FIG. 4 is a diagram for explaining a unit of data that is intermittently recorded and reproduced in the example of FIG.

FIG. 5 is a block diagram for explaining an example of error correction encoding and decoding.

FIG. 6 is a diagram for explaining the error correction decoding of FIG.

FIG. 7 is a diagram showing a part of a flowchart of error correction decoding processing of a conventional reproducing apparatus.

FIG. 8 is a diagram showing a part of a flowchart of an error correction decoding process of a conventional reproducing apparatus.

FIG. 9 is a diagram for explaining splicing recording and occurrence of an error in a splicing portion.

[Explanation of symbols]

 1 Disk 2 Cartridge 20 System Controller 22 A / D Converter 23 Data Compression / Expansion Processing Circuit 24 Memory Controller 25 Buffer Memory 27 Recording Encoding Circuit 28 Magnetic Head Driving Circuit 29 Magnetic Head 30 Optical Head 31 RF Circuit 32 Servo Circuit 33 Playback Decoding Circuit 34 Absolute Address Decoders 111-112 Steps as Error Correction Detection Unit 201 Steps of Detection of Abnormal State Occurrence

Continuation of front page (51) Int.Cl. ⁶ Identification number Office reference number FI Technical display location G11B 20/18 574 J 8940-5D C2 576 A 8940-5D 19/04 501 D 7525-5D

Claims (3)

[Claims] 1. A reproducing apparatus for reproducing the data from a recording medium on which data is recorded by performing error correction coding on two or more different series, the abnormal state detecting means detecting an abnormal state at the time of reproduction. A reproducing apparatus which is provided with an erroneous correction detecting means for detecting an erroneous correction by the error correcting code and prevents the erroneous correction detecting means from operating in a portion where the abnormal state is detected. 2. The reproducing apparatus according to claim 1, wherein the recording medium is a disk recording medium, and a track jump portion at the time of reproduction is detected as the abnormal state. 3. A buffer memory for correcting a time base error of a reproduction signal is provided, and an overflow state or an underflow state of the buffer memory is detected as the abnormal state. The playback device described.