KR20000013576A - Lcd module - Google Patents
Lcd module Download PDFInfo
- Publication number
- KR20000013576A KR20000013576A KR1019980032518A KR19980032518A KR20000013576A KR 20000013576 A KR20000013576 A KR 20000013576A KR 1019980032518 A KR1019980032518 A KR 1019980032518A KR 19980032518 A KR19980032518 A KR 19980032518A KR 20000013576 A KR20000013576 A KR 20000013576A
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- Prior art keywords
- drive
- tft substrate
- bumps
- input pads
- electrically connected
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- 239000000758 substrate Substances 0.000 claims abstract description 34
- 239000004973 liquid crystal related substance Substances 0.000 abstract description 2
- 239000010409 thin film Substances 0.000 abstract 1
- 230000005856 abnormality Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
- G02F1/13452—Conductors connecting driver circuitry and terminals of panels
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
- H05K3/323—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives by applying an anisotropic conductive adhesive layer over an array of pads
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
- G02F1/13456—Cell terminals located on one side of the display only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Nonlinear Science (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Optics & Photonics (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
Description
본 발명은 엘시디 모듈에 관한 것으로, 더욱 상세하게는 TFT 기판의 입력패드들에 드라이브 IC의 더블 범프(double bump)들을 각각 대응 본딩하여 본딩부분에 대한 신뢰성을 향상시킬 수 있도록 한 엘시디 모듈에 관한 것이다.The present invention relates to an LCD module, and more particularly, to an LCD module capable of improving the reliability of a bonding portion by correspondingly bonding double bumps of a drive IC to input pads of a TFT substrate, respectively. .
일반적으로 LCD 모듈에서 LCD 패널과 인쇄회로기판과 드라이브 IC의 연결 방법에 따라 COG(Chip On Glass) 실장방식과 TAB(Tape Automated Bonding) 실장방식으로 구분된다.In general, the LCD module is divided into COG (Chip On Glass) mounting method and TAB (Tape Automated Bonding) mounting method according to the connection method of LCD panel, printed circuit board and drive IC.
이중에서 COG 실장방식은 LCD 패널의 TFT 기판의 입력패드들에 반도체 패키지 형태의 드라이브 IC를 직접 실장하여 LCD 패널에 전기적 신호를 전달하는 방식으로, 이방성 도전 필름(ACF)을 이용하여 드라이브 IC를 TFT 기판에 본딩한다.Among them, the COG mounting method directly mounts the drive IC in the semiconductor package form on the input pads of the TFT substrate of the LCD panel and transmits an electrical signal to the LCD panel. The TFT is driven using an anisotropic conductive film (ACF). Bond to the substrate.
이때, TFT 기판의 입력패드들에는 드라이브 IC에 형성된 범프들이 일대일로 대응하여 본딩된다.At this time, bumps formed in the drive IC are bonded one-to-one to the input pads of the TFT substrate.
그러나, 드라이브 IC의 범프들에 이물질 또는 범프의 높이 이상으로 드라이브 IC와 TFT 기판간의 전기적인 연결 불량이 발생되어 TFT 기판으로 신호전달이 되지않아 게이트 라인 및 소스 라인이 오픈되는 문제점이 있었다.However, there is a problem in that the gate line and the source line are opened due to a bad electrical connection between the drive IC and the TFT substrate due to the foreign matter or bump height of the bumps of the drive IC, and thus the signal is not transmitted to the TFT substrate.
또한, 이러한 문제점으로 인해 불량 드라이브 IC를 제거한 다음 새로운 양품 드라이브 IC를 다시 본딩함으로써 제품의 원가 상승의 요인이 되는 문제점이 있었다.In addition, due to such a problem, there is a problem that the cost of the product is increased by removing the bad drive IC and then rebonding a new good-quality drive IC.
따라서 본 발명의 목적은 드라이브 IC와 TFT 기판간의 전기적인 연결의 신뢰성을 향상시켜 연결 불량으로 인해 발생되는 제품의 원가 상승을 방지하고 제품의 신뢰성을 향상시킬 수 있도록 한다.Accordingly, an object of the present invention is to improve the reliability of the electrical connection between the drive IC and the TFT substrate to prevent the cost increase of the product caused by the poor connection and to improve the reliability of the product.
도 1은 본 발명의 기술에 따른 실시예에 의한 엘시디 모듈을 나타낸 부분 사시도.1 is a partial perspective view showing an LCD module according to an embodiment of the present invention.
도 2는 도 1의 Ⅱ 부분을 나타낸 분해사시도.2 is an exploded perspective view showing part II of FIG.
이와 같은 목적을 달성하기 위해서 본 발명은 TFT 기판의 입력 패드들과 일대일 대응하여 전기적으로 연결되는 더블 범프들을 드라이브 IC에 배열 설치한다.In order to achieve the above object, the present invention arranges double bumps electrically connected to input pads of a TFT substrate in a drive IC.
이때, 더블 범프들은 상기 드라이브 IC의 측면을 따라 이열로 지그재그로 배열될 수 있으며, 더블 범프는 두 개의 범프가 상호 도전선에 의해 연결되어 이루어진다.In this case, the double bumps may be arranged in two rows zigzag along the side surface of the drive IC, and the double bumps are formed by connecting two bumps by mutual conductive lines.
이하 첨부된 도면을 참조하여 본 발명의 기술에 따른 실시예에 의한 엘시디 모듈을 살펴보면 다음과 같다.Hereinafter, an LCD module according to an embodiment of the present disclosure will be described with reference to the accompanying drawings.
도 1 및 도 2를 참조하면, 엘시디 패널(10)이 위치한다. 이 엘시디 패널(10)은 직사각형상의 TFT 기판(12)의 상부면에 TFT 기판(12)의 크기보다 작은 C/F 기판(14)이 액정(도시되지 않음)을 개재하여 실링되어 이루어진다.1 and 2, the LCD panel 10 is located. In the LCD panel 10, a C / F substrate 14 smaller than the size of the TFT substrate 12 is sealed on the upper surface of the rectangular TFT substrate 12 via a liquid crystal (not shown).
통상, 네 개의 모서리 가운데 소정의 모서리 하나에 연결된 TFT 기판(12)의 양측면은 C/F 기판(14)의 양측면과 대응되고, 이에 따라 C/F 기판(14)의 양측면과 대응되지 않은 TFT 기판(12)의 양측면 영역에는 드라이브 IC(16)를 실장할 수 있는 영역이 형성된다.In general, both sides of the TFT substrate 12 connected to a predetermined corner among four corners correspond to both sides of the C / F substrate 14, and thus TFT substrates not corresponding to both sides of the C / F substrate 14. In both side regions of the region (12), regions in which the drive IC 16 can be mounted are formed.
C/F 기판(14)과 대응되지 않은 TFT 기판(12)의 상부면 가장자리 영역에는 게이트 라인(18) 및 소스 라인(도시되지 않음) 각각에 연결된 입력 패드들(20)이 배열되어 형성되고, 입력 패드들(20)과 대응하여 입력패드들(22)이 TFT 기판(14)상에 배열되어 형성된다. 여기서 설명의 편의상 게이트 라인 영역만을 도시하였다.Input pads 20 connected to the gate line 18 and the source line (not shown) are arranged in the upper edge region of the TFT substrate 12 that is not corresponding to the C / F substrate 14. Corresponding to the input pads 20, the input pads 22 are formed on the TFT substrate 14. For convenience of description, only the gate line region is shown.
TFT 기판(12)의 일측면에 인접한 위치에 인쇄회로기판(24)이 위치하고 인쇄회로기판(24)과 TFT 기판(12)의 입력패드들(22)은 FPC(26)와 같은 도전수단에 의해 전기적으로 연결된다.The printed circuit board 24 is positioned at a position adjacent to one side of the TFT substrate 12, and the printed circuit board 24 and the input pads 22 of the TFT substrate 12 are connected by conductive means such as the FPC 26. Electrically connected.
입력 패드(22)(20)들에는 드라이브 IC(16)가 ACF(28)에 의해 본딩되어 전기적으로 연결된다. 여기서, 드라이브 IC(16)에 대한 구성을 보다 자세히 살펴보면, 드라이브 IC(16)에는 TFT 기판(12)의 입력 패드들(20)과 전기적으로 연결되는 더블 범프(double bump ; 30)들이 배열되어 설치된다. 이는 입력 패드(20)와 더블 범프(30)간의 전기적 연결의 신뢰성을 향상시킬 수 있도록 하기 위함이다. 이를 위해 더블 범프는 하기와 같은 구성을 갖는다.Drive ICs 16 are bonded to the input pads 22 and 20 by ACF 28 and electrically connected thereto. Here, the configuration of the drive IC 16 will be described in more detail. In the drive IC 16, double bumps 30 electrically connected to the input pads 20 of the TFT substrate 12 are arranged and installed. do. This is to improve the reliability of the electrical connection between the input pad 20 and the double bump 30. To this end, the double bumps have the following configuration.
더블 범프(30)는 두 개의 범프(32)(34)로 구성되며, 각 범프(32)(34)는 드라이브 IC(16)의 동일 기능을 갖는 본딩 패드(도시되지 않음)와 전기적으로 연결되며, 범프(32)와 범프(34) 사이에는 범프(32)(34)간을 전기적으로 연결하는 도전선(36)이 형성된다.The double bumps 30 consist of two bumps 32 and 34, each bump 32 and 34 electrically connected to a bonding pad (not shown) having the same function as the drive IC 16. The conductive wire 36 is electrically connected between the bumps 32 and 34 between the bumps 32 and 34.
이러한 더블 범프(30)는 드라이브 IC(16)의 측면을 따라 일렬 또는 이열로 배열될 수 있으며, 통상적으로 입력 패드(20)와 일대일 대응을 위해 더블 범프(30)는 이열로 배열되며, 더블 범프(30)가 이열로 배열될 때 지그재그 타입으로 배열되는 것이 바람직하다.The double bumps 30 may be arranged in a row or two rows along the side surface of the drive IC 16, and typically, the double bumps 30 are arranged in two rows for one-to-one correspondence with the input pad 20. It is preferable to arrange in a zigzag type when the 30 is arranged in two rows.
이는 TFT 기판(12)의 각각의 본딩패드(20)에 각각 연결되고 더블 범프들(30) 사이에 위치하게 되는 게이트 라인(18) 및 소스 라인의 일정 영역의 패턴을 최대한 단순하게 형성할 수 있도록 하기 위함이다.This is so simple as to form a pattern of a predetermined region of the gate line 18 and the source line which are respectively connected to the respective bonding pads 20 of the TFT substrate 12 and positioned between the double bumps 30. To do this.
이와 같이 더블 범프가 본딩 패드에 일대일 대응하여 본딩됨으로써 더블 범프 가운데 어느 하나의 범프에 이상이 발생되더라도 다른 하나의 범프로 인해 더블 범프와 본딩 패드는 전기적 연결상태로 지속적으로 유지할 수 있다.As such, when the double bumps are bonded to the bonding pads in a one-to-one correspondence, even when an abnormality occurs in any one of the double bumps, the double bumps and the bonding pads may be continuously maintained in an electrical connection state due to the other bumps.
이렇게 어느 하나의 범프에 불량이 발생하더라도 다른 하나의 범프가 본딩 패드와 전기적으로 연결됨으로써 범프의 접속 불량으로 인한 드라이브 IC와 본딩 패드간의 전기적 연결 불량을 해결할 수 있으며, 또한 드라이브 IC를 교체하지 않음으로써 드라이브 IC의 교체에 따라 제품의 원가가 상승하는 것을 방지할 수 있다.In this way, even if one of the bumps is defective, the other bump is electrically connected to the bonding pad, so that the poor connection between the drive IC and the bonding pad due to the bad connection of the bump can be solved. The replacement of the drive IC can prevent the cost of the product from rising.
이상에서 살펴보면 바와 같이 본 발명은 드라이브 IC의 더블 범프들을 TFT 기판의 입력 패드들에 일대일 대응하여 본딩함으로써 더블 범프 가운데 어느 하나의 범프에 불량이 발생하더라도 다른 하나의 범프가 입력 패드에 연결됨으로써 드라이브 IC와 TFT 기판간의 전기적인 연결이 지속적으로 이루어져 드라이브 IC의 교체에 따른 제품의 원가 상승을 방지할 수 있으며, 드라이브 IC와 TFT 기판간의 전기적인 연결의 신뢰성이 향상되는 효과가 있다.As described above, in the present invention, the double bumps of the drive IC are bonded to the input pads of the TFT substrate in a one-to-one correspondence, so that if one of the double bumps fails, the other bump is connected to the input pad. The electrical connection between the substrate and the TFT substrate is continuously performed to prevent the cost increase of the product due to the replacement of the drive IC, and the reliability of the electrical connection between the drive IC and the TFT substrate is improved.
Claims (4)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019980032518A KR20000013576A (en) | 1998-08-11 | 1998-08-11 | Lcd module |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019980032518A KR20000013576A (en) | 1998-08-11 | 1998-08-11 | Lcd module |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR20000013576A true KR20000013576A (en) | 2000-03-06 |
Family
ID=19546909
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019980032518A KR20000013576A (en) | 1998-08-11 | 1998-08-11 | Lcd module |
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| Country | Link |
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| KR (1) | KR20000013576A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100557066B1 (en) * | 1999-12-11 | 2006-03-03 | 삼성전자주식회사 | Method for dialing with function key in mobile communication terminal |
-
1998
- 1998-08-11 KR KR1019980032518A patent/KR20000013576A/en not_active Application Discontinuation
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100557066B1 (en) * | 1999-12-11 | 2006-03-03 | 삼성전자주식회사 | Method for dialing with function key in mobile communication terminal |
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