KR20000013405A - Adverse slope type wafer guide - Google Patents
Adverse slope type wafer guide Download PDFInfo
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- KR20000013405A KR20000013405A KR1019980032247A KR19980032247A KR20000013405A KR 20000013405 A KR20000013405 A KR 20000013405A KR 1019980032247 A KR1019980032247 A KR 1019980032247A KR 19980032247 A KR19980032247 A KR 19980032247A KR 20000013405 A KR20000013405 A KR 20000013405A
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- wafer
- wafer guide
- guide
- adverse slope
- type wafer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68735—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by edge profile or support profile
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
Description
본 발명은 역경사형 웨이퍼 가이드에 관한 것으로서, 더욱 상세하게는 얼라인먼트 스테이지에서 웨이퍼 세팅시 걸림으로 인한 센터링 불량을 방지할 수 있도록 하는 역경사형 웨이퍼 가이드에 관한 것이다.The present invention relates to a reversely sloped wafer guide, and more particularly, to a reversely sloped wafer guide that can prevent a poor centering due to a jam when setting a wafer in an alignment stage.
종래의 반도체 설비중에서 포토(photo) 공정인 디벨로프(develop) 설비에서는 인덱스 테이블(101:index table)에 셋팅된 웨이퍼(wafer)를 인덱스 아암(102:index arm)이 얼라인먼트 스테이지(103:alignment stage)로 옮기고, 옮겨진 웨이퍼는 얼라인먼트 스테이지(103)에서 센터링(centering)작업을 실시한다.In a conventional semiconductor facility, a photovoltaic development facility, an index arm 102 is an alignment stage 103 for a wafer set in an index table 101. ), And the transferred wafer is centered at the alignment stage 103.
센터링작업이 완료된 웨이퍼는 메인 아암(104:main arm)으로 옮겨져 블록2(106)에서 스핀 & 베이크(107,108:spin & bake)에서 프로세스를 진행한다. 진행완료된 웨이퍼는 다시 메인 아암(104)으로 가져와 얼라인먼트 스테이지(103)로 옮기게 된다.After the centering operation is completed, the wafer is transferred to the main arm 104, and the process is performed in spin & bake at block 2 106. The completed wafer is brought back to the main arm 104 and transferred to the alignment stage 103.
옮겨진 웨이퍼는 인덱스 아암(102)이 다시 인덱스 테이블(101)로 이송하여 셋팅하게 되는 과정을 거치게 된다.The transferred wafer is subjected to a process in which the index arm 102 is transferred back to the index table 101 and set.
위의 설비에서 블록1(105)로부터 블록2(106)의 웨이퍼 이송을 위하여 반드시 얼라인먼트를 정확히 가져가기 위하여 웨이퍼 센터링을 잡아주는 역할을 한다.In the above facility, the wafer centering function is necessary to accurately bring the alignment for the wafer transfer from the block 1 105 to the block 2 106.
센터링을 맞추는 방법으로는 도3에서와 같이, 핀 서포트(109) 상에 세팅된 웨이퍼(111)가 다운(down)되어지면서 도2와 같은 형상을 갖는 웨이퍼 가이드(110)에 의한 기울림 각도로서 센터링작업을 실시하게 된다.As the centering method, as shown in FIG. 3, as the tilt angle of the wafer guide 110 having the shape as shown in FIG. Centering work will be performed.
이 과정에서 핀 서포트(109) 상에 있는 웨이퍼 다운시 웨이퍼 가이드(110)의 기울림 각도에 의해 센터링을 잡아주게 되어 있으나, 인덱스 테이블(101)이나 인덱스 아암(102)으로 인해 핀 서포트(109) 상의 웨이퍼 위치가 한쪽으로 치우치는 경우가 발생되면 핀 서포트(109) 다운시 웨이퍼 가이드(110)의 기울림각(θ1)에 1차 걸림이 발생된다. 이로 인해 기울림각(θ2)이 2차 걸림을 유도하게 되어 도4에서와 같이 웨이퍼(111)가 부정확하게 셋팅되는 경우가 발생하게 된다.In this process, the centering is held by the tilt angle of the wafer guide 110 when the wafer on the pin support 109 is down. However, the pin support 109 is caused by the index table 101 or the index arm 102. When the wafer position of the image is biased to one side, the first locking occurs at the inclination angle θ1 of the wafer guide 110 when the pin support 109 is down. As a result, the inclination angle θ2 induces secondary jams, which may result in incorrect setting of the wafer 111 as shown in FIG. 4.
도4와 같이 셋팅된 웨이퍼(111)가 업(up)되어서 메인 아암으로 전달되면 메인 아암에서 센터링이 맞지 않음에 의한 웨이퍼의 떨어짐 발생으로 웨이퍼의 깨짐 또는 긁힘이 발생되는 문제점이 있다.When the wafer 111 set as shown in FIG. 4 is up and transferred to the main arm, the wafer may be broken or scratched due to falling of the wafer due to misalignment of the centering in the main arm.
이에 본 발명은 메인 아암으로 전달되는 웨이퍼의 센터링을 정확하게 맞추어 웨이퍼 전달시 웨이퍼가 떨어져 깨지거나 긁히는 것을 방지할 수 있도록 하는 역경사형 웨이퍼 가이드를 제공함에 목적이 있다.Accordingly, an object of the present invention is to provide an inclined wafer guide that accurately matches the centering of a wafer to be delivered to the main arm so as to prevent the wafer from being broken or scratched during wafer transfer.
도1은 종래의 디벨로프 설비의 일부분을 도시한 개략도이다.1 is a schematic diagram showing a portion of a conventional development facility.
도2는 종래의 웨이퍼 가이드의 사시도이다.2 is a perspective view of a conventional wafer guide.
도3과 도4는 종래의 웨이퍼 가이드에 웨이퍼가 세팅되는 상태를 도시한 동작상태도이다.3 and 4 are operational state diagrams showing a state in which a wafer is set in a conventional wafer guide.
도5는 본 발명에 따른 역경사형 웨이퍼 가이드의 사시도이다.5 is a perspective view of a reversely sloped wafer guide according to the present invention.
도6은 본 발명에 따른 웨이퍼 가이드에 웨이퍼가 세팅되는 상태를 도시한 동작상태도이다6 is an operational state diagram illustrating a state in which a wafer is set in a wafer guide according to the present invention.
※ 도면의 주요 부분에 대한 부호의 설명※ Explanation of codes for main parts of drawing
1,1a : 웨이퍼 2 : 웨이퍼 가이드1,1a: wafer 2: wafer guide
3 : 핀 서포트 4 : 가이드3: pin support 4: guide
5 : 고정체5: fixed body
상기 목적을 달성하기 위한 본 발명은 기울림각을 갖는 가이드가 고정체의 상면에 입설된 웨이퍼 가이드에 있어서, 이 고정체의 상면에 역경사면이 형성되는 것을 특징으로 한다.The present invention for achieving the above object is a wafer guide in which a guide having a tilt angle is placed on the upper surface of the fixture, characterized in that the reverse inclined surface is formed on the upper surface of the fixture.
이 역경사면은 대향되게 설치된 복수개의 웨이퍼 가이드의 내측에서 외측으로 갈수록 낮게 형성되고, 이 역사면의 각도는 30°의 각도를 갖도록 함이 바람직하다.The reverse inclined surface is formed to be lower from the inside to the outside of the plurality of oppositely arranged wafer guides, and it is preferable that the angle of the reverse surface has an angle of 30 degrees.
이하, 본 발명의 구체적인 실시예를 첨부한 도면을 참조하여 상세히 설명한다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.
도5를 참조하면, 핀 서포트(3) 상에 세팅된 웨이퍼(1)가 다운되면서 센터링 작업을 실시하게 되는 웨이퍼 가이드(2)는 고정체(5)와, 이 고정체(5)의 상면에 입설된 가이드(4)로 구성되어있다.Referring to FIG. 5, the wafer guide 2, which performs the centering operation while the wafer 1 set on the pin support 3 is down, is placed on the fixture 5 and the upper surface of the fixture 5. It consists of a guide (4) installed.
이 웨이퍼 가이드(2)의 가이드(4)는 종래의 기술에서와 같이, 고정체(5)의 상면에 입설되는 데, 가이드(4)의 내측면 즉, 중심을 향하도록 입설된 다수개의 웨이퍼 가이드(2)의 내측에는 60°의 경사각을 갖는 기울림각(θ1)이 형성되어있다.The guide 4 of the wafer guide 2 is placed on the upper surface of the fixture 5, as in the prior art, and a plurality of wafer guides are placed on the inner surface of the guide 4, ie toward the center. Inside (2), the inclination angle (theta) 1 which has an inclination angle of 60 degrees is formed.
그리고, 가이드(4)를 지지하는 고정체(5)의 상면에는 15°의 역경사각을 갖는 역경사면(θ3)이 형성되는데, 이 역경사면(θ3)은 대향되게 설치된 복수개의 웨이퍼 가이드의 내측에서 외측으로 갈수록 낮게 형성되어있다.In addition, an inclined surface θ3 having a reverse inclination angle of 15 ° is formed on an upper surface of the fixture 5 supporting the guide 4, and the inversely inclined surface θ3 is formed on the inside of a plurality of wafer guides which are opposed to each other. It is formed lower toward the outside.
따라서, 센터링을 맞추는 과정에서 도6에 도시한 웨이퍼(1a)와 같이, 기울림각(θ1)에 의해 1차 걸림현상이 발생하여도 2차 걸림현상이 발생되는 부위가 경사각이 아닌 역경사면(θ3)으로 이루어져 있기 때문에 웨이퍼 다운시 자연스럽게 이동되어 도면에 도시된 웨이퍼(1)와 같이 센터링을 유지할 수 있는 것이다.Therefore, in the process of aligning the centering, as shown in the wafer 1a shown in FIG. 6, even if the first locking phenomenon occurs due to the tilt angle θ1, the site where the secondary locking phenomenon occurs is not an inclined angle ( Since it is composed of θ3), it is naturally moved when the wafer is down, so that the centering can be maintained as in the wafer 1 shown in the drawing.
센터링이 잡힌 웨이퍼는 메인 아암상에 셋팅될때에도 정확하게 셋팅되어 메인 아암에서 웨이퍼가 떨어져 발생할 수 있는 긁힘이나 깨짐을 방지할 수 있다.The centered wafer is set accurately even when set on the main arm, to prevent scratches and cracks that may occur when the wafer falls off the main arm.
따라서, 본 발명에 의하면 센터링이 맞추어진 상태에서 메인아암에 의해 웨이퍼가 이동되기 때문에 메인 아암으로부터 웨이퍼가 떨어져 긁히거나 깨지는 것을 방지할 수 있는 효과가 있다.Therefore, according to the present invention, since the wafer is moved by the main arm in the centering state, the wafer can be prevented from being scratched or broken off from the main arm.
이상에서 본 발명은 기재된 구체예에 대해서만 상세히 설명되었지만 본 발명의 기술사상 범위 내에서 다양한 변형 및 수정이 가능함은 당업자에게 있어서 명백한 것이며, 이러한 변형 및 수정이 첨부된 특허청구범위에 속함은 당연한 것이다.Although the present invention has been described in detail only with respect to the described embodiments, it will be apparent to those skilled in the art that various modifications and variations are possible within the technical scope of the present invention, and such modifications and modifications are within the scope of the appended claims.
Claims (3)
Priority Applications (1)
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KR1019980032247A KR20000013405A (en) | 1998-08-07 | 1998-08-07 | Adverse slope type wafer guide |
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KR1019980032247A KR20000013405A (en) | 1998-08-07 | 1998-08-07 | Adverse slope type wafer guide |
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KR1019980032247A KR20000013405A (en) | 1998-08-07 | 1998-08-07 | Adverse slope type wafer guide |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100446214B1 (en) * | 2001-11-29 | 2004-08-30 | 주식회사 롤텍 | Structure Able to Reduce Any Noise for a Scroll Compressor |
CN111312644A (en) * | 2020-02-26 | 2020-06-19 | 厦门通富微电子有限公司 | Automatic wafer alignment device and etching machine |
CN112919128A (en) * | 2021-01-22 | 2021-06-08 | 深圳市晶科鑫实业有限公司 | Be applied to burning record device of small-size oscillator |
-
1998
- 1998-08-07 KR KR1019980032247A patent/KR20000013405A/en not_active Application Discontinuation
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100446214B1 (en) * | 2001-11-29 | 2004-08-30 | 주식회사 롤텍 | Structure Able to Reduce Any Noise for a Scroll Compressor |
CN111312644A (en) * | 2020-02-26 | 2020-06-19 | 厦门通富微电子有限公司 | Automatic wafer alignment device and etching machine |
CN112919128A (en) * | 2021-01-22 | 2021-06-08 | 深圳市晶科鑫实业有限公司 | Be applied to burning record device of small-size oscillator |
CN112919128B (en) * | 2021-01-22 | 2022-06-07 | 深圳市晶科鑫实业有限公司 | Be applied to burning record device of small-size oscillator |
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