KR20000011430A - Wiring board for bump bonding, semiconductor device assembled from the wiring board and manufacturing method of wiring board for bump bonding - Google Patents

Abstract

PURPOSE: A wiring plate for bump bonding is provided to prevent a connection between a bump and a wiring from being broken, to reduce a difference in the heights of the bumps, and to supply an excellent productivity. CONSTITUTION: A wiring plate for a bump bonding comprises: a wiring layer(3) being formed by a copper for containing bumps(2) as an integral unit on a desired area on the surface of an insulating layer(1) such as a polyamide thin film; a protecting resist layer(4) being supplied on a side surface of the wiring layer supplied on the surface of the insulating layer for exposing the surface of the bump; a via hole(5) being supplied on the other surface of the insulating layer on the side surface of the insulating layer; and the surface of the bump and the floor surface of the via hole are plated by using gold or silver.

Description

Bump bonding wiring board, semiconductor device assembled using the wiring board and manufacturing method of bump bonding wiring board {Wiring board for bump bonding, semiconductor device assembled from the wiring board and manufacturing method of wiring board for bump bonding}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to bump bonding wiring boards used in semiconductor packages used in various electrical equipment, semiconductor devices assembled using the wiring boards, and methods for manufacturing bump bonding wiring boards.

In order to meet the recent demand for miniaturization and weight reduction in electrical equipment, the shape of the semiconductor package has changed from a wire bonding type that uses gold wiring for the electrical connection between the semiconductor package and the wiring board to a bump bonding type which is very advantageous for miniaturization. Doing. In a semiconductor package having such a bump bonding type, electrical connection between the semiconductor chip and the wiring material on which the chip is mounted is achieved by the bumps formed on the electrode pad of the semiconductor chip and the wiring material on which the chip is mounted.

Conventionally, for wiring materials having such bumps, a photoresist is applied onto the surface of a conductive layer of a material made of a polyimide film having a conductive layer, such as a copper foil provided on one surface, for example. It is masked with a mask of the pattern, exposed and developed to obtain an etch pattern, and then the conductive layer is etched to obtain the desired wiring pattern. Next, a via hole of a desired diameter is formed by irradiating a laser such as excimer, carbon dioxide gas from one side of the polyimide film.

Next, after forming an insulating resin film on the side surface of the wiring pattern to mask the wiring pattern, copper plating is grown from the surface of the conductive layer exposed in the bottom region of the via hole to form a bump. Then, a laser is irradiated to the insulating resin film to form via holes for external terminals. Finally, to facilitate bonding with the electrode pad of the semiconductor chip, the exposed copper surface and the surface of the bump in the bottom region of the via hole for the external terminal are plated with gold.

In order to bond the wiring material obtained through the above process to the semiconductor chip, a thermocompression method or a thermocompression method using ultrasonic waves is used. Also, solder bumps are formed in the via holes to form external terminals and formed on the printed wiring board. Mount it.

By the way, according to the conventional manufacturing method described above, since the discontinuous region of the grain boundary is generated at the contact surface between the copper foil serving as a raw material of the copper wiring and the bump formed by plating, at the time of bonding to the semiconductor chip Due to the stress that occurs, the bumps and wires are separated from the contact surface, and there is a problem in that the connection is broken.

In addition, since bumps are formed by growing metal plating from the bottom region of the via hole, the thickness of the plating should be at least equal to or greater than the thickness of the polyimide film that becomes the insulating resin layer. As a result, a long time is required for the metal plating process, and thus there is a problem that productivity cannot be improved.

In addition, since the bumps are grown by metal plating, there is a problem that the variation in the bump height cannot be reduced.

1 is a cross-sectional view of a specific example of a bump bonding wiring board according to the present invention.

<Explanation of symbols for main parts of drawing>

1: insulation layer

2: bump

3: wiring layer

4: protective resist layer

5: via hole

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and an object of the present invention is to prevent a connection between a bump and a wire from being broken, and to provide a bump bonding wiring board having a small variation in bump height and excellent productivity. The manufacturing method of the semiconductor element and bump bonding wiring board which were assembled using the present invention are provided.

In order to solve the above problem, a bump bonding wiring board according to the first aspect of the present invention is provided with an insulating layer, a wiring layer provided on one surface of the insulating layer and having integral bumps in a desired position, and one of the insulating layers. A protective resist layer provided on the surface of the substrate and having a surface of the exposed bumps, wherein the via hole is provided on another surface of the insulating layer.

Moreover, the semiconductor element which concerns on the 2nd characteristic of this invention is characterized by being assembled using the bump bonding wiring board which has the above-mentioned structure.

Furthermore, the manufacturing method of the wiring board for bump bonding concerning the 3rd characteristic of this invention is

(a) providing a first resist layer on the surface of the conductive layer provided on one surface of the insulating layer,

(b) performing exposure and development, and removing the first resist layer in a region other than the bump forming region,

(c) half etching the exposed conductive layer to form a bump,

(d) providing a second resist layer over the conductive layer,

(e) performing exposure and development, and etching the exposed conductive layer to form a wiring pattern,

(f) providing a protective resist layer over the entire surface on the side of the wiring pattern,

(g) performing exposure and development to expose the surface of the bumps and curing the protective resist layer,

(h) providing a third layer of resist on the other surface of the insulating layer,

(i) exposing and developing the third resist layer to form an etching pattern, and

(j) forming a via hole by etching the exposed insulating layer,

The exposed insulating layer is etched to form a via hole, followed by further metal plating on the exposed bottom surface of the via hole and the surface of the bumps, the conductive layer made of copper, and the insulating layer surfaces made of polyimide film. It is characterized by.

Hereinafter, the present invention will be described with reference to the accompanying drawings.

1 shows a bump bonding wiring board of a first embodiment according to the present invention, which is constituted by providing a wiring layer 3, a protective resist layer 4 and a via hole 5. Here, the wiring layer 3 is formed of copper or the like and has bumps 2 as integrated parts in a desired area on one surface of the insulating layer 1 such as a polyimide thin film, and the surface of the bump 2 is exposed. The protective resist layer 4 is preferably provided on the side of the wiring layer 3 provided on one surface of the insulating layer 1, and the via hole 5 is the insulating layer 1 on the side of the insulating layer 1. It is preferred that the surface of the bump 2 and the bottom surface of the via hole 5 are plated (2-1, 5-1) using gold or silver.

In addition, by using the bump bonding wiring board according to the present invention, by bonding the semiconductor chip and the bump in the same manner as the conventional method, filling the via hole with solder ball (bonding the solder hole) through the bonding to the printed circuit board, It is very easy to assemble.

Hereinafter, the manufacturing process of the bump bonding wiring board which concerns on this invention is demonstrated in detail.

First, using a copper-polyimide substrate in which an insulating layer such as a polyimide thin film having a conductive layer made of copper foil is preferably laminated on the surface thereof, the dry thin film resist layer is placed on a copper foil side surface. It is provided laminated on the surface.

Next, the dry thin film resist layer is masked, exposed and developed by irradiating an ultraviolet beam, and then the dry thin film resist layer in an area other than the area where bumps should be formed is removed.

In this way, the exposed conductive layer, such as copper foil, is half etched to form bumps.

Thereafter, a resist thin film similar to the above is provided on the side of the conductive layer by lamination, but it is preferable to remove the dry thin film resist layer on the bump beforehand if necessary.

The laminated resist layer is masked using a mask having a desired wiring pattern, and the wiring pattern is formed by etching the exposed conductive layer after exposure and development by irradiating an ultraviolet beam.

In addition, the dry thin film resist is laminated over the entire surface of the wiring pattern side, for example, by vacuum lamination to form a protective resist layer, but it is preferable to remove the preceding resist layer on the wiring pattern in advance if necessary.

Subsequently, the protective resist layer is exposed and developed, and after the dry thin film resist on the bumps is removed, the protective resist layer is cured.

In using the resist layer as a protective resist layer, a method of using a liquid form or a method of laminating a dry thin film which is formed in advance as a resin film by lamination or the like may be used, in order to easily form a thin film having a flat thickness. Dry thin film resists are preferred.

Thereafter, a dry thin film resist layer is provided by laminating on the surface of the polyimide with the insulating layer of the copper-polyimide substrate.

In this regard, it is desirable to provide a similar dry thin film resist layer over the entire surface of the wiring pattern side to protect the bumps from subsequent etching processes.

Next, the dry thin film resist layer is masked, exposed and developed to form an etch pattern on the insulating layer.

A via hole is formed by etching the exposed polyimide as an insulating layer.

According to the present invention, a bump bonding wiring board can be manufactured by performing such a process.

Further, in the present invention, it is preferable to perform metal plating on the surface of the conductive layer on the bottom surface of the via hole formed in the same manner as above and on the bump, and at this time, plating such as silver plating or gold plating can be selected as desired. .

As described above, according to the present invention, since the bumps and the wiring are integrally constituted by the same conductive layer, discontinuous regions of the grain boundaries are not generated between the bumps and the wiring, and the etching is performed about half the bumps. As a result, the time-consuming metal plating process required by the conventional method is not required, and thus very good productivity can be obtained.

Hereinafter, the specific example of this invention is described with a comparative example.

Example

First, a resist layer is formed by laminating an alkali dry type negative dry thin film resist to a thickness of 15 mu m on a copper foil side of a copper-polyimide substrate, which is 50 mu m thick and 35 mm wide. It consists of a polyimide thin film of 20 cm in length and has a copper foil of 25 mu m thickness on one surface. Then, the resist layer was masked and exposed and developed by irradiation with an ultraviolet beam having an intensity of 200 mJ, so that the patterns were formed at intervals of 19 mm in the longitudinal direction, each 120 m in the width direction of the copper foil of the copper polyimide substrate. 200 bumps are formed at intervals of.

Next, by contacting the exposed areas of the copper foil with an etching solution of commercial copper chloride at a temperature of 40 ° C., the areas of the copper foil are etched halfway to form bumps, after which the etched resist layer on the bumps is hydrated. The thin layer is removed by a sodium solution and then removed.

Furthermore, a dry thin film resist layer of the same type as described above is laminated on the copper foil side surface, masked using a mask having a desired wiring pattern, and similarly exposed and developed to form a wiring pattern.

Next, in the same manner as above, a wiring pattern is formed by etching the copper foil, and the etched resist layer is cut into a thin layer and then removed.

Thereafter, an alkali developing dry thin film resist is laminated on the entire surface of the wiring pattern side surface in a thickness of 35 탆 by the vacuum lamination method. The laminated dry thin film resist layer is then exposed and developed, and after removing the dry thin film resist layer on the surface of the bump, a curing treatment of the remaining dry thin film resist layer is performed by heat-treating the substrate at 170 ° C.

Thereafter, an alkali-resistant dry thin film resist layer was laminated on the wiring pattern side and the polyimide thin film side to a thickness of 25 mu m, and the resist layer surface on the polyimide side of the substrate was masked by a given mask, Exposure and development are performed to form openings having a diameter of 220 μm, and exposed regions of the polyimide thin film are etched to form via holes. Next, the residual resist layer on both sides is removed.

Finally, the bottom surface of the via hole and the surfaces of the bumps are electroplated with gold of approximately 2 μm thickness using a commercial cyanogen type gold plating solution.

The bumps of the bump bonding wiring board obtained by the above processes were found to have a trapezoidal cross-sectional shape when viewed under an optical microscope magnified 400 times. In addition, after performing thermal compression bonding for 30 seconds at a load of 100 gf / bump and a temperature of 300 ° C. on the printed wiring board, it was observed whether the connection between the bump and the wiring was broken by the fracture inspection of the bump bonding wiring board. You can see that no connection is broken.

Comparative Example:

The resist layer is formed by laminating an alkali developing type negative dry thin film resist on the copper foil side of a copper-polyimide substrate, the substrate having a thickness of 30 μm, a width of 35 mm, and a length of 20 cm. It has a copper foil having a thickness of 18㎛ on its surface. Then, the resist layer is masked and exposed and developed by irradiating an ultraviolet beam having an intensity of 200 mJ to form a wiring pattern.

The exposed areas of the copper foil are then etched with an etching solution of copper chloride at a temperature of 45 ° C. to form a wiring pattern, and then the etched resist layer is removed with a thin film.

An argon laser is then irradiated from the polyimide side of the copper-polyimide substrate to form a via hole having a diameter of 50 mu m by exposing the copper foil in the bottom region of the via hole.

After coating and drying the acrylate resin on the side of the wiring pattern as a protective thin film for metal plating, the sulfuric acid type etching solution was used to clean the surface of the copper foil in the bottom area of the via hole, and then use the copper sulfate plating solution. To form a bump by electroplating for 0.5 hour. Thereafter, the acrylate resin protective thin film is dissolved and removed using a ketone type solvent.

In addition, an alkali development type solder resist is printed on the entire surface of the wiring pattern side, which is masked by a specific mask, exposed and developed to provide an opening of 200 mu m, and then the substrate is heat treated to 170 ° C. to solder resist. Remove the layer. And finally, by using a commercial cyanogen type gold plating solution, the openings of the resist layer on the wiring pattern side surfaces and the surfaces of the bumps are electroplated with gold having a thickness of 2 占 퐉.

After the thermocompression bonding was carried out for 30 hours at a load of 100 gf / bump and a temperature of 300 ° C. on the printed wiring board, the connection between the wiring and the bumps was broken by the fracture inspection of the bump bonding wiring board formed by this method. When found, nine of the 832 bumps were found to fail.

As described herein, according to the present invention, since the copper foil is half-etched to form the bump bonding wiring board and then the wiring is formed by etching, the formation of the bumps can be efficiently performed, and further, the bump and the wiring Discontinuous areas of grain boundaries will not occur. In addition, by forming a bump by etching half the copper foil having a flat thickness, it is possible to obtain a wiring board having a small variation in bump height.

Claims (6)

Insulation Layer, A wiring layer having integrated bumps in a desired area and provided on one surface of the insulating layer, and A protective resist layer provided on the surface of the insulating layer in such a manner that the surface of the bumps is exposed Equipped with And a via hole on the other surface of the insulating layer. The bump bonding wiring board according to claim 1, wherein the bump surface and the bottom surface of the via hole are metal plated. The semiconductor element assembled using the bump bonding wiring board of Claim 1 or 2. (a) providing a first resist layer on the surface of the conductive layer provided on one surface of the insulating layer, (b) performing exposure and development, and removing the first resist layer in a region other than the bump forming region, (c) half etching the exposed conductive layer to form a bump, (d) providing a second resist layer over the conductive layer, (e) performing exposure and development, and forming a wiring pattern by etching the exposed conductive layer, (f) providing a protective resist layer over the entire surface of the wiring pattern side surface, (g) performing exposure and development to expose the surface of the bumps and curing the protective resist layer, (h) providing a third resist layer on another surface of the insulating layer, (i) exposing and developing the third resist layer to form an etching pattern, and (j) forming via holes by etching the exposed insulating layer The manufacturing method of the wiring board for bump bonding characterized by the above-mentioned. The method of claim 4, wherein after the exposed insulating layer is etched to form a via hole, the exposed surface of the conductive layer on the bottom surfaces of the via hole and the surfaces of the bump is metal plated. . The said conductive layer is copper, and the said insulating layer is a polyimide film, The manufacturing method of the bump bonding wiring board of Claim 4 or 5 characterized by the above-mentioned.