KR20000003740A - Method for manufacturing liquid crystal display of thin film transistor - Google Patents
Method for manufacturing liquid crystal display of thin film transistor Download PDFInfo
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- KR20000003740A KR20000003740A KR1019980025012A KR19980025012A KR20000003740A KR 20000003740 A KR20000003740 A KR 20000003740A KR 1019980025012 A KR1019980025012 A KR 1019980025012A KR 19980025012 A KR19980025012 A KR 19980025012A KR 20000003740 A KR20000003740 A KR 20000003740A
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
Abstract
Description
본 발명은 박막 트랜지스터 액정표시소자의 제조방법에 관한 것으로, 보다 상세하게는, ITO 금속막의 막 특성을 향상시킬 수 있는 박막 트랜지스터 액정표시소자의 제조방법에 관한 것이다.The present invention relates to a method for manufacturing a thin film transistor liquid crystal display device, and more particularly, to a method for manufacturing a thin film transistor liquid crystal display device capable of improving the film characteristics of an ITO metal film.
일반적으로, 액정표시소자(Liquid Crystal Display : 이하, LCD)는 텔레비젼 및 그래픽 디스플레이 등의 표시장치에 이용된다.In general, liquid crystal displays (hereinafter, LCDs) are used in display devices such as televisions and graphic displays.
특히, 매트릭스 형태로 배열된 각 화소마다 박막 트랜지스터(Thin Film Transistor : 이하, TFT)와 같은 스위칭 소자가 구비되는 액티브 매트릭스형 LCD는 고속 응답 특성을 갖는 잇점과 고화소수에 적합한 잇점 때문에 통상의 디스플레이 장치인 CRT(Cathode Ray Tube)에 필적할만한 표시 화면의 고화질화 및 대형화, 컬러화 등을 실현하고 있다.In particular, an active matrix LCD having a switching element such as a thin film transistor (TFT) for each pixel arranged in a matrix form has a high speed response characteristic and a suitable display for a high pixel number. A display screen that is comparable to a CRT (Cathode Ray Tube) is realized in high quality, large size, and color.
상기한 TFT LCD는 TFT 어레이 및 화소전극이 형성된 하부기판과, 컬러필터 및 상대전극이 형성된 상부기판이 소정 간격을 두고 합착되고, 상기 상·하부기판사이의 공간에는 액정이 봉입된 형태를 이루고 있다.In the TFT LCD, a lower substrate on which a TFT array and a pixel electrode are formed, and an upper substrate on which a color filter and a counter electrode are formed are bonded at a predetermined interval, and a liquid crystal is enclosed in a space between the upper and lower substrates. .
도 1은 종래 기술에 따른 TFT LCD의 하부기판을 도시한 단면도로서, 도시된 바와 같이, 유리기판(1) 상에 게이트 전극(2)이 형성되며, 상기 게이트 전극(2)은 유리기판(1)의 전면에 형성되는 게이트 절연막(3)에 의해 피복된다.1 is a cross-sectional view illustrating a lower substrate of a TFT LCD according to the prior art, and as shown, a gate electrode 2 is formed on a glass substrate 1, and the gate electrode 2 is a glass substrate 1. Is covered by a gate insulating film 3 formed over the entire surface of the substrate.
그리고, 게이트 전극(2) 상부의 게이트 절연막(3) 상에는 패턴의 형태로 반도체층(4)이 형성되며, 이 반도체층(4)의 중심부 상에는 패턴의 형태로 에치 스톱퍼층(5)이 형성된다.The semiconductor layer 4 is formed on the gate insulating film 3 on the gate electrode 2 in the form of a pattern, and the etch stopper layer 5 is formed on the central portion of the semiconductor layer 4 in the form of a pattern. .
또한, 에치 스톱퍼(5) 및 반도체층(4)의 양측면에는 오믹층(6)이 형성되며, 상기 오믹층(6) 상에는 소오스 및 드레인 전극(7A, 7B)이 형성되어 TFT(20)가 구성된다.In addition, an ohmic layer 6 is formed on both sides of the etch stopper 5 and the semiconductor layer 4, and source and drain electrodes 7A and 7B are formed on the ohmic layer 6 to form a TFT 20. do.
다음으로, TFT가 형성된 유리기판 전면 상에 폴리이미드(Polyimide), 레진(Resin), 또는 비씨비(BCB : Benzo Cyclo Butyne) 중에서 선택되는 하나의 유기절연막(8)이 도포되며, 이러한 유기절연막(8) 상에는 화소영역에 해당하는 부분에 ITO(Indium Tin Oxide) 금속으로된 화소전극(9)이 형성된다. 이때, 화소전극(9)은 유기절연막(8) 내에 구비된 콘택홀을 통해 TFT(20)의 드레인 전극(7B)과 콘택된다.Next, one organic insulating film 8 selected from polyimide, resin, or BCB (Benzo Cyclo Butyne) is coated on the entire glass substrate on which the TFT is formed. 8, a pixel electrode 9 made of indium tin oxide (ITO) metal is formed in a portion corresponding to the pixel region. In this case, the pixel electrode 9 is in contact with the drain electrode 7B of the TFT 20 through a contact hole provided in the organic insulating film 8.
상기에서, 유기절연막(8)은 TFT 어레이 기판, 즉, 하부기판의 평탄화를 확보하기 때문에 후속 공정인 배향막 형성 공정을 용이하게 실시할 수 있게 하며, 아울러, 상·하부기판간의 셀 갭을 균일하게 만들기 때문에 TFT LCD의 표시품위를 향상시키게 된다.In the above, since the organic insulating film 8 ensures flattening of the TFT array substrate, that is, the lower substrate, it is possible to easily perform the subsequent step of forming the alignment film, and to uniformly uniform the cell gap between the upper and lower substrates. This improves the display quality of TFT LCDs.
그러나, 상기와 같은 화소전극은 유기절연막 상에 무기물인 ITO 금속을 고온 또는 저온에서 증착한 후에 이를 패터닝하여 형성하게 되는데, 이때, 유기절연막과 ITO 금속막간의 계면 부조화로 인하여 ITO 금속막의 막 특성이 불량해지며, 이는 ITO 금속막의 식각 불균일성을 초래하게 됨으로써, 상기 ITO 금속막에 대한 미세 패턴의 형성이 곤란한 문제점이 있었다.However, the pixel electrode is formed by depositing an inorganic ITO metal on the organic insulating film at a high temperature or a low temperature and then patterning it. In this case, the film characteristics of the ITO metal film are poor due to the interface mismatch between the organic insulating film and the ITO metal film. It becomes poor, which results in etching nonuniformity of the ITO metal film, which makes it difficult to form a fine pattern for the ITO metal film.
자세하게, 유기절연막 상에 ITO 금속막을 형성하기 위하여 고온 공정을 실시할 경우에는 유기절연막의 사이드 체인인 C, H 성분의 분해가 발생되기 때문에 ITO 금속의 성막 분위기의 오염을 유발시켜 ITO 금속막의 막 특성이 불량해지며, 아울러, 유기절연막과 ITO 금속막 사이에 인터-레이어(Inter-layer)가 형성되는 것으로 인하여 상기 ITO 금속막의 식각시에 인터-레이어로 식각 에천트가 침투되어 언더-컷(Under-cut)과 같은 식각 불균일 현상이 발생된다.In detail, when a high temperature process is performed to form an ITO metal film on the organic insulating film, decomposition of C and H components, which are side chains of the organic insulating film, occurs, causing contamination of the film forming atmosphere of the ITO metal, thereby causing film characteristics of the ITO metal film. In addition, due to the formation of an inter-layer between the organic insulating film and the ITO metal film, the etching etchant penetrates into the inter-layer during the etching of the ITO metal film, thereby causing under-cutting. Etch non-uniformity such as -cut) occurs.
반면에, 저온 공정일 경우에는 유기절연막과의 계면 특성은 향상되지만, 비정질 상태의 ITO 금속막이 형성되기 때문에 식각 균일성 및 적절한 저항값을 얻기가 어렵다.On the other hand, in the low temperature process, the interface property with the organic insulating film is improved, but since the ITO metal film in the amorphous state is formed, it is difficult to obtain an etching uniformity and an appropriate resistance value.
또한, 상기한 공정을 통해 형성된 ITO 금속막의 식각시에는 균일한 형태의 패턴을 형성하기가 어려운 것은 물론 심한 경우에는 ITO 금속막이 유기절연막으로부터 피링 오프(Peeling-Off)되는 현상이 발생하게 된다.In addition, when etching the ITO metal film formed through the above-described process, it is difficult to form a uniform pattern, and in severe cases, the ITO metal film may be peeled off from the organic insulating film.
이에 따라, 종래에는 유기절연막 상에 ITO 금속을 저온에서 증착한 후에 고온 어닐링 공정을 실시하여 ITO 금속막을 형성하고 있으나, 이 경우에는 어닐링 공정이 추가로 실시되어야 하기 때문에 공정이 복잡한 문제점이 있었다.Accordingly, in the related art, an ITO metal film is formed by depositing ITO metal on an organic insulating film at a low temperature and then performing a high temperature annealing process. However, in this case, the annealing process needs to be additionally performed.
따라서, 상기와 같은 문제점을 해결하기 위하여 안출된 본 발명은, 단순한 공정으로도 ITO 금속막의 미세 패턴 형성을 용이하게 실시할 수 있는 TFT LCD의 제조방법을 제공하는데, 그 목적이 있다.Accordingly, an object of the present invention is to provide a method for manufacturing a TFT LCD which can easily form a fine pattern of an ITO metal film even with a simple process.
도 1은 종래 기술에 따른 박막 트랜지스터 액정표시소자의 하부기판을 도시한 단면도.1 is a cross-sectional view showing a lower substrate of a thin film transistor liquid crystal display device according to the prior art.
도 2a 내지 도 2c는 본 발명의 실시예에 따른 박막 트랜지스터 액정표시소자의 제조방법을 설명하기 위한 공정 단면도.2A to 2C are cross-sectional views illustrating a method of manufacturing a thin film transistor liquid crystal display device according to an exemplary embodiment of the present invention.
(도면의 주요 부분에 대한 부호의 설명)(Explanation of symbols for the main parts of the drawing)
21 : 유리기판 22 : 드레인 전극21 glass substrate 22 drain electrode
24 : 유기절연막 26a : 제1 ITO 금속막24: organic insulating film 26a: first ITO metal film
26b : 제2 ITO 금속막 28 : 화소전극26b: second ITO metal film 28: pixel electrode
30 : 박막 트랜지스터30: thin film transistor
상기와 같은 목적을 달성하기 위한 본 발명의 TFT LCD의 제조방법은, 상부면 적소에 TFT가 형성된 유리기판을 제공하는 단계; 상기 TFT가 형성된 유리기판 전면 상에 유기절연막을 도포하는 단계; 상기 유기절연막의 소정 부분에 상기 TFT의 일부분을 노출시키는 콘택홀을 형성하는 단계; 상기 유기절연막 상에 저온 공정으로 소정 두께의 제1 ITO 금속막을 증착하는 단계; 상기 제1 ITO 금속막 상에 고온 공정으로 소정 두께의 제2 ITO 금속막을 증착하는 단계; 및 상기 제2 및 제1 ITO 금속막들을 식각하여 화소전극을 형성하는 단계를 포함해서 이루어진 것을 특징으로 한다.According to one aspect of the present invention, there is provided a method of manufacturing a TFT LCD, including: providing a glass substrate having a TFT formed on an upper surface; Coating an organic insulating film on the entire glass substrate on which the TFT is formed; Forming a contact hole exposing a portion of the TFT in a predetermined portion of the organic insulating film; Depositing a first ITO metal film having a predetermined thickness on the organic insulating film by a low temperature process; Depositing a second ITO metal film having a predetermined thickness on the first ITO metal film by a high temperature process; And etching the second and first ITO metal layers to form a pixel electrode.
본 발명에 따르면, 유기절연막과 ITO 금속막간의 계면 특성을 향상시킬 수 있기 때문에 ITO 금속막에 대한 미세 패턴의 형성이 가능하다.According to the present invention, since the interface property between the organic insulating film and the ITO metal film can be improved, it is possible to form a fine pattern for the ITO metal film.
이하, 첨부한 도면에 의거하여 본 발명의 바람직한 실시예를 보다 상세하게 설명하도록 한다.Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.
도 2a 내지 도 2c는 본 발명의 실시예에 따른 TFT LCD의 제조방법을 설명하기 위한 단면이다. 먼저, 도 2a에 도시된 바와 같이, 공지된 공정을 통해 유리기판(21)의 적소에 TFT(30)를 형성하고, 상기 TFT(30)가 덮혀지도록 유리기판(21) 전면 상에 저유전상수를 갖는 유기절연막(24), 예를 들어, 폴리이미드, 레진 또는 BCB 중에서 선택되는 하나를 도포한다.2A to 2C are cross-sectional views illustrating a method of manufacturing a TFT LCD according to an embodiment of the present invention. First, as shown in FIG. 2A, a TFT 30 is formed in place of the glass substrate 21 through a known process, and a low dielectric constant is formed on the entire surface of the glass substrate 21 so that the TFT 30 is covered. An organic insulating film 24 having, for example, one selected from polyimide, resin or BCB is applied.
그런 다음, 공지된 공정을 통해 유기절연막(24)의 소정 부분을 식각하여 TFT(30)의 드레인 전극(22)을 노출시키는 콘택홀(25)을 형성한다.Then, a predetermined portion of the organic insulating film 24 is etched through a known process to form a contact hole 25 exposing the drain electrode 22 of the TFT 30.
다음으로, 도 2b에 도시된 바와 같이, 유기절연막(24) 상에 제1 ITO 금속막(26a)을 증착하고, 이어서, 상기 제1 ITO 금속막(26a) 상에 제2 ITO 금속막(26a)을 연속적으로 증착한다. 이때, 제1 ITO 금속막(26a)은 유기절연막(24)과의 계면 특성을 고려하여 15 내지 150℃의 저온에서 증착하며, 그 두께는 종래 화소전극의 전체 두께 보다는 작은 100 내지 200Å 정도로 한다. 또한, 제2 ITO 금속막(26b)은 200 내지 300℃의 고온 공정으로 증착하며, 그 두께는 600 내지 1,500Å 정도로 한다.Next, as shown in FIG. 2B, a first ITO metal film 26a is deposited on the organic insulating film 24, and then a second ITO metal film 26a is formed on the first ITO metal film 26a. ) Is deposited successively. At this time, the first ITO metal film 26a is deposited at a low temperature of 15 to 150 ° C. in consideration of the interface property with the organic insulating film 24, and the thickness thereof is about 100 to 200 microseconds smaller than the total thickness of the conventional pixel electrode. Further, the second ITO metal film 26b is deposited by a high temperature process of 200 to 300 ° C., and its thickness is about 600 to 1,500 kPa.
이후, 도 2C에 도시된 바와 같이, 제2 및 제1 ITO 금속막(26b, 26a)을 동시에 식각하여 유기절연막(24) 상에 TFT(30)의 드레인(22)과 콘택되는 화소전극(28)을 형성한다.Subsequently, as illustrated in FIG. 2C, the pixel electrode 28 which contacts the drain 22 of the TFT 30 on the organic insulating film 24 by simultaneously etching the second and first ITO metal films 26b and 26a. ).
본 발명의 실시예에 따른 제1 ITO 금속막은 저온 공정을 통해 형성되기 때문에 유기절연막과의 계면 특성은 우수하지만, 비정질 상태로 형성되기 때문에 후속의 어닐링 공정을 필요로하게 된다. 그런데, 이러한 제1 ITO 금속막 상에 고온 공정을 통해 제2 ITO 금속막을 연속적으로 증착하게 되면, 상기 제2 ITO 금속막의 증착 공정이 진행되는 동안 상기 제1 ITO 금속막에 대한 어닐링이 더불어 실시되기 때문에 별도의 어닐링 없이도 양질의 ITO 금속막을 형성할 수 있게 된다.Since the first ITO metal film according to the embodiment of the present invention is formed through a low temperature process, the interface property with the organic insulating film is excellent, but since it is formed in an amorphous state, a subsequent annealing process is required. However, when the second ITO metal film is continuously deposited on the first ITO metal film through a high temperature process, annealing of the first ITO metal film may be performed while the deposition process of the second ITO metal film is performed. Therefore, a high quality ITO metal film can be formed without a separate annealing.
한편, 제2 ITO 금속막의 경우에는 동일한 재질인 ITO 금속막 상에 증착되기 때문에 유기절연막 상에 형성할 경우에 발생되는 문제들은 발생되지 않으며, 이 또한 양질의 ITO 금속막을 형성할 수 있게 된다.On the other hand, since the second ITO metal film is deposited on the ITO metal film of the same material, problems caused when formed on the organic insulating film do not occur, and it is also possible to form a high quality ITO metal film.
따라서, 제1 및 제 2 ITO 금속막으로 이루어진 ITO 금속막은 유기절연막과의 계면 부조화로 인한 막 특성 저하가 발생되지 않기 때문에 그의 식각시에 식각 불균일이 발생되지 않으며, 이에 따라, ITO 금속막의 막 특성 향상에 기인하여 상기 ITO 금속막의 식각 균일도를 향상시킬 수 있게 된다.Accordingly, since the ITO metal film formed of the first and second ITO metal films does not cause a decrease in film properties due to interface mismatch with the organic insulating film, no etching unevenness occurs during etching thereof, and thus, the film properties of the ITO metal film Due to the improvement, the etching uniformity of the ITO metal film can be improved.
그러므로, ITO 금속막에 대한 미세 패턴 형성이 용이하게 이루어지기 때문에 고품위 TFT LCD의 제조가 가능하게 된다.Therefore, since fine pattern formation with respect to an ITO metal film is made easy, it becomes possible to manufacture high quality TFT LCD.
이상에서와 같이, 본 발명은 유기절연막 상에 저온 공정을 통해 1차적으로 ITO 금속막을 형성한 후에 연속적으로 고온 공정을 통해 원하는 두께 만큼의 ITO 금속막을 더 형성함으로써 상기 ITO 금속막의 막 특성을 향상시킬 수 있으며, 상기 ITO 금속막의 막 특성의 향상에 기인하여 미세 패턴의 형성이 가능해지기 때문에 고품위 TFT LCD를 제작할 수 있게 된다.As described above, the present invention improves the film properties of the ITO metal film by forming an ITO metal film on the organic insulating film primarily through a low temperature process and subsequently forming an ITO metal film of a desired thickness through a high temperature process. It is possible to form a fine pattern due to the improvement of the film properties of the ITO metal film, thereby making it possible to manufacture a high quality TFT LCD.
한편, 여기에서는 본 발명의 특정 실시예에 대하여 설명하고 도시하였지만, 당업자에 의하여 이에 대한 수정과 변형을 할 수 있다. 따라서, 이하, 특허청구의 범위는 본 발명의 진정한 사상과 범위에 속하는 한 모든 수정과 변형을 포함하는 것으로 이해할 수 있다.Meanwhile, although specific embodiments of the present invention have been described and illustrated, modifications and variations can be made by those skilled in the art. Accordingly, the following claims are to be understood as including all modifications and variations as long as they fall within the true spirit and scope of the present invention.
Claims (5)
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| Publication number | Priority date | Publication date | Assignee | Title |
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| KR20030021378A (en) * | 2001-09-05 | 2003-03-15 | 주식회사 현대 디스플레이 테크놀로지 | Metnod for manufacturing liquid crystal display panel |
| KR100759979B1 (en) * | 2001-07-20 | 2007-09-18 | 삼성전자주식회사 | a manufacturing method of a liquid crystal display substrate and a forming method of ITOindium tin oxide layer for the same |
| KR20140082425A (en) * | 2012-12-24 | 2014-07-02 | 엘지디스플레이 주식회사 | Array substrate for liquid crystal display device and method for fabricating the same |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| KR100759979B1 (en) * | 2001-07-20 | 2007-09-18 | 삼성전자주식회사 | a manufacturing method of a liquid crystal display substrate and a forming method of ITOindium tin oxide layer for the same |
| KR20030021378A (en) * | 2001-09-05 | 2003-03-15 | 주식회사 현대 디스플레이 테크놀로지 | Metnod for manufacturing liquid crystal display panel |
| KR20140082425A (en) * | 2012-12-24 | 2014-07-02 | 엘지디스플레이 주식회사 | Array substrate for liquid crystal display device and method for fabricating the same |
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