KR19990048366A - Manufacturing method of thin film transistor substrate for liquid crystal display device - Google Patents

Manufacturing method of thin film transistor substrate for liquid crystal display device Download PDF

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KR19990048366A
KR19990048366A KR1019970067030A KR19970067030A KR19990048366A KR 19990048366 A KR19990048366 A KR 19990048366A KR 1019970067030 A KR1019970067030 A KR 1019970067030A KR 19970067030 A KR19970067030 A KR 19970067030A KR 19990048366 A KR19990048366 A KR 19990048366A
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color filter
thin film
film transistor
gate
liquid crystal
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KR1019970067030A
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Korean (ko)
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KR100560972B1 (en
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김상갑
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윤종용
삼성전자 주식회사
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G02F1/13458—Terminal pads
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits

Abstract

투명한 절연 기판 위에 게이트 전극 및 공통 게이트선을 형성하고 그 위에 게이트 절연막과 반도체층을 차례로 적층한 뒤 패터닝한다. 그 위에 금속층을 적층하여 소스 및 드레인 전극을 형성하고, 그 위에 드레인 전극의 일부를 노출시키는 접촉 구멍을 갖는 보호막을 형성한다. 그 위에 컬러 필터와 ITO층을 차례로 도포한 후, 동시에 패터닝하여 드레인 전극과 접촉하는 화소 전극과 컬러 필터를 형성한다.A gate electrode and a common gate line are formed on the transparent insulating substrate, and the gate insulating film and the semiconductor layer are sequentially stacked thereon, and then patterned. A metal layer is laminated thereon to form source and drain electrodes, and a protective film having contact holes for exposing a portion of the drain electrode is formed thereon. The color filter and the ITO layer are sequentially applied thereon, and then patterned at the same time to form the pixel electrode and the color filter in contact with the drain electrode.

이와 같은 박막 트랜지스터 기판의 제조 방법에서는, ITO 화소 전극과 컬러 필터를 동시에 같은 마스크로 형성하여 전 공정에서, 사용되는 마스크의 수를 줄일 수 있다.In such a method of manufacturing a thin film transistor substrate, the ITO pixel electrode and the color filter are simultaneously formed with the same mask, so that the number of masks used in the entire process can be reduced.

Description

액정 표시 장치용 박막 트랜지스터 기판의 제조 방법Manufacturing method of thin film transistor substrate for liquid crystal display device

본 발명은 액정 표시 장치에 관한 것으로서, 더욱 상세하게는 액정 표시 장치용 박막 트랜지스터 기판의 제조 방법에 관한 것이다.The present invention relates to a liquid crystal display device, and more particularly, to a method for manufacturing a thin film transistor substrate for a liquid crystal display device.

액정 표시 장치의 제조 방법에는 여러 가지가 있으며, 공정 수에 따라 다수의 마스크(mask)를 사용하여 제작된다.There are various methods of manufacturing the liquid crystal display device, and are manufactured using a plurality of masks depending on the number of steps.

그러면, 종래 기술에 따른 액정 표시 장치용 박막 트랜지스터 기판의 구조에 대하여 설명한다.Next, the structure of the thin film transistor substrate for liquid crystal display devices according to the prior art will be described.

투명한 절연 기판 위에 게이트 전극이 형성되어 있고, 그 위에 게이트 절연막이 형성되어 있으며, 게이트 절연막 위에는 비정질 규소층 및 그 상부의 도핑된 비정질 규소층이 형성되어 있다. 그 위에는 게이트 전극을 중심으로 양쪽으로 소스 및 드레인 전극이 형성되어 있고, 그 위에는 드레인 전극을 노출시키는 접촉 구멍을 가지고 있는 보호막이 형성되어 있으며, 보호막 위에는 접촉 구멍을 통하여 드레인 전극과 연결되는 ITO 화소 전극이 형성되어 있다.A gate electrode is formed on the transparent insulating substrate, a gate insulating film is formed thereon, and an amorphous silicon layer and a doped amorphous silicon layer thereon are formed on the gate insulating film. Source and drain electrodes are formed on both sides of the gate electrode, and a protective film having a contact hole exposing the drain electrode is formed thereon, and an ITO pixel electrode connected to the drain electrode through the contact hole on the protective film. Is formed.

위와 같은 구조를 갖는 박막 트랜지스터 기판의 제조 공정은 게이트 패턴 형성, 반도체 패턴 형성, 데이터 패턴 형성, 보호막 형성 및 화소 전극 형성의 과정으로 5매의 마스크를 사용하여 진행된다.The manufacturing process of the thin film transistor substrate having the above structure is performed using five masks in the process of forming a gate pattern, forming a semiconductor pattern, forming a data pattern, forming a protective film, and forming a pixel electrode.

그러나, 원가 절감과 공정의 단순화를 위하여 더 적은 수의 마스크를 사용하는 것이 바람직하다.However, it is desirable to use fewer masks to reduce costs and simplify the process.

본 발명은 이러한 문제점을 해결하기 위하여, 적은 수의 마스크를 사용하는 액정 표시 장치용 박막 트랜지스터 기판의 제조 방법을 제공하는 것이다.In order to solve this problem, the present invention provides a method for manufacturing a thin film transistor substrate for a liquid crystal display device using a small number of masks.

도 1은 본 발명에 실시예에 따른 액정 표시 장치용 박막 트랜지스터 기판의 박막 트랜지스터 부분을 도시한 단면도이고,1 is a cross-sectional view showing a thin film transistor portion of a thin film transistor substrate for a liquid crystal display according to an embodiment of the present invention;

도 2 내지 도 5는 본 발명의 실시예에 따른 액정 표시 장치용 박막 트랜지스터 기판의 제조 방법을 순서에 따라 도시한 단면도이다.2 to 5 are cross-sectional views sequentially illustrating a method of manufacturing a thin film transistor substrate for a liquid crystal display according to an exemplary embodiment of the present invention.

본 발명은 이러한 문제점을 해결하기 위하여 ITO층 위에 컬러 필터를 도포한 후, 청, 적, 녹색의 컬러 필터를 ITO 층과 같이 화소 단위로 패터닝하여 형성한다. 이렇게 컬러 필터와 화소 전극을 동시에 패터닝하여 형성함으로써, 2개의 마스크를 사용하지 않고 1개의 마스크만으로 화소 전극과 컬러 필터를 형성할 수 있어 1회의 사진 현상 공정을 줄임으로써, 전 공정에서 볼 때, 사용되는 마스크의 수를 줄일 수 있고, 따라서, 원가 절감 및 공정을 단순화할 수 있다.In order to solve this problem, the present invention is formed by applying a color filter on the ITO layer, and then patterning the blue, red, and green color filters by pixel unit like the ITO layer. By patterning and forming the color filter and the pixel electrode at the same time, it is possible to form the pixel electrode and the color filter with only one mask without using two masks. The number of masks to be reduced can be reduced, thereby reducing costs and simplifying the process.

그러면, 본 발명에 따른 실시예에 대하여 본 발명이 속하는 기술 분야에서 통상의 지식을 가진 자가 용이하게 실시할 수 있도록 상세히 설명한다.Then, embodiments according to the present invention will be described in detail so that those skilled in the art can easily carry out the embodiments.

도 1은 본 발명의 실시예에 따른 액정 표시 장치용 박막 트랜지스터 기판의 박막 트랜지스터 부분을 도시한 단면도이다.1 is a cross-sectional view illustrating a thin film transistor portion of a thin film transistor substrate for a liquid crystal display according to an exemplary embodiment of the present invention.

먼저, 도 1을 참고로 하여 본 발명의 실시예에 따른 액정 표시 장치용 박막 트랜지스터 기판의 구조에 대하여 설명한다.First, a structure of a thin film transistor substrate for a liquid crystal display according to an exemplary embodiment of the present invention will be described with reference to FIG. 1.

투명한 절연 기판(1) 위에 게이트 전극(2)이 형성되어 있고, 그 위에 게이트 절연막(3)이 형성되어 있다. 게이트 전극(2) 상부의 게이트 절연막(3) 위에는 비정질 규소층(4)이 형성되어 있으며 그 위에는 게이트 전극(2)을 사이에 두고 양쪽으로 도핑된 비정질 규소층(5)이 형성되어 있다. 그 위에는 게이트 전극(2)을 사이에 두고 소스 및 드레인 전극(6, 7)이 형성되어 있다. 그 위에는 드레인 전극(7)의 일부를 노출시키는 접촉 구멍(C)을 갖는 보호막(8)이 형성되어 있고 그 위에는 화소 전극(9)과 컬러 필터(10)가 같은 패턴으로 차례로 형성되어 있다.The gate electrode 2 is formed on the transparent insulating substrate 1, and the gate insulating film 3 is formed thereon. An amorphous silicon layer 4 is formed on the gate insulating film 3 on the gate electrode 2, and an amorphous silicon layer 5 doped on both sides with the gate electrode 2 therebetween is formed. On it, source and drain electrodes 6 and 7 are formed with the gate electrode 2 interposed therebetween. A protective film 8 having a contact hole C exposing a part of the drain electrode 7 is formed thereon, and the pixel electrode 9 and the color filter 10 are sequentially formed on the same pattern.

도시하지 않은 게이트 패드 부분과 데이터 패드 부분에는 ITO 화소 전극과 컬러 필터가 데이터선의 일부분을 덮으며 같은 패턴으로 형성되어 있다.In the gate pad portion and the data pad portion (not shown), the ITO pixel electrode and the color filter cover a portion of the data line and are formed in the same pattern.

그러면, 이와 같은 구조의 박막 트랜지스터 기판을 제조하는 방법에 도면을 참고로 설명한다.Next, a method of manufacturing a thin film transistor substrate having such a structure will be described with reference to the drawings.

도 2a 내지 5b는 본 발명의 실시예에 따른 액정 표시 장치용 박막 트랜지스터 기판을 제조하는 방법을 순서대로 도시한 단면도이다.2A through 5B are cross-sectional views sequentially illustrating a method of manufacturing a thin film transistor substrate for a liquid crystal display according to an exemplary embodiment of the present invention.

먼저, 도 2a 및 2b에 도시한 바와 같이, 투명한 절연 기판 위에 첫 번째 마스크를 사용하여 게이트 전극(2), 게이트 패드(도시하지 않음)를 포함하는 게이트 배선(10)을 패턴 형성한다. 그 위에 게이트 절연막(3), 비정질 규소층(4) 및 도핑된 비정질 규소층(5)으로 이루어진 반도체층을 차례로 적층하고, 두 번째 마스크를 사용하여 비정질 규소층(4)과 도핑된 비정질 규소층(5)을 패터닝하여 도 4a 및 4b에 도시한 것처럼, 비정질 규소층(4)이 게이트 전극을 포함한 게이트선의 일부분만 덮도록 형성한다. 다음, 그 위에 금속층을 적층한 후, 도 4a 내지 4b에서 볼 수 있듯이, 세 번째 마스크를 사용하여 소스 및 드레인 전극(6, 7)을 포함하는 데이터 배선(30)을 형성한 후, 노출된 도핑된 비정질 규소층(5)을 식각한다. 그 위에 보호막(8)을 적층하고 네 번째 마스크를 사용하여 드레인 전극(7)의 일부가 드러나는 접촉 구멍(C)을 갖도록 패턴 형성한다. 그 위에 ITO층과 컬러 필터를 차례로 증착하고 도 5a 내지 5b에 도시한 것처럼, 다섯 번째 마스크로 패터닝하여 접촉 구멍(C)을 통하여 드레인 전극(7)과 연결되는 화소 전극(9)과 컬러 필터(10)를 동시에 형성한다. 이 때, 청, 적, 녹색의 컬러 필터는 화소 단위로 패턴 형성하고 도시하지 않은 게이트 패드와 데이터 패드 부분은 ITO층과 컬러 필터에 의해 일부분만 덮이도록 형성한다.First, as shown in FIGS. 2A and 2B, a gate wiring 10 including a gate electrode 2 and a gate pad (not shown) is patterned using a first mask on a transparent insulating substrate. A semiconductor layer composed of a gate insulating film 3, an amorphous silicon layer 4, and a doped amorphous silicon layer 5 is sequentially stacked thereon, and the amorphous silicon layer 4 and the doped amorphous silicon layer are formed using a second mask. (5) is patterned so that the amorphous silicon layer 4 covers only a part of the gate line including the gate electrode as shown in Figs. 4A and 4B. Next, after laminating a metal layer thereon, as shown in FIGS. 4A to 4B, the data line 30 including the source and drain electrodes 6 and 7 is formed using a third mask, and then exposed doping. The amorphous silicon layer 5 is etched. A protective film 8 is laminated thereon and a fourth mask is used to form a pattern so as to have a contact hole C in which a part of the drain electrode 7 is exposed. The ITO layer and the color filter are sequentially deposited thereon, and as shown in FIGS. 5A to 5B, the pixel electrode 9 and the color filter (patterned with a fifth mask and connected to the drain electrode 7 through the contact hole C) 10) are formed simultaneously. At this time, the blue, red, and green color filters are patterned in pixel units, and the gate pad and data pad portions (not shown) are formed so as to cover only a part of the ITO layer and the color filter.

이와 같이, 컬러 필터(10) 형성 공정과 ITO 화소 전극(9) 형성 공정을 1회의 사진 식각 공정으로 함께 진행함으로써, 사용되는 마스크의 수를 줄일 수 있다..As described above, the number of masks used can be reduced by performing the color filter 10 forming process and the ITO pixel electrode 9 forming process together in one photolithography process.

위에서 언급한 바와 같이, ITO층 상부에 컬러 필터를 도포한 후, 화소 전극과 컬러 필터를 동시에 패턴 형성함으로써, 사용되는 마스크의 수를 줄일 수 있고, 따라서, 생산 원가를 절감할 수 있으며, 공정을 단순화할 수 있다.As mentioned above, by applying the color filter on the ITO layer and then patterning the pixel electrode and the color filter simultaneously, the number of masks used can be reduced, thus reducing the production cost and the process. Can be simplified.

Claims (4)

투명한 절연 기판 위에 게이트 전극, 게이트 패드 및 게이트선을 형성하는 단계,Forming a gate electrode, a gate pad, and a gate line on the transparent insulating substrate, 게이트 절연층과 반도체층을 적층하는 단계,Stacking the gate insulating layer and the semiconductor layer, 상기 반도체층을 패터닝하는 단계,Patterning the semiconductor layer, 소스, 드레인 전극 및 데이터 패드를 포함하는 데이터 배선을 형성하는 단계,Forming a data line comprising a source, a drain electrode and a data pad, 상기 반도체층을 식각하는 단계,Etching the semiconductor layer; 보호막을 형성하는 단계,Forming a protective film, ITO 화소 전극과 컬러 필터를 형성하는 단계Forming a color filter with the ITO pixel electrode 를 포함하며,Including; ITO 화소 전극과 컬러 필터를 동시에 패터닝하여 형성하는 단계Patterning and forming the ITO pixel electrode and the color filter at the same time 를 포함하는 액정 표시 장치용 박막 트랜지스터의 제조 방법.Method of manufacturing a thin film transistor for a liquid crystal display device comprising a. 제1항에서,In claim 1, 상기 컬러 필터는 청, 적, 녹색의 화소 단위로 패터닝하여 형성하는 박막 트랜지스터 기판의 제조 방법.The color filter is a method of manufacturing a thin film transistor substrate formed by patterning the pixel unit of blue, red, green. 제2항의 방법으로 제조된 박막 트랜지스터 액정 표시 장치.A thin film transistor liquid crystal display manufactured by the method of claim 2. 제3항에서,In claim 3, 상기 게이트 패드 및 데이터 패드는 ITO 화소 전극과 컬러 필터가 일부분만 덮도록 형성된 박막 트랜지스터 액정 표시 장치.The gate pad and the data pad are formed to cover only a portion of the ITO pixel electrode and the color filter.
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KR100628039B1 (en) * 2000-04-07 2006-09-27 엘지.필립스 엘시디 주식회사 X-ray detecter and a method for fabricating the same
KR100806890B1 (en) * 2001-06-26 2008-02-22 삼성전자주식회사 Thin film transistor and fabricating method thereof
KR100816334B1 (en) * 2001-08-24 2008-03-24 삼성전자주식회사 thin film transistor array panel for liquid crystal display and manufacturing method thereof
KR101492106B1 (en) * 2008-11-25 2015-02-11 삼성디스플레이 주식회사 Liquid crystal display device and manufacturing method thereof

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JPH05257137A (en) * 1992-03-13 1993-10-08 Nec Corp Color liquid crystal display device
JPH06186544A (en) * 1992-12-22 1994-07-08 Matsushita Electric Ind Co Ltd Reflection type liquid crystal display device
JPH07134290A (en) * 1993-11-12 1995-05-23 Toshiba Corp Liquid crystal display device and its production
JP3305085B2 (en) * 1993-12-03 2002-07-22 キヤノン株式会社 Liquid crystal display

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KR100628039B1 (en) * 2000-04-07 2006-09-27 엘지.필립스 엘시디 주식회사 X-ray detecter and a method for fabricating the same
KR100806890B1 (en) * 2001-06-26 2008-02-22 삼성전자주식회사 Thin film transistor and fabricating method thereof
KR100816334B1 (en) * 2001-08-24 2008-03-24 삼성전자주식회사 thin film transistor array panel for liquid crystal display and manufacturing method thereof
KR101492106B1 (en) * 2008-11-25 2015-02-11 삼성디스플레이 주식회사 Liquid crystal display device and manufacturing method thereof

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