KR19990041653A - How to test the standby side of the electronic switchboard - Google Patents

Abstract

The present invention relates to the standby processor test method of the electronic switch, and if the redundant board is normal by the standby side test request from the man & machine communication port and the active side / standby side redundancy state request from the active side, In order to prevent over-writing from the active side to the standby side, the redundancy mode is cut using the redundancy related register, and then a test command is sent to the standby side, and the active side performs the original function of the processor. It can check the interlocking status conveniently and take safe measures, and it can effectively prevent serious obstacles that may occur in the course of action during system operation.

Description

How to test the standby side of the electronic switchboard

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a full electronic telephone exchange, and more particularly, to a standby side processor test method of an all electronic exchanger capable of confirming a function of a standby side processor board.

In general, electronic switchboards require that all upper and lower processors and the physical layer have basically been set-up completed, the operating system started up, and operated for a long time without any special faults. In case of a distributed system that needs to be operated for a long time due to the repair of the lower processor, whenever the various faults and failures occur, check the board abnormality and replace the board with various functions of the processor board. We want to confirm quickly and accurately and take corrective action.

In the simple test process of the standby side processor board among the upper / lower processors mounted in the conventional electronic switchboard, the system does not undergo the interlocking test, and the system interworking is not possible by actually mounting the system inside the electronic switchboard.

Therefore, after the system is mounted inside the electronic switchboard, when the system is interlocked, the processor internal boards with the replacement timeout and the abnormality occurred when the other boards are applied or replaced with other boards may be remotely installed. There was an inefficient problem that should be taken and checked for abnormalities.

The present invention has been made to solve such a problem, the object of the present invention is to check the exact cause by checking the system itself in the event of a standby processor failure inside the switch, or in the event of a failure to apply another spare board, In order to prevent failure errors by interlocking each function, and to provide fast and accurate hardware replacement, a standby processor test method of an electronic switch is provided.

The present invention for achieving the above object relates to the standby side processor test method of the electronic switch, comprising: receiving a standby side test request from the man & machine communication port; Confirming an active side / standby side redundancy state from the active side; Checking the active side / standby side redundancy state and determining whether the redundancy state is normal; If the duplication state is abnormal, outputting an error message; If the redundancy state is normal, cutting off the redundancy mode using a redundancy related register to prevent over-writing from the active side to the standby side; After the redundant board is cut off, the standby side test command is sent to the standby side, and the active side includes performing the processor original function.

1 is an overall block diagram of a standby side processor test method of an electronic switching system according to the present invention;

2 is a detailed detailed flowchart for performing a standby side test function in an all-electronic exchange according to the present invention;

3 is a detailed detailed flowchart of a method of collecting standby test results from an active processor;

4 is a detailed detailed flowchart of a method of performing a standby side test function by an active side request;

Fig. 5 is a detailed detailed flowchart of the recovery request from the active side to the standby side, which is the opposite side, to the normal standby side.

<Description of Symbols for Main Parts of Drawings>

10: IPC section 20-0 to 20-n: MP0 section to MPn section

30: maintenance processor 32: DKU unit

34: RDKU section 36: CTU section

38: MTU part 40: MMC port part

50: EXIP part 60-0 to 60-n: TP0 part to TPn part

Hereinafter, the objects and features of the present invention will be described in more detail with reference to the accompanying drawings so that the objects and features of the present invention can be more clearly understood.

1 is a block diagram of a standby processor test method of an electronic switching system according to the present invention, which includes an internal processor communication unit (hereinafter referred to as IPC) unit 10 and a main processor (hereinafter referred to as “main processor”). 0 to MPn (20-0 to 20-n), maintenance processor 30, hard disk unit (hereinafter referred to as DKU) section 32, Removable Disc Unit (hereinafter referred to as RDKU) section 34, Cartridge Tape Unit (hereinafter referred to as CTU) section 36, and Magnetic Tape Unit (hereinafter referred to as "CTU"). MTU abbreviation) 38, Man & Machine Communication (hereinafter referred to as MMC) port portion 40, Ethernet X.25 Interface Processor (EXIP) D) 50 and a telephony processor (abbreviated to TP) 0 to TPn (60-0 to 60-n).

The IPC unit 10 is an indispensable communication means in the electronic switch processor. The IPC unit 10 transmits / receives local, loop-back and external IPCs, and maintains a plurality of MP0 to MPn units (20-0 to 20-n). It is a block that enables processor communication between the maintenance processor 30, the EXIP unit 50, and the plurality of TP0 to TPn units 60-0 to 60-n.

The MP0 to MPn sections (20-0 to 20-n) are composed of an active / standby side redundancy structure using concurrent writing (concurrent writing). If a serious failure occurs on the active side, the standby side immediately loses service. Since it is performed immediately after the active side without the active side, the service is guaranteed without loss of online service, and many main processors are basically digital signal processor assembly board (hereinafter, abbreviated as DSPA). 211, DSPA212 (maintenance processor) can be operated in conjunction, IPC, memory, timer test functions are common, SCSI, MMC (DSPA212) function is a block that can be installed separately depending on the characteristics of the processor.

Here, in the concurrent writing method, all memory write cycles performed on the active side must be written to the standby side memory when the redundancy mode is set, but the hardware is used to complete one cycle. If the mode is not set, the other memory is not written at all, and only the self memory is written.

The maintenance processor 30 operates for hardware test and operation system initialization, loading according to the processor operating mode, and software initialization for normal operation, and is a processor configured in an active / standby side redundant structure. Maintenance is carried out using a small computer system interface (hereinafter, abbreviated as SCSI) bus between the unit 32, the RDKU unit 34, the CTU unit 36, and the MTU unit 38. And a processor block that performs IPC, timer, memory, SCSI, and MMC functions.

In addition, the MMC port portion 40 interfaced with the maintenance boss processor 30 is an RS232C interface port for controlling the input / output link operating in an input / output processor (hereinafter, referred to as IOP) not shown. to be.

In this case, the IOP is an I / O processor for controlling the I / O link, and includes message data handling for analyzing and managing messages input and output through the I / O link, and state management for each I / O link. Input Output Process Management that performs I / O control functions, Disk Handling that performs file management functions for the hard disks in the PC, creation of station data of the system and matching with system software It consists of Data Generation that performs functions, and Data Extraction that performs the function of extracting station data from a running system package, and interfaces with the maintenance processor 30 using the MMC port. It is.

The EXIP unit 50 is a processor configured to interface with the IPC unit 10 in an active / standby side redundant structure and is an Ethernet X.25 matching processor.

The TP0 to TPn units 60-0 to 60-n are configured as an MP0 to MPn unit 20-0 to 20-n and an active / standby side redundant structure via the IPC unit 10 to perform internal communication. The lower processor block contains IPC, memory, timer, and HIT functions, respectively, through the HIT bus.

Here, the HIT bus is a high data link control type communication path having a speed of up to 2Mbps, and is a bus that interfaces with a bandwidth of 2Mbps between the lower processor and the device.

The overall block diagram of the standby side processor test method of the all-electronic exchange according to the present invention configured as described above has been described, and FIG. 2 is a detailed detailed flowchart for performing the standby side test function in the all-electronic exchange according to the present invention. Explain.

Standby from the MMC to perform the standby test function on the active side of the TP0 to TPn sections 60-0 to 60-n and the MP0 to MPn sections 20-0 to 20-n, which are all-electronic exchange processors. Upon receiving the side test request (step 200), the active side confirms the active side / standby side redundancy state (step 201).

Here, in the standby test, all the processors inside the electronic switch are configured with redundancy, so when a hardware abnormality is determined on a specific processor, the active side is changed, and the board is replaced with a spare board on the failed side, and then the stability of the board is changed. It can be said to be a function to check.

After confirming the active / standby side redundancy state, it is determined whether the redundancy state is normal (step 202), and if the redundancy state is abnormal, an error message is output (step 203).

Here, the active side is a side in which all processors are configured in redundancy, and perform / process the functions entrusted to them in the actual exchange, and the standby side does not perform any functions entrusted to the actual processor at all. It is a side waiting, and if it is determined that a serious failure occurs on the active side and it is no longer able to perform the function to the processor, it is ready to perform the function as an active side immediately when a transfer request is received. It is Side having.

If the redundancy state is normal in the determination, the redundancy state is disconnected by cutting the mode using the redundancy related register to prevent the memory contents from being over-written from the active side to the standby side (step 204). ).

On the other hand, the standby side test command is sent to the standby side with the redundant mode disconnected (step 205), and the active side performs the original function of the processor, and does not affect the online service at all. Test is possible (step 206).

A detailed detailed flowchart for performing the standby side test function in the all-electronic exchange according to the present invention configured as described above has been described. FIG. 3 is a detailed detailed flowchart of the method for collecting the standby side test result in the active side processor. Explain.

If a test result comes from the standby side as an interrupt while the active processor performs an original function assigned to its processor, the standby test type is identified, the result storage area is initialized, and the test result is collected for each type. (Step 300).

First, it is determined whether it is the test for the IPC, and if it is not the IPC test, the process is terminated. If the test is the IPC test, the test result is stored (step 301).

Next, it is determined whether it is a test for the memory, and if it is not a memory test, the process is terminated, and if it is a memory test, the test result is stored (step 302).

Next, it is determined whether or not the timer is a test, and if it is not the timer test, the process is terminated. If the timer test is performed, the test result is stored (step 303).

Next, it is determined whether it is a test for SCSI and terminates if it is not a SCSI test, and if it is a SCSI test, the test result is stored (step 304).

Next, it is determined whether the test is for the MMC function, and if it is not the test for the MMC function, the process is terminated. If the test is for the MMC function, the test result is stored (step 305).

Next, it is determined whether it is a test on the HIT bus and terminates if it is not a test on the HIT bus, and if it is a test on the HIT bus, a completion message is transmitted (step 306).

When the completion message arrives, the test results thus far received are sent to the user block to the IPC, and the user block examines the test results to produce a message indicating whether the relevant test is normal or abnormal and outputs it to the MMC port (step 307). ).

A detailed detailed flowchart of a method of collecting a standby side test result in an active processor according to the present invention configured as described above has been described. FIG. 4 is a detailed diagram of a method of performing a standby side test function by an active side request. A detailed flow chart will be described.

When the test request is received by the active processor from the stand-by processor side (step 400), various chips, which are basic functions of the standby side, are initialized for the test (step 401).

After the standby initialization is complete, check the geometry inside the board (step 402) to verify that SCSI-related chips are attached to your processor, MMC-related boards, and HIT bus-related chips. Will be performed.

Once the board geometry check is complete, first determine whether the IPC function is installed (step 403) and if so, then test the IPC function (step 404), which is an indispensable means of communication in the electronic switchboard processor. , Local, Loop Back, and External IPC are all tested to determine whether they are normal / abnormal, and then the test results are sent to the active side (step 405), if the IPC function is not equipped, Run the following steps.

Secondly, it is determined whether the memory function is mounted (step 406), and if it is mounted, the memory function is tested (step 407), and the memory test uses various types of memory, and each type (DRAM, S RAM, Test the memory read / write function with various DP RAMs, check whether it is normal / abnormal, and send a message to the active side (step 408). Run the step.

Third, it is determined whether the timer function is installed (step 409), and if it is installed, the timer function is tested (step 410). The timer function test is a function for testing various timers to be used in the operation process of the processor. After confirming the function functioning normally, the function checks whether the function is normal or abnormal and sends the result to the active side (step 411). If the timer function is not installed, the next step is executed.

Fourth, it is determined whether the SCSI function is mounted (step 412), and if it is mounted, the SCSI function is tested (step 413). The SCSI test is performed by selecting the types of devices (DKU, RDKU, CTU, MTU) connected to the SCSI cable, Check the specification, capacity, etc., check whether the actual read / write function is normally performed, and transmit the result to the active side (step 414). If the SCSI function is not installed, the next step is executed.

Fifth, it is determined whether the board for MMC is mounted (step 415), and if so, the I / O related functions are tested (step 416), and the interrupt test between the DSPA211 main board and the DSPA212 I / O function board and the DSPA212 I / O related functions test are performed. Check whether it is normal or abnormal, and transmit the result to the active side (step 417). If the board for MMC is not mounted, the next step is executed.

Sixth, it is determined whether the HIT bus function is mounted (step 418), and if it is mounted, the HIT bus function is tested (step 419), and the HIT test corresponds to the case of TP, and the transmission and reception function of the HIT bus communication message is performed. In order to check whether the normal message transmission / reception function is performed by performing the transmission / reception function by local or loop-back, it is determined whether the overall HIT bus communication function is normal or not, determine the normal / abnormal, and transmit the result to the active side (step) 420) If the HIT bus function is not installed, the next step is performed.

When the test function of step 6 is performed, the test is completed according to each functional processor internal board shape, and the test is terminated (step 421).

Accordingly, the test completion message is sent from the active side and the user has now played all the roles, thus entering the standby state (step 422).

In this case, the waiting state means waiting for the operator's action. The wait state means waiting for the operator's decision because the operator can request and terminate the test again as needed, and there may be two actions to enter the normal standby side. .

A detailed detailed flowchart of a method of performing a standby side test function by an active side request according to the present invention configured as described above has been described. FIG. 5 is a diagram illustrating a recovery request from the active side to a standby side, which is a general standby side. Detailed detailed flow chart will be described.

When the operator does not continuously perform the test in the state where the standby side test is completed, but requests to survive the normal standby side, the operator is required to perform the standby side recovery function from the active side (step 500).

If a recovery function request is received, the status of itself (active side) is normal and the other side (standby side) checks whether the standby side test is OK (step 501), and if the states do not match, an error message is output and the function End (step 502).

Otherwise, if the states match, the standby side requests the restart function, and when the self (active side) performs the original function as the active side, the standby side receives the message of restart in the standby state of FIG. When is received, the reset function is immediately activated to enter the booting state, and since the self is a standby side, the memory contents of the active side are received and the normal standby side is saved (step 503).

As described above, the present invention described above can safely check the interlocking state when the board is replaced by a hardware failure during the operation of the electronic switchgear system, and secure a serious failure that may occur in the course of operation during the system operation. There is an effect that can be prevented.

Claims (9)

In the standby side processor test method of an electronic switchboard having an active side / standby side, system internal processor communication, memory, a timer, a small computer system interface, a man & machine communication port, and a heat bus function. , Receiving a standby test request from the man & machine communication port; Confirming an active side / standby side redundancy state from the active side; Determining whether the redundancy state is normal after confirming the active / standby side redundancy state; Outputting an error message if the duplication state is abnormal; If the duplication state is normal, truncating duplication mode using a duplication related register to prevent over-writing from the active side to the standby side; And after the redundancy mode is disconnected, sending the standby side test command to the standby side, and wherein the active side performs a processor original function. The method of claim 1, The method for collecting the standby side test result in the active side processor may include: Identifying the standby test type from the active and requesting to collect test results for each type; And arranging test results for the internal processor communication, the memory, the timer, the small computer system interface, the man & machine communication port function, and the heat bus function, which are the standby side tests, to the user block. Standby-side processor test method of the electronic switch. The method of claim 1, The method for performing the standby side test function by the active side request is: After initializing the basic function of the standby side for the standby side test, if the internal processor communication function is installed, the internal processor communication function is tested, and the internal processor communication test is indispensable in the standby side processor. And a communication means for testing local, loop back, and external processor communication to determine whether it is normal or abnormal, and then transmitting a test result to the active side. The method of claim 1, The method for performing the standby side test function by the active side request is: After the basic function of the standby side is initialized for the standby side test, if the memory function is mounted, the memory function is tested. The memory test uses various types of memory and read / write the memory. The standby side processor test method of the electronic switchboard, characterized in that for testing the write function to determine whether the normal or abnormal and then transmits the test results to the active side. The method of claim 1, The method for performing the standby side test function by the active side request is: After the basic function of the standby side is initialized for the standby side test, if the timer function is installed, the timer function is tested. The timer function test is performed by testing various timers to be used in the operation process in the processor. And checking the abnormality and transmitting the result to the active side. The method of claim 1, The method for performing the standby side test function by the active side request is: After initializing the basic functions of the standby side for the standby side test, if the small computer system interface function is installed, the small computer system interface function is tested, and the small computer system interface test is performed on an actual device. The standby side processor test method of the electronic switchboard, characterized in that whether the data read / write to check whether the normal / abnormal and transmits the result to the active side. The method of claim 1, The method for performing the standby side test function by the active side request is: After the basic functions of the standby side are initialized for the standby side test, if the man & machine communication board is mounted, I / O related functions are tested. The interrupt test and DS2 between the DPS 211 board and the DPS 212 board are tested. 212 A standby side processor test method of an electronic switchboard, characterized in that for performing an input / output related function test to confirm whether it is normal or abnormal and then transmitting the result to the active side. The method of claim 1, The method for performing the standby side test function by the active side request is: After the basic function of the standby side is initialized for the standby side test, if the heat bus function is installed, the heat bus function is tested, and the heat bus test corresponds to a case of a lower processor. Send / receive the function of sending / receiving heat bus communication message, local / loop-back to check whether the normal message sending / receiving function is performed, and then determine whether the overall heat bus communication function is normal or not, and then check the result. And a standby side processor test method for transmitting to the active side. The method of claim 1, The method for the recovery request from the active side to the normal standby side is: When a request is made from the active side to perform a standby side recovery function, if the state of the active side is normal and the standby side checks whether the standby side test is OK, and if the states match, the standby function restarts. When the active side performs the original function as the active side, the standby side enters the boot state by driving the reset function, and since the standby side is itself the standby side, it receives the memory contents of the active side and survives the normal standby side. Standby-side processor test method of the electronic switch.