KR19990041582A - Manufacturing method of semiconductor device - Google Patents

Abstract

The present invention relates to a method of manufacturing a semiconductor device to improve the characteristics of the device, comprising the steps of defining a region in which the source / drain region is to be formed on the first conductivity type substrate, and the substrate of the source / drain region defined above Forming a trench by etching to a predetermined depth from a surface, implanting first conductivity type impurity ions into the substrate surface of the trench portion to form a source / drain region, and a substrate between the source / drain impurity region And forming a gate electrode doped with a second conductivity type impurity through a gate insulating film on the substrate.

Description

Manufacturing method of semiconductor device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a process for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device suitable for improving the characteristics of the device.

In general, in the manufacture of semiconductor integrated circuits, efforts have been made to reduce the size of MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) constituting high-performance integrated semiconductor chip integrated circuits.

As a result of these efforts, the manufacturing technology of semiconductor integrated circuits has been scaled down to sub-micron level.

The shrinking size of the semiconductor device must be reduced in proportion to the horizontal dimension and the vertical dimension in proportion to it to be able to balance the characteristics of the various devices.

In other words, when the size of the device is reduced, for example, when the gap between the source and the drain becomes closer in the transistor, an undesirable change in characteristics of the device may occur.

In order to improve the short channel effect due to the high integration, a lightly doped drain (LDD) structure is formed to form a low concentration junction under the gate sidewall.

Hereinafter, a manufacturing method of a conventional semiconductor device will be described with reference to the accompanying drawings.

1A to 1D are cross-sectional views illustrating a method of manufacturing a conventional semiconductor device.

As shown in FIG. 1A, a gate insulating film 12 and a polysilicon 13 for a gate electrode are formed on a p-type semiconductor substrate 11, and a photoresist 14 is formed on the polysilicon 13. ) Is patterned to expose only the region where the gate electrode is to be formed by exposure and development.

As shown in FIG. 1B, the polysilicon 13 and the gate insulating layer 12 are selectively removed using the patterned photoresist 14 as a mask to form a gate electrode 13a.

As shown in FIG. 1C, the photoresist 14 is removed, and low concentration n-type impurity ions are implanted using the gate electrode 13a as a mask to implant the surface of the semiconductor substrate 11 on both sides of the gate electrode 13a. The LDD region 15 is formed in the inside.

As shown in FIG. 1D, an insulating film is formed on the entire surface of the semiconductor substrate 11 including the gate electrode 14a, and then an etch back process is performed to form insulating film sidewalls 16 on both sides of the gate electrode 14a. .

Subsequently, high concentration n-type impurity ions are implanted into the entire surface by using the insulating film sidewall 16 and the gate electrode 14a as a mask, so that the LDD region 15 is formed in the surface of the semiconductor substrate 11 on both sides of the gate electrode 14a. Source / drain impurity regions 17 are formed to be connected to each other.

However, in the above-described method of manufacturing a semiconductor device, the channel length is shortened due to the integration of the device, and a depletion layer is formed toward the substrate due to the difference in carrier concentration at the PN junction of the source-substrate or the drain-substrate. The punch-through phenomenon of the shape connected to the depletion layer occurs, which causes a problem of degrading the function of the device.

An object of the present invention is to provide a method of manufacturing a semiconductor device to improve the characteristics of the device to prevent the punch-through phenomenon to solve the above problems.

1A to 1D are cross-sectional views illustrating a method of manufacturing a conventional semiconductor device.

2A through 2D are cross-sectional views illustrating a method of manufacturing a semiconductor device according to the present invention.

Explanation of symbols for the main parts of the drawings

21 semiconductor substrate 22 first photoresist

23 trench 24 source / drain impurity region

25 gate insulating film 26a gate electrode

27: second photoresist

According to an aspect of the present invention, there is provided a method of fabricating a semiconductor device, the method including: defining a region in which a source / drain region is to be formed in a first conductivity type substrate; Etching to a predetermined depth to form a trench, implanting first conductivity type impurity ions into the substrate surface of the trench to form a source / drain region, and forming a trench between the source / drain impurity regions And forming a gate electrode doped with a second conductivity type impurity through the gate insulating film.

Hereinafter, a method of manufacturing a semiconductor device according to the present invention will be described in detail with reference to the accompanying drawings.

2A to 2D are cross-sectional views illustrating a method of manufacturing a semiconductor device according to the present invention.

As shown in FIG. 2A, the first photoresist 22 is applied onto the p-type semiconductor substrate 21, and then patterned to open the region where the source / drain regions are to be formed by exposure and development.

Subsequently, the trench 23 is formed by etching the semiconductor substrate 21 to a predetermined depth from the surface by using the patterned first photoresist 22 as a mask.

As shown in FIG. 2B, boron ions, which are p-type ions, are implanted into the semiconductor substrate 21 having the trenches 23 formed thereon using the patterned first photoresist 22 as a mask, and annealing is performed. Thus, source / drain impurity regions 24 are formed.

As shown in FIG. 2C, the gate insulating film 25 and the high concentration n-type impurity ions are formed on the entire surface of the semiconductor substrate 21 on which the first photoresist 22 is removed and the source / drain impurity region 24 is formed. Doped polysilicon 26 is formed.

Subsequently, after the second photoresist 27 is coated on the polysilicon 26, the second photoresist 27 is applied to the polysilicon 26 so as to remain only between the source / drain impurity regions 24, that is, in the region where the trench 23 is not formed. Pattern.

As shown in FIG. 2D, the polysilicon 26 and the gate insulating layer 25 are selectively removed using the patterned second photoresist 27 as a mask to form a gate electrode 26a. 2 Remove the photoresist 27.

As described above, in the method of manufacturing a semiconductor device according to the present invention, since the concentration of the substrate is increased by implanting the same ions as the substrate to form a source / drain region, the phenomenon that the depletion layer widens toward the substrate is prevented. There is an effect of improving the properties.

Claims (1)

Defining a region in which a source / drain region is to be formed in the first conductivity type substrate; Etching the substrate of the defined source / drain region from a surface to a predetermined depth to form a trench; Implanting first conductivity type impurity ions into the substrate surface of the trench to form a source / drain region; And And forming a gate electrode doped with a second conductivity type impurity on a substrate between the source / drain impurity regions through a gate insulating film.