KR19990038355A - Phase-locked loop locking state discrimination device for digital video discs - Google Patents

Abstract

SUMMARY OF THE INVENTION The present invention provides an apparatus for detecting a locking state of a phase locked loop by detecting a sync pattern recorded on a disc of a digital video disc and determining whether there is a sync pattern in a window section signal generated by a fixed clock. The 14T-4T detection unit receives the data and the clock of the phase synchronization loop unit to detect the 14T-4T, the synchronization section generation unit outputs the synchronization section signal with the input clock count, the synchronization generation unit 14T-4T detection unit By determining whether the output signal is within the output signal section of the sync section generator, the locking state discrimination signal of the phase sync loop is output, and the frame sync is corrected to check the locked state of the phase sync loop.

Description

Phase-locked loop locking state discrimination device for digital video discs

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital video disk (DVD), and more particularly, to detect a sync pattern recorded on a disc of a digital video disk and to determine whether there is a sync pattern in a window section signal generated by a fixed clock, thereby determining the phase. The present invention relates to a device for checking a locking state of a phase lock loop (PLL).

In general, a digital video disc is a device capable of transferring a pick-up, reading information on the disc, and reconstructing and reproducing the original video / audio signal.

Such a general digital video disc may include a central processing unit 10 for controlling the digital video disc system as a whole; A high frequency signal processor (20) for reducing code interference in a radio frequency signal input under the control of the central processing unit (10) and converting the digital signal; A phase synchronization loop unit 30 for synchronizing the phase of the digital signal processed by the high frequency signal processor 20; A synchronization detector 40 for detecting synchronization by receiving data and a clock of the phase synchronization loop unit 30 and generating a frame synchronization signal with a frame synchronization unit; A demodulation unit (50) for receiving data and a clock from the synchronous detection unit (40), demodulating the block, and generating a block synchronization signal; An error correcting coder (ECC) for receiving a sector sync signal from the sync detector 40 and a block sync signal from the demodulator 50 to error correct demodulated data of the sync detector 40; Collection Code) 60; A descrambler (70) for performing a descramble (Descramble) to find the original signal from the error corrected signal of the error correcting coder (60) and transmitting it to a moving picture expert group (MPEG) II decoder; An ID detector (80) for checking whether there is an error in identification (ID) in the demodulated signal of the demodulator (50), and transmitting the ID to the central processing unit (10); A buffer manager 90 which receives the error corrected signal from the error correcting coder 60 and reads / writes the DRAM (Dynamic Read Only Memory) 100; The DRAM is configured to be connected to the buffer manager 100 to store data.

The operation of a general digital video disc configured as described above will be described in detail with reference to the accompanying drawings.

First, in order to play a digital video disc, focus, tracking, feeding, and spindle, which are operations of all servos, should be turned on. When the operation of the servo is completed, the high frequency signal (signal reproduced from the information recorded on the disk) generated by the pickup is applied to the high frequency signal processing unit 20.

Then, the high frequency signal processor 20 applies a high frequency signal to a waveform equalizer (not shown) to reduce inter-signal interference of the input high frequency signal, and outputs a high frequency signal whose output is an analog signal. EFM (8/14 modulation) data obtained by digitizing a high-frequency signal is applied to a slice circuit (not shown in the figure) for converting the digital signals into '0' and '1'. Accordingly, the phase synchronization loop unit 30 extracts a clock synchronized with the EFM data, resynchronizes the EFM data with the clock, and outputs the data PLL_DATA and the clock PLL_CLK.

The synchronous detection unit 40 generates a frame synchronous signal and a sector synchronous signal from the data and the clock of the phase synchronous loop part 30. The demodulator 50 then demodulates the data output from the synchronization detector 40 by 8/16, and consists of 17 sectors of the clock output from the synchronization detector 40 to perform one error correction code. Output Therefore, the error correcting coder 60 demodulates the demodulated data according to the sector synchronization signal of the synchronization detector 40 and the block synchronization signal of the demodulator 50 to the DRAM 100 through the buffer manager 90 in units of one block. Error correction is performed while reading / writing. The error corrected data is descrambled by the descrambler 70 and output to the MPEG II decoder.

In this case, as shown in FIG. 2, the sector structure of the digital video disc is configured in units of one sector, and a scramble that modulates a video or audio signal so that it cannot be received without a special receiver (decoder) is in units of one sector. Is performed.

On the other hand, the ID detecting unit 80 checks whether there is an error in the ID (consisting of 4 bytes) of every sector in the demodulated data of the demodulator 50 by IEC (ID Error Check). When the result of the check is requested by the central processing unit 10, the ID is transmitted to the central processing unit 10.

However, in order to reproduce data accurately, it is necessary to perform all operations such as demodulation and error correction coding after confirming that the phase synchronization loop unit 30 which extracts a clock synchronized with a high frequency signal operates correctly. Even when switching to seek or spindle motor control mode, the locking of the phase-locked loop portion 30 breaks out of the capture range of the phase-locked loop portion 30. When operations such as error correction coding are performed, accurate data reproduction becomes impossible. When the locking lock is broken, the phase synchronization loop unit 30 is switched to the frequency mode and enters the lock-in range. The phase synchronization loop unit 30 takes a long time to switch from the frequency mode to the phase mode.

In conventional digital video discs like this, it has been difficult to determine whether a phase locked loop that locks a clock synchronized with a high frequency signal is locked after turning on or seeking a servo to reproduce data. . For example, when trying to synchronize with a clock of 4 Mega, it is sometimes wrong to judge that the phase locked loop is locked by a multiplication frequency, which is a multiple of 8, 12, etc. There was a problem that an error occurred in the data.

Accordingly, the present invention has been proposed to solve the above conventional problems, and an object of the present invention is to detect a sync pattern recorded on a disc of a digital video disc, and to detect a sync pattern in a window period signal generated by a fixed clock. The present invention provides a device for determining a phase locked loop locking state of a digital video disc for determining whether the phase locked loop is locked.

In order to achieve the above object, the phase locked loop locking state determination apparatus of a digital video disc according to the present invention,

A 14T-4T detection unit which receives data and a clock of the phase synchronization loop unit and detects 14T-4T which is a sync pattern; A sync section generator for outputting a sync section signal by counting an input clock so that an output of the 14T-4T detector is set according to a width of a window section; It is determined whether the signal output from the 14T-4T detector is within the interval of the signal output from the synchronization section generator, and outputs the locking state determination signal of the phase synchronization loop, and the signal output from the 14T-4T detection unit and the A technical feature of the present invention is to provide a synchronization generator which performs frame synchronization correction using a signal output from the synchronization section generator.

1 is a block diagram of a general digital video disc;

2 is a sector scheme of a typical digital video disc;

3 is a block diagram of an apparatus for determining phase locked loop locking state of a digital video disc according to the present invention;

4 is an output waveform diagram of each block of FIG. 3;

<Explanation of symbols for main parts of the drawings>

10: central processing unit 20: high frequency signal processing unit

30: phase synchronization loop section 40: synchronization detection section

41: 14T-4T detector 42: Sync section generator

43: synchronization generator 50: demodulator

60: error correction call 70: descrambler

80: ID detection unit 90: buffer management unit

100: DRAM

Hereinafter, an embodiment according to the technical idea of the phase-locked loop locking state determination apparatus of the present invention configured as described above is described in detail.

First, the configuration and operation of the general apparatus to which the present invention is applied are the same as the configuration and operation of FIG. However, in the general digital video disc of FIG. 1, the synchronization detector 40 receives the data and the clock of the phase-locked loop unit 30 to detect synchronization, generates a frame synchronization signal and a sector synchronization signal, and generates a frame synchronization signal. And demodulating the demodulation unit 50 to the demodulation unit 50 and generating the locking state determination signal of the phase synchronization loop unit 30 to the central processing unit 10.

In the general digital video disc, the synchronization detector 40 receives the data and the clock of the phase-locked loop unit 30 and detects the sync pattern 14T-4T as shown in FIG. 3. )Wow; A sync section generator 42 for counting an input clock and outputting a sync section signal such that the output of the 14T-4T detector 41 is set according to the width of the window section; It is determined whether the signal output from the 14T-4T detection unit 41 is within a section of the signal output from the synchronization section generating unit 42 and outputs the locking state determination signal PLL_OK of the phase synchronization loop unit 30. And a synchronization generator 43 for correcting frame synchronization by using the signal output from the 14T-4T detector 41 and the signal output from the synchronization section generator 42.

The 14T-4T detection unit 41 is configured to detect and output 14T-4T when detecting the sync pattern recorded every frame of the digital video disc and outputting the sync signal.

In the above, the sync section generating section 42 generates the window pulse by a fixed clock equal to the reproduction speed of the digital video disc channel data so that the sync signal is set in the window section. When the number of times that the signal output from the 14T-4T detector 41 leaves the window section is more than a predetermined number of times, the pulse width of the window section is widened.

In the above, the synchronization generator 43 outputs the frame synchronization signal when the signal output from the 14T-4T detector 41 is within the window period of the synchronization section generator 42, and the 14T-4T detector ( If the signal output from 41 is not within the window section of the sync section generator 42, the frame sync is inserted and output according to the output of the sync section generator 42. And outputting a signal for widening the pulse width of the window section by determining that the signal output from the 14T-4T detector 41 is out of the window section output from the sync section generating section 42 by a predetermined number or more. do.

Referring to the accompanying drawings, an embodiment of a phase locked loop locking state determination device of a digital video disc according to the present invention configured as described above will be described in detail as follows.

First, as shown in Fig. 2, the data of the digital video disc constitutes one frame with 1488 channel bits (= 32 bits + 1456 bits), and has a synchronization pattern of 32 channel bits in each frame. Thus, there are eight (S0-S7) sync patterns in one sector. The later 19 channel bits of the 32 channel bits have a structure of 14T-4T when the clock is viewed at 1T (T: 1 / channel bit rate (26.16 MHz)), thereby enabling frame synchronization to be detected. do. And general channel data is from 3T to 11T, no more than 11T. Digital video discs are played back at 26.16 Mbps, so the playback interval for frame sync is 56.88 microseconds (ie, (32 bits + 1456 bits) / 26.16 Mbps = 56.88 microseconds).

Here, the synchronization detection unit 40 checks the occurrence of frame synchronization to determine whether the locking of the phase synchronization loop unit 30 is properly engaged. Thus, the 14T-4T detection unit 41 detects and outputs 14T-4T when detecting the synchronization pattern recorded every frame of the digital video disc by using the data and the clock of the phase synchronization loop unit 30 and outputting the synchronization signal. Outputs 14T-4T, a sync pattern. The synchronization section generating section 42 counts a fixed clock equal to the reproduction speed of the input digital video disk channel data, so that the output of the 14T-4T detection section 41 is set according to the width of the window section (this width is set arbitrarily). Outputs a synchronization section signal having a period of 56.88 microseconds, and widens the pulse width of the window section when the number of times that the signal output from the 14T-4T detector 41 leaves the window section is a predetermined number or more.

Then, the synchronization generating unit 43 determines whether the signal output from the 14T-4T detection unit 41 is within the section of the signal output from the synchronization period generating unit 42 and determines the locking state determination signal of the phase synchronization loop unit 30. (PLL_OK) is output, and frame synchronization is corrected using the signal output from the 14T-4T detection unit 41 and the signal output from the synchronization section generating unit 42.

4 shows an output waveform diagram of each block in the block diagram of the apparatus for determining the phase locked loop locking state of a digital video disc according to the present invention.

4A is an output waveform diagram of the 14T-4T detector 41, b is an output waveform diagram of the synchronization section generator 42, and c is a phase synchronization loop portion of the synchronization generator 43. As shown in FIG. An output waveform diagram of the locking state determination signal PLL_OK is shown at 30, and d is an output waveform diagram of the frame synchronization signal.

Accordingly, if the signal output from the 14T-4T detector 41 is within the window section of the sync section generator 42, the sync generator 43 outputs the signal as a frame sync signal, and outputs the signal from the 14T-4T detector 41. If the signal is not within the window section of the sync section generator 42, the frame sync is inserted and output according to the output of the sync section generator 42. Then, it is determined that the number of times that the signal output from the 14T-4T detector 41 leaves the window section output from the sync section generating section 42 is more than a predetermined number of times, so that the sync section generating section 42 widens the pulse width of the window section. The signal to be transmitted is transmitted to the synchronization section generator 42. At this time, if the signal transmitted from the synchronization generator 43 to the synchronization section generator 42 is set low, the signal is kept high in the case of normal reproduction.

In this way, by checking the locking state of the phase-locked loop part by frame synchronization, it becomes possible to grasp the locked state of the phase-locked loop faster. Therefore, it is possible to know the start point of the demodulation and error correction coding operation for replaying data after seek. It is possible to play data quickly.

As described above, the apparatus for determining the phase locked loop locking state of a digital video disc according to the present invention detects the sync pattern recorded on the disc of the digital video disc and checks whether there is a sync pattern in the window section signal generated by the fixed clock. By judging, the locked state of the phase-locked loop can be confirmed, and the start time of the demodulation and error correction coding operation can be known, thereby enabling faster data reproduction.

In addition, since the data is reproduced by checking the locked state of the phase-locked loop, the data error can be reduced.

Claims (7)

Receives the data and clock of the phase-locked loop part to detect synchronization, generates a frame-synchronous signal and a sector-synchronized signal, and includes a synchronization detector for generating the lock state determination signal of the phase-locked loop part to read information of the disc and to read the original video. A digital video disc which is reconstructed and reproduced as an audio / audio signal, wherein the synchronous detection unit comprises: A 14T-4T detection unit which receives data and a clock of the phase synchronization loop unit and detects 14T-4T which is a sync pattern; A sync section generator for outputting a sync section signal by counting an input clock so that an output of the 14T-4T detector is set according to a width of a window section; It is determined whether the signal output from the 14T-4T detector is within the interval of the signal output from the synchronization section generator, and outputs the locking state determination signal of the phase synchronization loop, and the signal output from the 14T-4T detection unit and the And a synchronization generator for correcting frame synchronization by using a signal output from the synchronization section generator. The phase synchronization of a digital video disc according to claim 1, wherein the 14T-4T detector detects 14T-4T when detecting a sync pattern recorded every frame of the digital video disc and outputting a synchronization signal. Loop locking status determination device. 2. The phase synchronization of a digital video disc according to claim 1, wherein the synchronization section generating unit generates a window pulse by a fixed clock equal to the reproduction speed of the digital video disk channel data so that the synchronization signal is set in the window section. Loop locking status determination device. The digital video disc of claim 1, wherein the synchronization section generator is configured to widen the pulse width of the window section when the number of times that the signal output from the 14T-4T detector exits the window section is a predetermined number or more. Phase-locked loop locking state determination device. The phase synchronization loop locking state of claim 1, wherein the synchronization generator outputs a frame synchronization signal when the signal output from the 14T-4T detector is within a window period of the synchronization period generator. Discrimination device. The method of claim 1, wherein the synchronization generator inserts and outputs frame synchronization according to the output of the synchronization section generator when the signal output from the 14T-4T detector is not within the window section of the synchronization section generator. Apparatus for determining phase locked loop locking state of a digital video disc. The signal generator of claim 1, wherein the synchronization generator determines that the number of times that the signal output from the 14T-4T detector exits the window section output from the synchronization section generator is greater than or equal to a predetermined number of times to widen the pulse width of the window section. Apparatus for determining the phase locked loop locking state of a digital video disc, characterized in that for outputting.