KR19990015463A - Trench element isolation method for semiconductor devices - Google Patents

Abstract

Disclosed is a device separation method of a semiconductor field capable of making the thickness of an oxide film formed inside a trench region uniform. In the present invention, a first insulating film pattern and a second insulating film pattern for exposing a portion of the semiconductor substrate are sequentially formed on the semiconductor substrate, and the exposed semiconductor substrate is selectively dry-etched to form a trench region, and an inner wall of the trench region is formed. A polycrystalline silicon layer is formed on the substrate, and the resultant is thermally oxidized to form an oxide film having rounded corners formed at a corner portion of the trench region adjacent to the semiconductor substrate surface. After the oxide film forming step, a trench filling layer is formed in the trench region, and the second insulating film pattern and the first insulating film pattern are removed.

Description

Trench element isolation method for semiconductor devices

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to a method of isolating a semiconductor device by a shallow trench isolation (STI) method.

As the degree of integration of semiconductor devices increases, device isolation methods using trenches have been studied for a long time, and devices using the same have been developed.

In a conventional trench isolation method, a predetermined region of a semiconductor substrate is etched to form a trench region having a rectangular cross section, and an isolation layer made of an insulating material is formed in the trench region. In this case, the trench inner wall is oxidized to cure the damaged part due to stress during etching to form the trench region.

However, due to the stress generated in the trench formation process, the oxide film is not formed to have a uniform thickness on the trench inner wall through the oxidation process of the inner wall of the trench. The phenomenon that the thickness of the oxide film becomes thin at the region edge portion occurs. As a result, the thinned portion of the oxide film acts as a fragile portion during the subsequent process, resulting in deterioration of the characteristics of the semiconductor device.

It is an object of the present invention to provide a device isolation method of a semiconductor device in which an oxide film having a uniform thickness can be formed at an edge portion of a trench inner wall.

1 to 5 are cross-sectional views illustrating a device isolation method of a semiconductor device in accordance with a preferred embodiment of the present invention in a process sequence.

In order to achieve the above object, in the device isolation method of a semiconductor device according to the present invention, a first insulating film pattern and a second insulating film pattern for exposing a part of the semiconductor substrate are sequentially formed on a semiconductor substrate, and the exposed semiconductor substrate is selectively selected. Dry etching to form a trench region, a polycrystalline silicon layer is formed on an inner wall of the trench region, and the resultant is thermally oxidized to form an oxide film having rounded corners at a corner portion of the trench region adjacent to the semiconductor substrate surface. After the oxide film forming step, a trench filling layer is formed in the trench region, and the second insulating film pattern and the first insulating film pattern are removed.

According to the present invention, an oxide film having a uniform thickness can be formed on the inner wall of the trench region while reducing adverse effects caused by stress at the edge portion of the trench region.

Next, a preferred embodiment of the present invention will be described in detail with reference to the accompanying drawings.

1 to 5 are cross-sectional views illustrating a device isolation method of a semiconductor device in accordance with a preferred embodiment of the present invention in a process sequence.

Referring to FIG. 1, a first insulating film and a second insulating film are sequentially formed on the semiconductor substrate 10. In this example, a pad oxide film is formed as the first insulating film, and a pad nitride film is formed as the second insulating film. Next, the pad nitride film and the pad oxide film are successively patterned to form a pad oxide film pattern 20 and a pad nitride film pattern 30 exposing predetermined regions of the semiconductor substrate. Subsequently, the exposed semiconductor substrate 10 is selectively dry etched to form a trench region T.

Referring to FIG. 2, a thin polycrystalline silicon layer 40 having a higher thermal oxidation rate than single crystal silicon is formed on the resultant product in which the trench region T is formed. The polycrystalline silicon layer 40 may be formed by confining only the inner wall of the trench region T.

Referring to FIG. 3, an oxide film 50 having rounded corners A is formed at a corner portion of the trench region T adjacent to a semiconductor substrate surface by thermally oxidizing the resultant product on which the polycrystalline silicon layer 40 is formed at a high temperature. do. The oxide film 50 formed at this time is formed to have a uniform thickness on the inner wall of the trench region T.

Referring to FIG. 4, an insulating material layer filling the trench region T, for example, a CVD oxide layer, is formed on the entire surface of the resultant, and the pad nitride layer pattern 30 is used as the etch stop layer. The insulating material layer is planarized by a chemical mechanical polishing (CMP) method or an etch back method until the C) is exposed to form a trench filling layer 60 inside the trench region T.

Referring to FIG. 5, after the exposed pad nitride layer pattern 30 is removed with a nitride etching solution, the pad oxide layer pattern 20 is removed with an oxide layer etching solution to expose the surface of the semiconductor substrate 10, that is, the active region. . As a result, an element isolation film 65 having a height approximately equal to the surface height of the active region is formed.

As described above, according to a preferred embodiment of the present invention, by forming a trench region and then depositing polycrystalline silicon and thermally oxidizing it at a high temperature, stress is induced at the edge portion of the trench region, that is, the active region edge portion of the semiconductor substrate. An oxide film having a uniform thickness can be formed on the inner wall of the trench region while reducing adverse effects.

The present invention has been described in detail with reference to preferred embodiments, but the present invention is not limited to the above embodiments, and various modifications can be made by those skilled in the art within the scope of the technical idea of the present invention. Do.

Claims (5)

Sequentially forming a first insulating film pattern and a second insulating film pattern exposing a portion of the semiconductor substrate on the semiconductor substrate; Selectively dry etching the exposed semiconductor substrate to form a trench region; Forming a polycrystalline silicon layer on an inner wall of the trench region; And thermally oxidizing the resultant to form an oxide film having rounded corners formed at a corner portion of the trench region adjacent to a surface of the semiconductor substrate. The method of claim 1, wherein the first insulating layer pattern is formed of an oxide layer. 2. The method of claim 1, wherein the second insulating layer pattern is formed of a nitride film. The method of claim 1, wherein the oxide film forming step is performed. Forming a trench buried layer in the trench region; And removing the second insulating film pattern and the first insulating film pattern. 5. The method of claim 4, wherein the trench buried layer is formed of a CVD oxide film.