JP2001210709A - Manufacturing method of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent concentration of an electric field at a corner, thinning of a gate oxide film and deterioration of a transistor characteristics by shaping the corner at the upper end of a trench into a round form, and to restrain a junction leak current to the low level and prevent generation of crystal defects during the manufacturing steps by restraining the stress caused by oxidation of the inner wall of the trench. SOLUTION: The manufacturing method of a semiconductor device, wherein trenches are formed for isolation of elements when a semiconductor device is formed, comprises a step for forming a first oxide film on the inner wall of the trench at 1000 deg.C or over after etching the trenches, a step for removing this first oxide film by wet etching, and a step for forming a second oxide film by oxidizing the inner wall of the trench again under 1000 deg.C.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for forming an STI (S
1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device having a “hallow trench isolation” structure.

[0002]

2. Description of the Related Art As elements are miniaturized for higher integration of semiconductor devices, an element isolation method at a level of 0.25 .mu.m or less has been conventionally used in LOCOS (Local Oxi).
(dation of Silicon) method to the STI method. In the LOCOS method, it is difficult to miniaturize the device isolation oxide film, which is called a bird's beak, because it digs into the device region. However, in the STI method, since the insulating film is buried in a rectangular trench, the effective element isolation region is not provided. It has the advantage of spreading.

FIGS. 3 and 4 are cross-sectional views for explaining a method of forming an element isolation structure using a conventional typical STI method.
First, as shown in FIG. 3A, a silicon oxide film 11 and a silicon nitride film 12 are formed on a silicon substrate 10. Next, as shown in FIG. 3B, a photoresist is applied on the silicon nitride film 12 and the photoresist pattern 1 for element isolation is formed by using a known lithography technique.
Form 3 Further, as shown in FIG. 3C, using the photoresist pattern 13 as a mask, the silicon nitride film 12 and the silicon oxide film 11 are sequentially etched and removed by a known dry etching technique to form a silicon nitride film pattern 14. Subsequently, as shown in FIG. 3D, using the silicon nitride film pattern 14 as a mask, the silicon substrate 10 is etched to a desired depth by a known dry etching technique, and the trench 15 is removed.
To form

Then, as shown in FIG. 4A, a silicon oxide film 16b is formed on the inner wall of the trench 15 by thermal oxidation. Next, as shown in FIG. 4B, an oxide film 23 for burying the trench is formed by a CVD method. next,
As shown in FIG. 4C, using a known CMP technique,
Buried oxide film 23 using silicon nitride film 12 as a stopper
Is removed by polishing. Subsequently, as shown in FIG. 4D, the silicon nitride film 12 is removed by wet etching. Thereafter, as shown in FIG. 4E, the silicon oxide film 11 and the buried oxide film 23 projecting from the silicon substrate are formed.
Is removed by wet etching to complete the STI structure.

In this method of forming the STI structure, it is an important element to round the trench corner to avoid deterioration of transistor characteristics due to electric field concentration and local thinning of a gate oxide film. For this purpose, the silicon typically exhibits a viscoelasticity of 100 after trench etching.
A manufacturing method is used in which a thermal oxidation treatment is performed at a high temperature of 0 ° C. or more, and a trench corner is rounded.

However, in this manufacturing method, as shown in FIG. 5A, since high-temperature thermal oxidation is used, a facet 24 is formed at the bottom of the trench, and a high stress state occurs at the bottom of the trench. However, in the subsequent manufacturing steps (particularly, ion implantation, heat treatment, and oxidation treatment), crystal defects occur, which causes a junction leak failure and the like. On the other hand, when the oxidation treatment is performed at a temperature lower than 1000 ° C., as shown in FIG. 5B, the facet formation at the bottom of the trench can be suppressed, but the overhang shape 25 occurs at the corner at the upper end of the trench. ,
Eventually, the above-mentioned problems such as electric field concentration and thinning of the gate oxide film occur.

[0007] Therefore, for example, the 1999 Symposium on VSI Technology (Sympo)
sium on VLSI Technology) p
161-162, "Enabling Shallow
Trench Isolation for 0.1
um Technologies and Beyon
d "discloses a method in which a trench buried oxide film is subjected to CMP polishing and then subjected to a high-temperature oxidation treatment. In this technique, the inside wall of the trench after the trench etching is oxidized at 950 ° C. where a facet is not formed at the bottom of the trench. In this process, the inside of the trench is buried with an insulating film, a CMP process is performed, and then an oxidizing process is performed again at a high temperature of 1100 ° C., thereby rounding a corner at the upper end of the trench.

[0008]

However, in the above-described technique, since a high-temperature heat treatment (oxidation treatment) is performed after burying the inside of the trench with an insulating film, excessive contraction or expansion of the buried insulating film occurs. However, there is a problem that stress in the vicinity of element isolation is increased, and crystal defects are generated in a subsequent manufacturing process, causing a junction leak failure and the like.

In order to solve this problem, it is necessary to “realize a rounded shape at the upper corner of the trench” and “reduce stress at the bottom of the trench” before embedding an insulating film inside the trench. is there.

An object of the present invention is to provide a DTI structure in which the corner portion at the upper end of the trench is rounded to prevent electric field concentration at the corner portion and to reduce the thickness of the gate oxide film, thereby preventing deterioration of transistor characteristics. And at the same time, to provide a method for forming an STI structure in which the stress due to the oxidation treatment of the inner wall of the trench is suppressed, no crystal defects or the like are generated during the manufacturing process, and the junction leakage current is kept low. .

[0011]

According to the present invention, there is provided a method of manufacturing a semiconductor device in which a trench for element isolation is formed when the semiconductor device is formed. A step of forming a first oxide film at a temperature of 1000 ° C. or higher, a step of removing the first oxide film by wet etching, and a step of oxidizing the inner wall of the trench again at a temperature of less than 1000 ° C. And a step of forming a film.

Another structure of the present invention is a method of manufacturing a semiconductor device, wherein a trench for element isolation is formed when the semiconductor device is formed. First in temperature
Forming a first oxide film, removing the first oxide film by wet etching, and forming a second oxide film on the inner wall of the trench by a CVD method at a temperature of less than 1000 ° C. It is characterized by having.

In the present invention, a trench is formed by forming a first silicon oxide film and a silicon nitride film on a silicon substrate, then applying a photoresist on the silicon nitride film, and isolating the element using a lithography technique. Forming a silicon nitride film pattern by dry etching using the photoresist pattern as a mask to sequentially remove the silicon nitride film and the first silicon oxide film to form a silicon nitride film pattern; The silicon substrate is etched and removed to a desired depth by dry etching using the pattern as a mask.

Further, in the present invention, after forming the trench, an inner wall of the trench is formed using the second silicon oxide film as the first oxide film, and after removing this, the third silicon oxide film is formed into the second oxide film. After forming the first silicon oxide film, a fourth silicon oxide film is formed as a trench buried oxide film, the fourth silicon oxide film on the silicon nitride film is polished and removed, and the silicon nitride film is removed by etching. The oxide film and the fourth silicon oxide film protruding from the silicon substrate are removed by etching to form an STI structure.

According to the structure of the present invention, the manufacturing process of "high-temperature thermal oxidation treatment + oxide film etching + low-temperature oxide film formation" is performed for the purpose of rounding the corners of the trench corners by high-temperature thermal oxidation (viscosity of silicon occurs). (At a temperature of 1000 ° C. or more), which alleviates the high stress state at the bottom of the trench by the subsequent oxide film etching and low temperature oxide film formation.

Accordingly, by achieving both "rounding of the corner of the trench" and "relaxation of the stress at the bottom of the trench", it is possible to suppress the deterioration of device characteristics due to the concentration of an electric field at the corner of the trench and the generation of crystal defects caused by the stress at the bottom of the trench. Is obtained.

[0017]

FIG. 1 is a process sectional view of a first embodiment of a method of manufacturing a semiconductor device according to the present invention.
In the method for forming a trench for element isolation, according to the present invention, the inner wall of the trench is removed by 10 cm after the trench etching.
Forming a first oxide film at a temperature of 00 ° C. or more, removing the first oxide film by wet etching, and oxidizing the inner wall of the trench again at a temperature of less than 1000 ° C. And a step of forming a film.

In the present embodiment, the first half of the process for forming the STI structure is the same as that of the conventional example shown in FIGS. That is, a first silicon oxide film 11 and a silicon nitride film 12 are formed on a silicon substrate 10,
Next, a photoresist is applied on the silicon nitride film 12, and a photoresist pattern 13 for element isolation is formed by using a known lithography technique. Further, using the photoresist pattern 13 as a mask, the silicon nitride film 12 and the first
The silicon oxide film 11 is sequentially removed by etching to form a silicon nitride film pattern 14. Subsequently, using the silicon nitride film pattern 14 as a mask, the silicon substrate 10 is etched and removed to a desired depth by a known dry etching technique to form a trench 15. The manufacturing method up to this point is the same as in FIG. This trench is etched, for example, to a depth of about 300 nm.

According to the present embodiment, as shown in FIG. 1A, a second silicon oxide film (first oxide film) 16 is formed on the inner wall of the trench 15 by thermal oxidation. The oxidation treatment at this time is performed at a corner portion at the upper end of the trench (hereinafter referred to as a
In order to round the trench corner (17), the etching is performed at a temperature of at least 1000 ° C., at which silicon has viscosity, and preferably at a temperature of about 1100 ° C. In this embodiment, the oxide film thickness is set to about 20 to 50 nm. At this time,
Since the facet 18 peculiar to high-temperature oxidation is formed simultaneously with the formation of the oxide film at the bottom of the trench, stress due to the difference in the thermal expansion coefficient between the silicon oxide film and the silicon substrate is formed at the bottom of the trench (particularly at the facet formation portion). It will be strong.

Therefore, as shown in FIG. 1B, if the second silicon oxide film 16 is removed by known wet etching, the stress at the bottom of the trench can be reduced. Subsequently, as shown in FIG. 1C, a third silicon oxide film (a second oxide film) is formed on the inner wall of the trench 15.
19 is formed by thermal oxidation. At this time, the oxidation process is performed at a temperature lower than that of the process of the second silicon oxide film 16 by 1000.
It is carried out at a temperature lower than ℃, preferably at a temperature of about 900 ℃. In this embodiment, the oxide film thickness is set to about 20 to 50 nm. In this case, since the oxidation is performed in a state where there is almost no change in the shape of the oxide film-silicon interface such as facet formation, the stress at the bottom of the trench is reduced.

Through the above steps, the rounded shape of the trench corner and the low stress at the bottom of the trench can be achieved. Further, as shown in FIG. 1D, a fourth silicon oxide film 20 for burying the trench is formed by a CVD method. For example, HDP (High Density P)
lasma) -CV method of about 500 nm
A D oxide film is formed. The HDP-CVD oxide film has good embedding properties, but there is concern about plasma damage, contamination, and the like during film formation on the silicon substrate. The aforementioned third oxide film 1
9 is intended to protect the inner wall of the trench therefrom.

Next, as shown in FIG.
Using the MP technique, the fourth oxide film 20 is polished and removed using the silicon nitride film 12 as a stopper. Subsequently, FIG.
As shown in (f), the silicon nitride film is removed by wet etching. Thereafter, as shown in FIG. 1G, the first silicon oxide film 11 and the fourth oxide film 20 protruding from above the silicon substrate are removed by wet etching to complete the STI structure.

In the structure of the present embodiment, the fourth silicon oxide film 20 is not limited to the HDP-CVD film, and can be buried by silica coating in addition to CVD film formation such as low-pressure CVD and normal pressure CVD. is there.

In the embodiment of FIG. 1, the inner wall oxide film is formed again by low-temperature thermal oxidation after the inner wall oxide film of the trench is removed by wet etching. However, the inner wall oxide film may be formed by a CVD method. Fig. 2 shows the configuration.
This will be described below.

FIG. 2 is a process sectional view of a method for manufacturing a semiconductor device according to a second embodiment of the present invention. According to the present invention, there is provided a method for forming a first oxide film on the inner wall of a trench at a temperature of 1000 ° C. or more after the trench etching, and wet etching the first oxide film by wet etching. A removing step and a step of forming a second oxide film on the inner wall of the trench by a CVD method at a temperature of less than 1000 ° C. are provided.

In the first step, a first silicon oxide film 11 and a silicon nitride film 12 are formed on a silicon substrate 10 in the same manner as in the conventional example shown in FIG. Next, a photoresist is applied on the silicon nitride film 12 and the photoresist pattern 1 for element isolation is formed using a known lithography technique.
Form 3 Furthermore, this photoresist pattern 1
3 as a mask, the silicon nitride film 12 and the first silicon oxide film 1 are formed by a known dry etching technique.
1 are sequentially removed by etching to obtain a silicon nitride film pattern 1
4 is formed. Subsequently, using the silicon nitride film pattern 14 as a mask, the silicon substrate 10 is etched to a desired depth by a known dry etching technique to form a trench 15.

According to the present invention, a second silicon oxide film 16 is formed on the inner wall of trench 15 by thermal oxidation, as in FIG. The oxidation treatment at this time is performed at a temperature of at least 1000 ° C. at which silicon has viscosity, preferably at a temperature of about 1100 ° C., in order to round the corner 17 at the upper end of the trench. At this time, a facet 18 peculiar to high-temperature oxidation is formed at the bottom of the trench simultaneously with the formation of the oxide film. Stress is strongly applied.
Here, as shown in FIG. 2A, the second silicon oxide film 16 is removed by known wet etching, so that the stress at the bottom of the trench can be reduced.

In this embodiment, FIG.
As shown in (b), a third silicon oxide film 22 is formed on the inner wall of the trench 15 by a known CVD method. The CVD film forming process at this time is performed at a temperature of less than 1000 ° C., for example, HTO (H
2 (Temperature Oxide) membrane
It is formed with a thickness of 0 to 50 nm. Through the above steps, the rounded shape of the trench corner and the lower stress at the bottom of the trench can be reduced. Further, as shown in FIG.
A fourth oxide film 20 for burying the trench is formed by a CVD method. For example, HDP (High Densit)
y Plasma) -CVD method to form a CVD oxide film of about 500 nm. HDP-CVD oxide film
Although the embedding property is good, there is a concern about plasma damage and contamination during film formation on the silicon substrate. The above-mentioned third oxide film 22 aims at protecting the inner wall of the trench therefrom.

Next, as shown in FIG.
Using the MP technique, the fourth oxide film 20 is polished and removed using the silicon nitride film 12 as a stopper. Subsequently, FIG.
As shown in (e), the silicon nitride film 12 is removed by wet etching. After that, as shown in FIG. 2F, the first silicon oxide film 11 and the fourth oxide film 20 protruding above the silicon substrate are removed by wet etching to complete the STI structure. Therefore, the effect of improving device characteristics as described in the first embodiment of the present invention is provided.

In the present embodiment, the third oxide film 22 is not limited to the HTO film, but may be an oxide film formed by low-pressure CVD or normal pressure CVD. Further, the fourth oxide film 20 is formed of HD
Not only the P-CVD film, but also embedding by silica coating is possible in addition to CVD film formation such as low-pressure CVD and normal pressure CVD.

[0031]

As described above, by adopting the structure of the present invention, "rounding of the upper end corner of the trench due to high-temperature inner wall oxidation" and "relaxation of stress at the bottom of the trench" are achieved.
At the same time, preventing the device characteristics such as transistor hump phenomenon, reverse narrowing effect and gate oxide film deterioration due to the shape at the top corner of the trench, as well as crystal defects caused by stress at the bottom of the trench. The effect that the junction leak due to the above can be suppressed is brought about.

[Brief description of the drawings]

FIG. 1 is a process sectional view for forming an STI structure according to a first embodiment of the present invention.

FIG. 2 is a process sectional view for forming an STI structure according to a second embodiment of the present invention.

FIG. 3 is a process sectional view for forming a conventional STI structure.

FIG. 4 is a process sectional view for forming the STI structure following FIG. 3;

FIG. 5 is a cross-sectional view for explaining a problem of a conventional STI structure.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Silicon substrate 11 1st silicon oxide film 12 Silicon nitride film 13 Photoresist pattern for element isolation 14 Silicon nitride film pattern 15 Trench 16 2nd silicon oxide film 17 Corner part 18, 24 Facet 19, 22 Third silicon oxide Film 20 fourth silicon oxide film 23 buried oxide film 25 overhang shape

Claims (6)

[Claims] 1. A method of manufacturing a semiconductor device, comprising forming a trench for element isolation when forming the semiconductor device, wherein after the etching of the trench, an inner wall of the trench is subjected to a first oxidation at a temperature of 1000 ° C. or higher. Forming a film, removing the first oxide film by wet etching, and setting the inner wall of the trench to 1000 ° C. again.
Forming a second oxide film by oxidizing at a temperature less than or equal to. 2. A method of manufacturing a semiconductor device, comprising forming a trench for element isolation when forming the semiconductor device, wherein after etching the trench, an inner wall of the trench is subjected to a first oxidation at a temperature of 1000 ° C. or higher. Forming a film, removing the first oxide film by wet etching, and forming a second oxide film on the inner wall of the trench by a CVD method at a temperature of less than 1000 ° C. A method for manufacturing a semiconductor device, comprising: 3. The method according to claim 1, wherein the first oxide film and the second oxide film are silicon oxide films. 4. The method according to claim 1, wherein the first trench is formed on a silicon substrate.
A silicon oxide film and a silicon nitride film are formed, and then a photoresist is applied on the silicon nitride film. A photoresist pattern for element isolation is formed using lithography technology. The silicon nitride film and the first silicon oxide film are sequentially removed by etching to form a silicon nitride film pattern, and the silicon substrate is dried to a desired depth by dry etching using the silicon nitride film pattern as a mask. 3. The method of manufacturing a semiconductor device according to claim 1, wherein the trench is formed by etching and removing the trench. 5. After the trench is formed, an inner wall of the trench is formed using the second silicon oxide film as a first oxide film,
After removing this, a third silicon oxide film is formed as a second oxide film, then a fourth silicon oxide film is formed as a trench buried oxide film, and the fourth silicon oxide film on the silicon nitride film is polished. 3. The method for manufacturing a semiconductor device according to claim 1, wherein the silicon nitride film is removed by etching, and the first silicon oxide film and the fourth silicon oxide film protruding from the silicon substrate are removed by etching. 6. The method according to claim 5, wherein the fourth silicon oxide film is buried by CVD film formation or silica coating.