KR19990004784A - Manufacturing method of thin film type optical path control device - Google Patents

Abstract

Disclosed is a method of manufacturing a thin film type optical path control device. The method includes providing an active matrix in which M × N transistors are embedded and a drain pad is formed on one side; And (i) forming a support layer in parallel with the active matrix on one side of the active matrix, the other side of which is in contact with the top of the active matrix, and the other side through an air gap, and ii) forming a lower electrode on the support layer. (V) forming a strained layer on top of the lower electrode, iii) removing the strained layer in an area where an alignment key to be used in a photographing process is located, and v) an upper electrode on top of the strained layer. And forming an actuator having a step of forming the actuator. According to the method, after forming a strained layer made of piezoelectric material, the strained layer in the region where the wafer key and the mask key are located is removed before entering the alignment process step, so that the wafer key of the first designed shape is maintained. . Therefore, by solving the nonuniformity of the alignment key caused by the thickness difference of the strained layer, the workability and process stability of the photographic process can be improved.

Description

Manufacturing method of thin film type optical path control device

The present invention relates to a method of manufacturing a thin film type optical path control apparatus using AMA (Actuated Mirror Array), and more particularly, to solve the unevenness of the alignment key caused by the deformation layer forming process to freeze in the photographic process. The manufacturing method of the thin film type optical path control apparatus which can improve the precision of phosphorus.

Optical path control devices or spatial light modulators for projecting optical energy onto a screen may be applied to various fields such as optical communication, image processing, and information display devices. The image processing apparatus using the optical path adjusting device or the spatial light modulator typically has a direct-view image display device and a projection-type image device according to a method of displaying optical energy on a screen. display device).

An example of a direct-view image display device is a CRT (Cathode Ray Tube). The CRT device is called a CRT, which has excellent image quality but increases in weight and volume as the screen is enlarged, leading to an increase in manufacturing cost. There is. Projection type image display apparatuses include a liquid crystal display (LCD), a deformable mirror device (DMD), and an AMA. Such projection image display devices can be further divided into two groups according to their optical characteristics. That is, devices such as LCDs can be classified as transmissive spatial light modulators, while DMD and AMA can be classified as reflective spatial light modulators.

Transmission optical modulators, such as LCDs, have a very simple optical structure, which makes them thinner, lighter in weight, and smaller in volume. However, due to the polarity of the light, the light efficiency is low, there is a problem inherent in the liquid crystal material, for example, there is a disadvantage that the response speed is slow and the inside is easy to overheat. In addition, the maximum light efficiency of existing transmission light modulators is limited to a range of 1-2%, requiring dark room conditions to provide acceptable display quality. Therefore, optical modulators such as DMD and AMA have been developed to solve the above problems.

Although DMD shows a relatively good light efficiency of about 5%, the hinge structure employed in the DMD not only causes serious fatigue problems, but also requires a very complicated and expensive driving circuit. In the AMA, each of the mirrors installed therein reflects light incident from the light source at a predetermined angle, and the reflected light is projected on the screen through an aperture such as a slit or a pinhole. It is a device that can adjust the speed of light to form an image. Therefore, its structure and operation principle are simple, and high light efficiency (more than 10% light efficiency) can be obtained compared to LCD or DMD. In addition, the contrast of the image projected on the screen is improved to obtain a bright and clear image.

Each actuator of the AMA generates a deformation in accordance with the electric field generated by the applied electric picture signal and the bias signal. As the actuator deforms, each of the mirrors mounted thereon is tilted. Accordingly, the inclined mirrors reflect light incident from the light source at a predetermined angle to form an image on the screen. Piezoelectric materials such as PZT (Pb (Zr, Ti) O ₃ ), or PLZT ((Pb, La) (Zr, Ti) O ₃ ) are used as actuators for driving the respective mirrors. The actuator may also be configured as a warping material such as PMN (Pb (Mg, Nb) O ₃ ).

These AMA devices are largely divided into bulk type and thin film type. The bulk optical path control device is disclosed in US Pat. No. 5,085,497 to Gregory Um et al. The bulk optical path adjusting device is made by thinly cutting a multilayer ceramic to mount a ceramic wafer having a metal electrode formed therein in an active matrix in which a transistor is embedded, and then processing by a sawing method and installing a mirror thereon. However, the bulk optical path control device requires very high precision in design and manufacturing, and has a disadvantage in that the response of the deformation layer is slow.

Accordingly, a thin film type optical path control apparatus that can be manufactured using a semiconductor manufacturing process has been developed. The thin film type optical path control device is disclosed in the patent application No. 96-42197 (name of the invention: a method of manufacturing a thin film type optical path control device that can control the stress of the membrane) that the applicant filed a patent with the Korean Patent Office on September 24, 1996 It is.

Figure 1 shows a cross-sectional view of the thin film type optical path control device described in the preceding application.

Referring to FIG. 1, the thin film type optical path adjusting device includes an active matrix 1 and an actuator 60. The active matrix 1 in which M x N (M, N is an integer) MOS transistors (not shown) and a drain pad 5 formed on one surface thereof is formed of the active matrix 1 and the drain pad. The protective layer 10 stacked on the upper portion of the (5) and the etch stop layer 15 stacked on the protective layer 10 is included.

One end of the actuator 60 is in contact with a portion of the etch stop layer 15 in which the drain pad 5 is formed, and the other side is formed in parallel with the etch stop layer 15 through the air gap 25. Membrane 30 having a top, lower electrode 35 stacked on top of membrane 30, strain layer 40 stacked on top of lower electrode 35, upper electrode stacked on top of strain layer 40 45 and a via hole vertically formed from one side of the strained layer 40 to the drain pad 5 through the lower electrode 35, the membrane 30, the etch stop layer 15, and the protective layer 10. The lower electrode 35 and the drain pad 5 are included in the via contact 55 to be electrically connected to each other.

A stripe 46 is formed on one side of the upper electrode 45. The stripe 46 operates the upper electrode 45 uniformly to prevent diffuse reflection of light incident from the light source.

Hereinafter, a method of manufacturing the thin film type optical path control device will be described with reference to FIGS. 2A to 2D.

Referring to FIG. 2A, a silicate glass (Phosphor-) is formed on an active matrix 1 having M × N (M and N are integers) transistors (not shown) and a drain pad 5 formed on one side thereof. A protective layer 10 made of Silicate Glass (PSG) is formed. The protective layer 10 is formed to have a thickness of about 1.0 μm by using a chemical vapor deposition (CVD) method. The protective layer 10 protects the active matrix 1 in which the transistor is embedded from subsequent processes.

An etch stop layer 15 made of nitride is formed on the protective layer 10. The etch stop layer 15 is formed to have a thickness of about 0.01 to 1.0 탆 using a low pressure chemical vapor deposition (LPCVD) method. The etch stop layer 15 prevents the protective layer 19 and the active matrix 1 from being etched during the subsequent etching process.

The sacrificial layer 20 is formed on the etch stop layer 15. The sacrificial layer 20 is formed of phosphorous silicate glass (PSG) having a high concentration of phosphorus (PG) to have a thickness of about 1.0 to 3.0 μm using the Atmospheric Pressure Vapor Deposition (APCVD) method. do. In this case, since the sacrificial layer 20 covers the upper portion of the active matrix 1 in which the transistor is embedded, the surface flatness is very poor. Therefore, the surface of the sacrificial layer 20 is planarized by using a spin-on glass (SOG) method or a chemical mechanical polishing (CMP) method. Subsequently, a portion of the sacrificial layer 20 in which the drain pad 5 is formed is etched to expose a portion of the etch stop layer 15, thereby making a position where the support of the actuator 60 is to be formed.

Referring to FIG. 2B, the membrane 30 is formed on the exposed etch stop layer 15 and the sacrificial layer 20 to a thickness of about 0.1 to 1.0 μm. Membrane 30 is formed using low pressure chemical vapor deposition (LPCVD). At this time, by forming the membrane 30 while varying the ratio of the reaction gas in the reaction vessel of low pressure, the stress in the membrane 30 is controlled.

The lower electrode 35 made of a metal such as platinum (Pt) or platinum-tantalum (Pt-Ta) is formed on the membrane 30. The lower electrode 35 is formed to have a thickness of about 0.01 to 1.0 탆 using the sputtering method. Subsequently, the lower electrode 35 is etched by a reactive ion etching process using an etching end point to short-circuit the lower electrode 35 for each pixel so that an independent first signal (image signal) is applied to each pixel. (Iso-Cut etching process).

The deformation layer 40 made of a piezoelectric material such as PZT or PLZT is formed on the lower electrode 35. The strained layer 40 is formed to have a thickness of about 0. 1 to 1.0 μm, preferably about 0.4 μm using a sol-gel method, and then rapid thermal annealing: RTA) phase change. The strained layer 40 is deformed by an electric field generated between the upper electrode 45 and the lower electrode 35.

The upper electrode 45 is formed on the strained layer 40. The upper electrode 45 is formed of a metal having excellent electrical conductivity and reflectivity, such as aluminum or platinum, to have a thickness of about 0.01 to 1.0 탆 using a sputtering method. The second signal (bias signal) is applied to the upper electrode 45 through a common electrode line (not shown). In addition, the upper electrode 45 also functions as a mirror that reflects light incident from the light source.

Referring to FIG. 2C, the upper electrode 45 is patterned into a predetermined pixel shape. In this case, the stripe 46 is patterned to form one side of the upper electrode 45. Subsequently, the strained layer 40 and the lower electrode 35 are sequentially patterned into a predetermined pixel shape, and then the strained layer 40 is formed from an upper portion of one side of the strained layer 40 to an upper portion of the drain pad 5. The via hole 50 is formed by sequentially etching the lower electrode 35, the membrane 30, the etch stop layer 15, and the protective layer 10. Subsequently, a metal such as tungsten, platinum or titanium is deposited by a sputtering method to form a via contact 55 that electrically connects the drain pad 5 and the lower electrode 35. Therefore, the via contact 55 is formed vertically from the lower electrode 35 to the top of the drain pad 5 in the via hole 50. Therefore, the first signal (image signal) applied from the outside is applied to the lower electrode 10 through the transistor, the drain pad 5 and the via contact 55 built in the active matrix 1.

Referring to FIG. 2D, a photoresist layer (not shown) is coated on the entire surface of the resultant product in which the via contact 55 is formed and patterned to expose the membrane 30. Subsequently, the membrane 30 is anisotropically etched using the photoresist layer as an etching mask, thereby patterning a predetermined pixel shape. Subsequently, an air gap 59 is formed by isotropically etching the sacrificial layer 20 by hydrogen fluoride (HF) vapor using the photoresist layer as an etching mask, followed by rinsing and drying to perform AMA. Complete the device.

In the above-described thin film type optical path adjusting device, the first signal (image signal) is transmitted to the lower electrode 35 which is a signal electrode through the MOS transistor, the drain pad 5, and the via contact 55 embedded in the active matrix 1. Is approved. In addition, a second signal (bias signal) is applied to the upper electrode 45 from the outside through a common electrode line to generate an electric field between the upper electrode 45 and the lower electrode 35. By the electric field, the strained layer 40 stacked between the upper electrode 45 and the lower electrode 35 causes deformation. The strained layer 40 contracts in a direction perpendicular to the electric field, and the actuator 60 including the strained layer 40 is bent in a direction opposite to the direction in which the support layer 30 is formed. Therefore, the upper electrode 45 on the actuator 60 is also inclined in the same direction. Light incident from the light source is reflected by the upper electrode 45 at a predetermined angle, and then is projected onto the screen to form an image.

On the other hand, in the manufacturing process of the thin film type optical path control apparatus, integrated circuits are manufactured by patterning a series of masking layers, and the features on successive layers have a spatial relationship with each other. Thus, as part of the manufacturing process, each level must be aligned with the previous level. That is, the pattern of the mask to be newly formed during the photographing process should be aligned with the pattern formed on the wafer in the previous step. The equipment in the photolithography process performs automatic alignment using laser scanning method to measure and align diffuse reflection of light or image recognition method using CCD, or manual alignment using visual alignment method using optical microscope. In either case, the accuracy of the alignment changes according to the precision of the alignment key pattern.

3A and 3B show a wafer key and a mask key used for manual alignment using an optical microscope and automatic alignment using a laser scanning or image recognition method, respectively. Here, the wafer key is a key for alignment, and the mask key indicates a point to be aligned at the time of pattern formation. During the alignment operation, the gap (indicated by ↔) between the wafer key and the mask key must be kept constant to align the newly formed pattern. Preferably, the gap has a precision of 0.5 µm or less. Must be maintained. Therefore, the precision of the shape of the wafer key is very important.

In the above-described thin film type optical path adjusting device, the order of alignment is as follows. First, wafer keys of a protective layer, an etch stop layer, and a sacrificial layer are formed on the active matrix based on the wafer keys formed in the MOS transistors embedded in the active matrix, and the layers are aligned with the wafer keys. Subsequently, during the photolithography process for patterning the sacrificial layer, a new wafer key is formed to create wafer keys of all other layers (membrane, bottom electrode, strain layer, top electrode, etc.) based on the new wafer key and all other layers. Are formed in alignment with the new wafer key.

The strained layer made of a piezoelectric material such as PZT or PLZT is formed by a spin-coating method using a sol. In general, the mask key and the wafer key are located outside the active area (used area of the wafer). When the piezoelectric material is spin-coated, the piezoelectric material in the sol state is moved from the center of the active area to the outside by centrifugal force. Spread out Accordingly, as shown in FIG. 4B, the piezoelectric material is collected at a portion where the step is formed in the previous step, thereby forming a wave pattern. As a result of the wave pattern, the shape of the wafer key is changed from the shape originally designed as shown in FIG. 4A, so that automatic alignment is not possible at the time of mask alignment, and the accuracy of the alignment is degraded.

Accordingly, an object of the present invention relates to a method for manufacturing a thin film type optical path control apparatus that can improve the accuracy of alignment in a photographic process by solving the nonuniformity of the alignment key resulting from the formation of the strained layer.

1 is a cross-sectional view of a thin film type optical path adjusting device described in the applicant's prior application.

2A to 2D are cross-sectional views illustrating a method of manufacturing the apparatus shown in FIG. 1.

3A and 3B are plan views of a wafer key and a mask key used in automatic alignment using a manual alignment using a light microscope and a laser scanning surface image recognition method, respectively.

4A and 4B are plan and cross-sectional views showing that the shape of the wafer key is abnormal due to the difference in thickness of the strained layer in the manufacturing method of FIGS. 2A to 2D.

5 is a plan view of a thin film type optical path control apparatus according to the present invention.

FIG. 6 is a cross-sectional view of the apparatus shown in FIG. 5 taken along line A′A ′.

7A to 7F are cross-sectional views illustrating a method of manufacturing the apparatus shown in FIG. 6.

8 is a plan view showing a wafer key and a mask key region.

Explanation of symbols for the main parts of the drawings

131: active matrix 133: actuator

135: drain pad 137: protective layer

139: etch stop layer 141: sacrificial layer

143: support layer 145: lower electrode

147: strained layer 149: upper electrode

151: Stripe 153: Empty Hole

155: beer contact 157: air gap

In order to achieve the above object, the present invention provides a method comprising: providing an active matrix having M × N transistors embedded therein and a drain pad formed on one side thereof; And (i) forming a support layer in parallel with the active matrix on one side of the active matrix, the other side of which is in contact with the top of the active matrix, and the other side through an air gap, and ii) forming a lower electrode on the support layer. Iii) forming a strained layer on top of the lower electrode, iii) removing the strained layer in the region where the alignment key to be used in the photographing process is located, and v) an upper portion on the strained layer. It provides a method of manufacturing a thin film type optical path control device comprising the step of forming an actuator having a step of forming an electrode.

In the thin film type optical path control device according to the present invention, the first signal (image signal) transmitted from the outside is applied to the lower electrode through the transistor, the drain pad, and the via contact embedded in the active matrix. At the same time, a second signal (bias signal) is applied to the upper electrode through the common electrode line from the outside to generate an electric field between the upper electrode and the lower electrode. Due to this electric field, the strain layer formed between the upper electrode and the lower electrode causes deformation. The strained layer contracts in a direction perpendicular to the electric field, whereby the actuator including the strained layer is bent at a predetermined angle. The upper electrode, which also functions as a mirror that reflects light, is formed on the actuator and is inclined with the actuator. Accordingly, the upper electrode reflects the light incident from the light source at a predetermined angle, and the reflected light passes through the slit to form an image on the screen.

According to the manufacturing method of the thin film type optical path control apparatus according to the present invention, after the strained layer made of piezoelectric material is formed, the strained layer in the region where the wafer key and the mask key are positioned is removed before entering the alignment process step. One shape wafer key is maintained. The strain layer of the wafer key and mask key region may be removed before forming the upper electrode, may be removed by a dry etching method, or may be partially etched by a dry etching method and then removed by the wet etching method. . In general, as the density of the pattern increases, the dry etching method, which is anisotropic etching, is mainly used. In this case, the micro-change of the wafer key shape due to the thickness difference of the deformation layer may affect other layers to be formed in subsequent processes. . Therefore, after etching a part of the strained layer by the dry etching method and removing the remaining strained layer by the wet etching method having excellent selectivity with the lower layer, it is possible to maintain a perfect wafer key and mask key shape.

Hereinafter, with reference to the accompanying drawings, preferred embodiments of the present invention will be described in detail.

5 is a plan view showing a thin film type optical path control device according to the present invention, Figure 6 is a cross-sectional view taken along the line AA 'of the device shown in FIG.

5 and 6, the thin film type optical path adjusting apparatus according to the present invention includes an active matrix 131 and an actuator 133 formed on the active matrix 131.

The active matrix 131 in which M x N (M, N is an integer) MOS transistors (not shown) and a drain pad 135 is formed on one surface thereof includes the active matrix 131 and the drain pad. A protective layer 137 formed on the upper portion of the 135 and the etch stop layer 139 formed on the protective layer 137 is included.

The actuator 133 is formed such that one side is in contact with a portion of the etch stop layer 139 in which the drain pad 135 is formed and the other side is parallel to the etch stop layer 139 through the air gap 157. A support layer 143 having a cross section, a lower electrode 145 formed on the support layer 143, a strain layer 147 formed on the lower electrode 145, and an upper electrode 149 formed on the strain layer 147. And a via hole 153 vertically formed from one side of the strained layer 147 to the drain pad 135 through the lower electrode 145, the support layer 143, the etch stop layer 139, and the protective layer 137. The lower electrode 145 and the drain pad 135 include a via contact 155 formed to be electrically connected to each other. A stripe 151 is formed on a portion of the upper electrode 149. The stripe 151 operates the upper electrode 149 uniformly to prevent diffuse reflection of light incident from the light source.

In addition, referring to FIG. 5, the plane of the support layer 143 is formed in a shape in which one side thereof has a rectangular concave portion at the center thereof, and the concave portion becomes stepped toward both edges. The other side of the plane of the support layer 143 has a rectangular protrusion that narrows stepwise toward the central portion corresponding to the concave portion. Therefore, the protrusion of the support layer of the actuator adjacent to the concave portion of the support layer 143 is fitted, and the rectangular protrusion is fitted to the concave portion of the support layer of the adjacent actuator. The support layer 143 of the present invention performs the function of the membrane 30 of the device described in the preceding application.

Hereinafter, a method of manufacturing a thin film type optical path control apparatus according to a preferred embodiment of the present invention will be described in detail with reference to the drawings.

7A to 7F illustrate cross-sectional views for describing a method of manufacturing the apparatus shown in FIG. 6. In Figs. 7A to 7F, the same reference numerals are used for the same members as Fig. 6.

Referring to FIG. 7A, a protective layer 137 is formed on an active matrix 131 in which M × N (M and N are integers) MOS transistors (not shown) are embedded and a drain pad 135 is formed on one side thereof. To form. The active matrix 131 is made of a semiconductor such as silicon or an insulating material such as glass or alumina (Al ₂ O ₃ ). The protective layer 137 is formed of a silicate glass (PSG) to have a thickness of about 1.0 μm using a chemical vapor deposition (CVD) method. The protective layer 137 prevents damage to the transistor embedded in the active matrix 131 from subsequent processing.

An etch stop layer 139 is formed on the passivation layer 137. The etch stop layer 139 is formed to have a thickness of about 0.1 to 1.0 탆 using low pressure chemical vapor deposition (LPCVD). The etch stop layer 139 prevents the protective layer 137 and the active matrix 131 from being etched during the subsequent etching process.

Subsequently, a sacrificial layer 141 is formed on the etch stop layer 139. The sacrificial layer 141 is formed of phosphorus silicate glass (PSG) having a high concentration of phosphorus (PG) to have a thickness of about 1.0 to 3.0 μm using the atmospheric pressure chemical vapor deposition (APCVD) method. In this case, since the sacrificial layer 141 covers the upper portion of the active matrix 131 in which the transistor is embedded, the flatness of the surface thereof is very poor. Accordingly, the surface of the sacrificial layer 141 is planarized by polishing using spin on glass (SOG) or chemical mechanical polishing (CMP). Subsequently, a portion of the sacrificial layer 141 in which the drain pad 135 is formed is etched to expose a portion of the etch stop layer 139 to form a position where the support portion of the actuator 133 is to be formed. Here, the wafer keys of the protective layer 137, the etch stop layer 139, and the sacrificial layer 141 are made based on a wafer key formed from a MOS transistor embedded in the active matrix 131, and the actuator 133 A new wafer key is formed during the photolithography process to etch the sacrificial layer 141 to form a support of the substrate and all other layers (support layer, lower electrode, strain layer, upper layer) to be formed in a subsequent process based on the new wafer key. Wafer keys) and all other layers are aligned with the new wafer key.

Referring to FIG. 7B, a support layer 143 having a thickness of about 0.1 to 1.0 μm is formed on the exposed etch stop layer 139 and the sacrificial layer 141. The support layer 143 is formed of a rigid material such as nitride or metal using low pressure chemical vapor deposition (LPCVD). At this time, the stress in the support layer 143 is adjusted by forming the support layer 143 while changing the ratio of the reaction gas in the low pressure reaction vessel.

Referring to FIG. 7C, a lower electrode 145 made of a metal having electrical conductivity such as platinum, tantalum, or platinum-tantalum (Pt-Ta) is formed on the support layer 143. The lower electrode 145 is formed to have a thickness of about 0.01 to 1.0 μm using a sputtering method. A first signal (image signal) is applied to the lower electrode 145 through the transistor and the drain pad 135 embedded in the active matrix 131 from the outside. Subsequently, in order to apply an independent first signal for each pixel, the lower electrode 145 is iso-cutted using a reactive ion etching method using an etching end point.

Subsequently, the strained layer 147 is formed on the lower electrode 145 by using a piezoelectric material such as PZT or PLZT. The strained layer 147 is formed to a thickness of 0.1 to 1.0 탆 using any one of a sol-gel method, sputtering method or chemical vapor deposition (CVD) method, and preferably 0. 0 by sol-gel method. After forming to have a thickness of about 4㎛, the piezoelectric material constituting the strained layer 147 is phase-shifted and polarized by a rapid heat treatment (RTA) method. The deformation layer 147 is deformed by an electric field generated between the upper electrode 149 and the lower electrode 145.

Subsequently, after the photoresist 148 is applied to the entire surface of the resultant layer on which the strained layer 147 is formed, the wafer key and the mask key region (Fig. A mask for opening part A of 8) is aligned with the wafer. In general, mask aligning equipment including a stepper includes a pre-aligning device for mechanically / optically aligning a wafer before performing fine alignment. The pre-alignment device has an alignment accuracy of about 10-50 μm, preferably ± 30 μm. Automatic alignment equipment using the laser scanning method increases the alignment accuracy by adjusting the scanning speed and distance, and manual alignment equipment using the optical microscope increases the alignment accuracy by making a high magnification. However, in the present invention, since the wafer key and the mask key area A located at the outer portion of the active area (part B of FIG. 8) of the wafer are to be opened, it is not necessary to have the alignment accuracy of ± 0.5 μm. It is sufficient to align the mask with the pre-alignment device.

Subsequently, after the photoresist 148 is exposed and developed, the strain layer 147 of the wafer key and mask key region A is removed using the photoresist 148 as an etching mask. In this case, the strained layer 147 may be removed by a dry etching method, or partially etched by a dry etching method, and then the rest may be removed by a wet etching method. In general, as the density of the pattern increases, the dry etching method, which is anisotropic etching, is mainly used. In this case, a fine change of the wafer key shape due to the thickness difference of the deformation layer 147 caused by the step generated in the previous step is followed. It may also affect other layers to be formed in the process. Therefore, it is more preferable to mix the dry etching method and the wet etching method. That is, after etching a part of the strained layer 147 by dry etching, and removing the remaining strained layer by a wet etching method having excellent selectivity with the lower thin film, a perfect wafer key and mask key shape can be maintained. have.

Referring to FIG. 7D, after removing the photoresist 148, an upper electrode 149 is formed on the strained layer 147. The upper electrode 149 is formed of a metal having excellent electrical conductivity and reflectivity, such as aluminum (Al), silver (Ag), or platinum (Pt), to have a thickness of about 0.01 to 1.0 μm using a sputtering method. do. The second electrode (bias signal) is applied to the upper electrode 149 through a common electrode line (not shown) from the outside, and at the same time, the upper electrode 149 also functions as a mirror that reflects light incident from the light source. .

Next, the upper electrode 149, the strain layer 147, and the lower electrode 145 are sequentially patterned to have a predetermined pixel shape. That is, after forming a photoresist layer (not shown) resistant to the material to be etched on the upper electrode 149, the upper electrode 149 is patterned. At this time, the upper electrode 149 is patterned such that a stripe 151 is formed on one side of the upper electrode 149 to uniformly operate the upper electrode 149 to prevent diffuse reflection of light incident from the light source. Subsequently, a photoresist protective layer (not shown) is again formed on the patterned upper electrode 149 and the strained layer 147, and then the strained layer 147 is patterned into a predetermined pixel shape. In this manner, the lower electrode 145 is also patterned to have a predetermined pixel shape.

Referring to FIG. 7E, the strain layer 147 and the lower electrode from the portion of the strain layer 147 under which the drain pad 135 is formed under the photolithography process to the upper portion of the drain pad 135. The via hole 153 is formed by sequentially etching the 145, the support layer 143, the etch stop layer 139, and the protective layer 137. Subsequently, a via contact 155 may be formed to deposit an electrically conductive metal such as tungsten (W), platinum (Pt), or titanium (Ti) to electrically connect the drain 135 and the lower electrode 145. . Thus, the via contact 155 is formed vertically from the lower electrode 145 to the top of the drain pad 135 in the via hole 153. Therefore, the first signal (image signal) applied from the outside is applied to the lower electrode 145 through the transistor, the drain pad 135 and the via contact 155 embedded in the active matrix 131.

Referring to FIG. 7F, after forming a photoresist protective layer (not shown) to cover the exposed surfaces of the upper electrode 149, the strained layer 147, and the lower electrode 145, the photoresist protective layer (not shown) is used as an etching mask. The support layer 143 is etched into a predetermined pixel shape. Subsequently, the sacrificial layer 141 is etched using hydrogen fluoride (HF) vapor using the photoresist protective layer as an etching mask to form an air gap 157, and thereafter, washing and drying are performed to perform a thin film type. Complete the AMA device.

As described above, after completing the M × N thin film type AMA devices, a metal such as chromium (Cr), nickel (Ni), or gold (Au) may be sputtered or evaporated into the active matrix 131. It is deposited at the bottom to form an ohmic contact (not shown). Next, a TCP (Tape Carrier Package) (not shown) bonding for applying a second signal (bias signal) to the upper electrode 149 and a first signal (image signal) to the lower electrode 145 is prepared. The active matrix 131 is cut to a predetermined thickness by using a conventional photolithography process. Subsequently, a photoresist layer (not shown) is formed on the pad of the AMA panel so that the pad of the AMA panel (not shown) has a sufficient height during TCP bonding. Subsequently, a portion of the photoresist layer, in which no pad is formed, is patterned to expose the pad of the AMA panel. Next, the photoresist layer is etched by a dry etching method or a wet etching method, and the active matrix 131 is completely cut into a predetermined shape, and then the pad of the AMA panel and the pad of TCP are unidirectionally conductive. ACF) (not shown) to complete the manufacture of the thin film AMA module.

In the above-described thin film type optical path control device of the present invention, the first signal (image signal) transmitted through the pad of TCP and the pad of AMA panel is the MOS transistor, drain pad 135 and via which are built in the active matrix 131. It is applied to the lower electrode 145 through the contact 155. At the same time, a second signal (bias signal) is applied to the upper electrode 149 through a pad of TCP, an AMA panel pad, and a common electrode line to generate an electric field between the upper electrode 149 and the lower electrode 145. Due to such an electric field, the deformation layer 147 formed between the upper electrode 149 and the lower electrode 145 causes deformation. The strained layer 147 contracts in a direction perpendicular to the electric field, and the actuator 133 including the strained layer 147 is bent in a direction opposite to the direction in which the support layer 143 is formed. Therefore, the upper electrode 149 which also functions as a mirror on the actuator 133 is inclined in the same direction. Accordingly, the light incident from the light source is reflected by the inclined upper electrode 149 at a predetermined angle, and then passes through the slit to be projected onto the screen to form an image.

As described above, according to the manufacturing method of the thin film type optical path control apparatus according to the present invention, after forming the strained layer made of the piezoelectric material, the strained layer in the region where the wafer key and the mask key are located is removed before entering the alignment process step. Thus, the wafer key of the initially designed shape is maintained. In addition, the strain layer of the wafer key and mask key region may be partially etched by a dry etching method and then removed by the wet etching method having a very good selectivity with the lower layer, thereby maintaining a perfect wafer key and mask key shape. Therefore, by solving the nonuniformity of the alignment key caused by the thickness difference of the deformation layer, it is possible to improve the workability and process stability of the photographic process.

Although described above with reference to a preferred embodiment of the present invention, those skilled in the art will be variously modified and changed within the scope of the invention without departing from the spirit and scope of the invention described in the claims below I can understand that you can.

Claims (5)

Providing an active matrix having M × N (M, N is an integer) transistors and a drain pad formed on one side thereof; And I) forming a support layer on top of the active matrix, i) forming a support layer in parallel with the active matrix with one side contacting the top of the active matrix and the other side via an air gap, ii) forming a lower electrode on the support layer (B) forming a strained layer on top of the lower electrode, iii) removing the strained layer in the region where the alignment key to be used in the photographing process is located, and v) placing an upper electrode on top of the strained layer. A method of manufacturing a thin film type optical path control device comprising the step of forming an actuator having a step of forming. The method of claim 1, wherein the removing of the strained layer in the region where the alignment key to be used in the photolithography process is located comprises applying a photoresist to the entire surface of the resultant layer on which the strained layer is formed. Mechanically and optically aligning the photoresist; exposing and developing the photoresist to open an area in which the alignment key is located; and removing the strained layer using the developed photoresist. The manufacturing method of the thin film type optical path control apparatus. The method of claim 2, wherein the pre-alignment device has an alignment accuracy of ± 30 μm. The method of claim 1, wherein the strained layer in the region where the alignment key is located is removed by a dry etching method. The method of claim 1, wherein the strained layer in the region where the alignment key is located is partially removed by a dry etching method, and then the remainder is removed by a wet etching method.