KR19990003595U - Horizontal Linearity Compensation Circuit of Mulkink Monitor - Google Patents

Abstract

The present invention relates to a horizontal linearity compensation circuit for improving the linearity of the horizontal deflection of a multi-sync monitor.

The circuit of the present invention is a multi-sync monitor that can improve the linearity of the horizontal deflection by adjusting the horizontal linearity coil in accordance with the horizontal synchronizing frequency. 1 is connected to one end of the horizontal linearity coil (L1), the second horizontal linearity coil (L2) for compensating for the optimal horizontal linearity when the horizontal synchronization frequency is low frequency, the first horizontal linearity coil (L1) The first switching means Q2, the second switching means Q3 connected to one end of the second horizontal linearity coil (L2) is turned on when the low frequency, the horizontal and vertical synchronization frequency is input to determine the mode, In case of outputting the control signal CS1 at 'high' level, and outputting the control signal CS1 at the 'low' level at high frequency. Ecom 100 and the inverting unit 200 for inverting the control signal CS1 output from the micom 100 to turn on / off the second switching means Q3 through the resistor R2, Optimum horizontal linearity can be compensated by selecting the horizontal linearity coil by the switching operation according to the horizontal synchronizing frequency.

Description

An compensating circuit of linearity coil in a multi-sync monitor

The present invention relates to horizontal deflection in a multi-sync monitor, and more particularly, to a horizontal linearity compensation circuit configured to switch a linearity coil according to a horizontal frequency in order to improve linearity of horizontal deflection.

In general, multi-sync monitors are monitors that can vary in resolution by accepting various horizontal and vertical sync frequencies depending on the video card they support. For example, the resolution is 640 x 480 in VGA mode and the horizontal synchronization frequency is 31.5KHz, the resolution is 800 x 600 in SVGA mode, and 1024 x 768 or 1280 x 1024 in XGA mode. As the resolution changes according to the mode as described above, the horizontal and vertical synchronizing frequencies vary accordingly, and accordingly, various parameter values of the monitor need to be adjusted.

1 is a circuit diagram showing a conventional horizontal deflection without parameter adjustment.

Referring to FIG. 1, the horizontal driving unit 10 receives a horizontal drive signal (H.drive) from a video IC or a horizontal oscillation IC (not shown) including a horizontal driving transistor and a horizontal driving transformer (HDT) and amplifies it. The base of the horizontal output transistor Q1 is driven.

When the horizontal output transistor Q1 is turned on by the H. drive signal, current flows to the horizontal output transistor Q1 through the horizontal deflection coil H.DY. Thus, during the period in which the horizontal output transistor Q1 is turned on, it corresponds to the second half of the effective scanning period of the horizontal sawtooth wave, and when the horizontal output transistor Q1 is rapidly turned off according to the horizontal driving signal, the horizontal deflection coil H The accumulated current in .DY) charges the retrace capacitor (ie, resonant capacitor: Cr). Subsequently, when the retrace capacitor Cr is completely charged, the discharge capacitor is discharged back to the horizontal deflection coil H. DY. Accordingly, total energy is accumulated in the horizontal deflection coil H. DY.

In this way, the entire period of the charging and discharging of the retrace capacitor Cr determines the retrace period.

Subsequently, when all the energy is accumulated in the horizontal deflection coil H.DY, and the voltage of the horizontal deflection coil H.DY is such that the forward bias is applied to the damper diode Dd, the damper diode Dd becomes conductive. The current flowing through the horizontal deflection coil (H.DY) gradually returns to zero.

As such, when the current reaches zero, the horizontal output transistor Q1 is turned on again by the H. drive signal, and the horizontal sawtooth current is applied to the horizontal deflection coil H.DY while repeating the above process. Flow to achieve horizontal deflection. At this time, the horizontal output unit is connected to the FBT (not shown), the B + voltage applied from the SMPS is applied to the FBT.

In addition, the horizontal deflection coil (H.DY) is connected to the correction capacitor (Cs), the damping resistor (R1) and the horizontal linearity coil (L1) for the 'S' correction to improve the linearity of the horizontal deflection.

However, in the case of a multi-sync monitor, it should be able to support horizontal frequencies from 31KHz to 69KHz. Since the characteristics of the linearity coil that compensates for horizontal linearity cannot have the same characteristics for a wide range of horizontal frequencies, as shown in FIG. The linearity pattern at the maximum frequency is reversed, so optimum picture adjustment is not possible.

Therefore, in the horizontal deflection circuit, when the horizontal synchronizing frequency is changed like a multi-sync monitor to improve the linearity of the water deflection, the inductance value of the horizontal linearity coil needs to be changed accordingly.

The present invention has been made to meet the above necessity, to provide a horizontal linearity compensation circuit to maintain an optimal horizontal linearity state by switching the horizontal linearity coil in accordance with the horizontal synchronization frequency in the multi-sync monitor. There is this.

The circuit of the present invention for achieving the above object, in the multi-sync monitor that can improve the linearity of the horizontal deflection by adjusting the horizontal linearity coil according to the horizontal synchronizing frequency, it is optimal when the horizontal synchronizing frequency is a high frequency A first horizontal linearity coil that compensates for horizontal linearity of the second horizontal linearity coil that compensates for optimal horizontal linearity when the horizontal synchronization frequency is low frequency, and a first horizontal linearity coil that is connected to one end of the first horizontal linearity coil and turned on when the high frequency is high Switching means, the second switching means connected to one end of the second horizontal linearity coil is turned on when the low frequency, the horizontal and vertical synchronization frequency is input to determine the mode, when the low frequency outputs a 'high' level control signal In case of high frequency, it outputs control signal of 'low' level. And a reversing unit for inverting the control signal output from the microcomputer and turning on / off the second switching means through the resistor.

1 is a circuit diagram showing a general horizontal deflection portion of a monitor;

2 is a perspective view showing that the screen is not balanced by the horizontal linearity coil when the horizontal frequency is minimum and maximum;

3 is a circuit diagram showing a horizontal linearity compensation circuit according to the present invention in a monitor.

＊ Explanation of symbols for main parts of drawing

10: horizontal drive unit 100: microcomputer

200: inverted portion H.DY: horizontal deflection coil

Q1: horizontal output transistor Q2: first switching unit

Q3: second switching unit Dd: damping diode

Cr: Return Capacitor Cs: S Correction Capacitor

L1: first horizontal linearity coil L2: second horizontal linearity coil

R1, R2: resistance

Hereinafter, an embodiment according to the present invention will be described in detail with reference to the accompanying drawings.

2 is a circuit diagram illustrating a horizontal linearity compensation circuit of a multi-sync monitor according to the present invention.

As shown in FIG. 2, the circuit of the present invention includes a horizontal driving unit 10, a horizontal deflection coil H.DY, a horizontal output transistor Q1, a damping diode Dd, a retrace capacitor Cr, and a first horizontal line. The linearity coil L1, the second horizontal linearity coil L2, the first switching unit Q2, the second switching unit Q3, the microcomputer 100, the inverting unit 200, and the like, and the inverting unit Reference numeral 200 includes a NPN transistor Q4 having a base terminal connected to the microcomputer 100 and a collector terminal connected to the second switching unit Q3 through a resistor R2 and the emitter terminal grounded. .

In general, the use of the microcomputer 100 in order to implement a variety of functions in the image display device such as a monitor and provide a convenient function is increasing.

For example, in a monitor designed to accommodate various synchronization frequencies, such as a multi-sync monitor, it is necessary to change various parameter values according to the synchronization mode. Particularly, the capacitance value of the resonant capacitor (ie, retrace capacitor) and S in a horizontal circuit are required. It is necessary to change the capacitance value of the compensation capacitor and the inductance value of the horizontal linearity coil according to the synchronization frequency.

As described above, the operation of changing the parameter value is generally performed by inputting an input / output command in order to change the capacitance or inductance value after the microcomputer determines the mode by receiving the vertical and horizontal synchronization signals.

The microcomputer 100 receives the vertical and horizontal synchronization signals (H.sync, V.sync) from the video card of the computer through the de-sub connector, determines the mode, and then sets the control signal according to the mode. Outputs (CS1).

The control signal CS1 output by the microcomputer 100 is a 'high' level when the horizontal synchronizing frequency is low between 31 KHz and 38 KHz, and is a 'low' level when the horizontal synchronizing frequency is between a high frequency between 38 and 69 KHz. According to the control signal CS1, one of the horizontal linearity coils L1 and L2 is selected by the switching operation of the switching units Q2 and Q3. In this case, the switching units Q2 and Q3 are implemented as field effect transistors (FETs).

First, when the horizontal synchronization frequency is a low frequency, that is, between 31KHz and 38KHz, the control signal CS1 output from the microcomputer 100 is 'high', so the first FET Q1 is turned off and the inverter 200 is turned on. As the NPN transistor Q4 is turned on, 'low' is applied to the gate terminal of the second FET Q3 through the resistor R2 to turn on the second FET Q3.

Accordingly, the horizontal linearity coil becomes 'L2', and 'L2' is a linearity coil having an inductance value that optimally compensates the horizontal linearit at a low frequency of 38 KHz or less.

Subsequently, when the horizontal synchronizing frequency is a high frequency, that is, between 38KHz and 69KHz, since the control signal CS1 is 'low', the first FET Q2 is turned on and the NPN transistor Q4 of the inverter 200 is turned on. Turned off, the horizontal linearity coil becomes 'L1'. 'L1' is a linearity coil having an inductance value that optimally compensates for horizontal linearity at a high frequency of 38 KHz or higher.

At this time, the same coffee sheet Cr 'and diode Dd' are connected in series to the retrace capacitor Cr and the damper diode Dd. This is a diode modulation circuit, which is connected to the horizontal size (H.size) signal and the pincushion signal. Therefore, to adjust the pincushion and size by controlling the current flow through a horizontal size transistor (not shown).

As described above, the circuit of the present invention can maintain the optimal horizontal linearity by selecting the horizontal linearity coil by the switching operation according to the horizontal dynamic frequency in the multi-sync monitor.

Claims (3)

In the multi-sync monitor which can improve the linearity of the horizontal deflection by adjusting the horizontal linearity coil according to the horizontal synchronizing frequency, A first horizontal linearity coil L1 that compensates for an optimal horizontal linearity when the horizontal synchronizing frequency is a high frequency; A second horizontal linearity coil L2 that compensates for an optimal horizontal linearity when the horizontal synchronizing frequency is a low frequency; First switching means (Q2) connected to one end of the first horizontal linearity coil (L1) and turned on at a high frequency; Second switching means (Q3) connected to one end of the second horizontal linearity coil (L2) and turned on at a low frequency; The microcomputer 100 which determines the mode by receiving the horizontal and vertical synchronization frequencies, and outputs the control signal CS1 of the 'high' level at the low frequency and the control signal CS1 of the 'low' level at the high frequency. ); And Horizontal linearity compensation of the multi-sync monitor comprising an inverting unit 200 which inverts the control signal CS1 output from the microcomputer 100 to turn on / off the second switching means Q3 through the resistor R2. Circuit. 2. The horizontal linearity compensation circuit of claim 1, wherein the first switching means (Q2) or the second switching means (Q3) are implemented as field effect transistors. 2. The NPN of claim 1, wherein the inverting unit 200 has a base end connected to the microcomputer 100, a collector end connected to the second switching unit Q3 through a resistor R2, and an emitter end is grounded. A horizontal linearity compensation circuit of a multi-sync monitor, comprising: transistor Q4.