KR19980065501A - Line Memory Sharing Method to Improve Image Quality Degradation in Vertical Scaler - Google Patents

Abstract

The present invention doubles the number of line delay elements of the vertical interpolation filter for improving image quality by sharing the line memory by reducing and storing the horizontal line data by 1/2 when the horizontal scaling ratio is 1/2 or less in the vertical scale mode in the vertical scaler. The present invention relates to a method for improving resolution by increasing a resolution. A method of sharing a line memory for improving image quality deterioration occurring in a large vertical reduction mode in a vertical scaler according to the present invention includes a method for improving image quality when a horizontal scaling ratio is 1/2 or less. A line data reduction step of sequentially reducing the number of line data to be stored in a line memory unit used as a line delay element for interpolation filtering, and storing the line data sequentially in the line memory unit, and time-dividing the output of the line memory unit. The multiplexed odd-numbered clocks output data delayed by odd-numbered lines, respectively. Is a time-division multiple output step for outputting data delayed by even lines, and filters and stores data input from an odd numbered clock, sums the stored data with filtering data outputted from an even numbered clock, and outputs the result of the odd numbered output. It includes data interpolation step that replaces invalid data located in the clock with data that is horizontally interpolated with neighboring valid data so that it becomes valid data for all pixels. It can be improved.

Description

Line Memory Sharing Method to Improve Image Quality Degradation in Vertical Scaler

The present invention relates to a method of controlling a scaler for reducing a screen by having a horizontal and vertical scaler. When the horizontal scaling ratio is less than 1/2 in the vertical reduction mode, the line memory is shared by reducing and storing the horizontal line data by 1/2. The present invention relates to a method of improving the resolution by doubling the number of line delay elements of a vertical interpolation filter for improving image quality.

1 illustrates a general configuration of a scaler for reducing a screen. In the scaler shown in FIG. 1, the first line memory section 10 and the second line memory section 12 each having two line memories input luminance data Y and color data C, respectively. Delays up to 2 lines, and the vertical scaler 14 outputs luminance and color data (Y, YD, YDD, C, CD, CDD) output from the first line memory unit 10 and the second line memory unit 12. To perform vertical scaling and to filter each image to extract effective lines and improve image quality. The horizontal scaler 16 performs horizontal scaling of luminance data YZ and color data CZ output from the vertical scaler 14. To output scaling data (YOUT, COUT) of the complete screen.

In the vertical scaler 14 shown in Fig. 1, three-tap interpolation filtering is conventionally performed to improve the resolution in the vertical reduction mode. That is, in the vertical scaler 14, the one-line delayed data YD and CD output from the first line memory 10 and the second line memory 12, the two-line delayed data YDD and CDD, and the current line data ( Y and C) are interpolated to improve the resolution. However, if only limited line data is used as described above, the filtering does not have a significant effect in a mode with a large vertical scaling ratio. Therefore, the number of filter taps must be increased to solve this problem. In order to do this, the number of line memories or capacity must be increased. There was a problem. In other words, in order to prevent the output of meaningless line data that is not displayed on the screen when the vertical scaling ratio to be reduced is large, and to improve the image quality, and to improve the image quality, the number of filtered input line data must be increased. There was a weighted problem.

The technical problem to be achieved by the present invention is to reduce the line delay of the vertical interpolation filter for image quality improvement by sharing only the existing line memory by storing only 1/2 of the horizontal line data when the horizontal scaling ratio is 1/2 or less in the vertical reduction mode in the scaler. In a vertical scaler that doubles the number of devices to improve the resolution, it provides a line memory sharing method for improving image quality degradation occurring in a large vertical reduction mode.

1 is a block diagram showing the configuration of a general scaler.

2 is a timing diagram showing general luminance and color difference data.

FIG. 3 is a timing diagram illustrating time division multiplexed data of luminance and chrominance data shown in FIG. 2.

4 is a flowchart illustrating a line memory sharing method for improving image quality deterioration occurring in a large vertical reduction mode in a vertical scaler according to the present invention.

5A and 5B show data output from the first and second line memory units shown in FIG. 1 to explain the operation of the present invention in the vertical reduction mode when the normal mode and the horizontal scaling ratio are 1/2 or less, respectively. One timing diagram.

Explanation of symbols for main parts of the drawings

S40 ... horizontal scaling ratio determination step, S42 ... line data number reduction step,

S44 ... Time division multiple output stage, S46 ... Data interpolation stage,

S48 ... Perform normal mode.

In order to achieve the above object, a line memory sharing method for improving image quality deterioration occurring in a large vertical reduction mode in a vertical scaler according to the present invention includes a horizontal and vertical scaler in a method of controlling a scaler that reduces a screen. ) When the horizontal scaling ratio is 1/2 or less, the line memory is sequentially stored in the line memory unit by reducing the number of line data to be stored in the line memory unit used as the line delay element for interpolation filtering to 1/2. A line data reduction step of doubling the total number of lines stored in the unit; b) time-division multiplexing the output of the line memory unit to output data delayed by odd lines at odd-numbered clocks, and output data delayed by even lines at even-numbered clocks; And c) filtering and storing the data input from the odd-numbered clock, and adding the stored data with the filtering data output from the even-numbered clock to output the result, and valid data adjacent to the invalid data located at the odd-numbered clock. And interpolating the horizontally interpolated data so as to be valid data for all pixels.

Hereinafter, a line memory sharing method for improving image quality deterioration occurring in a large vertical reduction mode in a vertical scaler according to the present invention will be described with reference to the accompanying drawings.

First, before considering the present invention, let's look at how to use the line memory in the normal mode and the vertical reduction mode.

FIG. 2 is a timing diagram illustrating general luminance and color data, and FIG. 3 is a timing diagram illustrating multiplexed data of the luminance and color data of FIG. 2. In the 4: 2: 2 format of CCIR601 as shown in FIG. 1, since the color data U and V change only once when the luminance data Y changes twice, the color data at the transition point of the luminance data Y that changes every clock. By changing (U and V) respectively, it is possible to transmit both luminance data (Y) and color data (U and V) in 4: 2: 2 format in 4: 4: 0 format as shown in FIG. Able to know. Accordingly, in the general scaler, in the general mode, four line memories are used to store and restore all the one-line delay data and the two-line delay data of each luminance data (Y) and color data (U and V). Able to know.

However, in a mode where the horizontal scaling ratio is less than 1/2, first, at least one of the two neighboring pixels in the horizontal scaler will be discarded, so it is not necessary to store all the data of one line in the front line memory. have. That is, in the mode where the horizontal scaling ratio is 1/2 or less, it can be seen that one line memory can be used as two line delay elements by dividing each line memory in half and storing line data reduced in half in each area. . Therefore, if the above method is used, the 5-tap data instead of the existing 3-tap data can be used as the input of the vertical interpolation filter for improving the quality of the vertical scaler, and thus it can be utilized to improve the resolution of the vertical scaler.

4 is a flowchart illustrating a line memory sharing method for improving image quality deterioration occurring in a large vertical reduction mode in a vertical scaler according to an embodiment of the present invention. 5A is a timing diagram of data output from the first and second line memory units 10 and 12 shown in FIG. 1 in the normal mode (when the horizontal scaling ratio is greater than 1/2), and FIG. 5B. Is a timing diagram of data output from the first and second line memory units 10 and 12 shown in FIG.

4, in the horizontal scaling ratio determination step (step S40), it is determined whether the horizontal scaling ratio is 1/2 or less, and in the normal mode performing step (S48), the horizontal scaling ratio is 1 in the horizontal scaling ratio determination step (step S40). If it is determined that it is larger than / 2, the normal mode is executed. As shown in FIG. 5A, the line memory of each path in the first and second line memory units 10 and 12 using the read / write signal RD / WRD signal having the same cycle as the system clock is shown in FIG. 5A. 768 pixels x 9 bits) so that the first line memory unit 10, the second line memory unit 12, and the vertical scaler can sequentially store and read all data of the luminance data Y and the color data C. What is necessary is just to control (14).

In the step of reducing the number of line data (step S42), when the horizontal scaling ratio is determined to be 1/2 or less in the horizontal scaling ratio determination step (step S40), the data ratio of 4: 2: 2 input to each line memory is 2: 1. : 1 to data. Only one half of the input data is sequentially stored in each line memory, and up to four lines of data are respectively stored in the first and second line memory units 10 and 12, respectively. Accordingly, since the vertical scaler 14 inputs four lines of delayed data to perform vertical interpolation filtering for improving image quality, the reduction of the scaling factor of the vertical scaler 14 is large, thereby preventing deterioration of image quality.

On the other hand, in the time division multiple output step (step S44), as in the line data number reduction step (step S42), the line memory is shared to double the total number of line delay elements so that the number of taps becomes 5, so as to the vertical scaler 14. Since there are only three paths where luminance and color data are input, respectively, the vertical scaler of 5 tap data through 3 paths using time division multiplexing method to input 5 tap data using only the existing path without specifying additional paths. Enter (14). 5B illustrates output data of the first and second line memory units 10 and 12 output in three paths, respectively. Referring to FIG. 5B, the luminance and color data Y0, U0 and V0 of the current line, the luminance and color data Yd0, Ud0 and Vd0 delayed by one line, and the luminance and color data Y2d0, U2d0 and V2d0 delayed by two lines It can be seen that the 3-line delayed luminance and color data Y3d0, U3d0 and V3d0 and the 4-line delayed luminance and color data Y4d0, U4d0 and V4d0 are time-division multiplexed and output.

In addition, in the time-scaled output step (step S44) of the vertical scaler 14, when the data of the time-division multiplexed five taps are inputted into three paths, the data can be calculated only after every two clocks. In S46), the data is horizontally interpolated. In other words, the incomplete filter operation value calculated in advance in the previous clock is stored, and later data is summed together to perform data interpolation. This replaces invalid values at odd-numbered incomplete clock points from valid data with valid data again through horizontal interpolation. Accordingly, the finally output data is in the same format as the data coming out of the normal mode, and then horizontal scaling is performed on the horizontal scaler 16, thereby outputting the scaling data (YOUT, COUT) of the complete screen with improved image quality.

As described above, the line memory sharing method for improving image quality deterioration occurring in a large vertical reduction mode in the vertical scaler according to the present invention is an image quality caused in a vertical reduction mode without adding a line memory when the horizontal scaling ratio is 1/2 or less. Deterioration can be improved.

Claims (2)

In the scaler control method for reducing the screen by having a horizontal and vertical scaler, a) When the horizontal scaling ratio is 1/2 or less, the number of line data to be stored in the line memory unit used as a line delay element for the vertical interpolation filtering for image quality improvement is reduced to 1/2 to sequentially A line data reduction step of doubling the total number of lines stored in said line memory section by storing; b) time-division multiplexing the output of the line memory unit to output data delayed by odd lines at odd-numbered clocks, and output data delayed by even lines at even-numbered clocks; And c) After filtering and storing the data input from the odd-numbered clock, the stored data is combined with the filtered data output from the even-numbered clock and output the result, and the valid data adjacent to the invalid data located at the odd-numbered clock are horizontally aligned. And a data interpolation step of replacing the interpolated data so that the data becomes valid data for all pixels. The line memory sharing method for improving image quality degradation occurring in a large vertical reduction mode in a vertical scaler. The line memory sharing method of claim 1, wherein the reducing of the line data is performed on luminance and color data, respectively.