KR19980042343A - Thin Film Capacitor Structures with Reduced Dielectric Constant - Google Patents

Abstract

In the capacitor structure, a dielectric film is provided between the electrode films. The dielectric film is formed of a material having a relative dielectric constant of 40 or more. Intervening films are provided between the dielectric film and the electrode films to reduce the thickness of the space charge layer formed between the dielectric film and the electrode film when no intervening film is provided.

Description

Thin Film Capacitor Structures with Reduced Dielectric Constant

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to thin film capacitor structures used in integrated circuits, and more particularly, to thin film capacitor structures that can have increased capacitance over a unit area and can be used in large scale integrated circuits (LSI).

In a dynamic random access memory (DRAM) in which a memory cell is composed of MOS transistors and capacitors, the area of the memory cell is gradually decreasing as LSIs are highly integrated in recent years. On the other hand, the capacitance of the capacitor is required more than the selected value even when the memory cell area is reduced in this way. Thus, in order to provide a capacitor with the required capacitance, the following methods are used alone or in combination. That is, one method is to make the film thickness of the capacitor dielectric film thin for the thin film capacitor. Another method is to create a thin film capacitor structure three-dimensionally to increase the electrode area. Another method is to form a capacitor dielectric film from a dielectric material having a high dielectric constant. For example, this technique is described in A STACKED CAPACITOR WITH (Ba _x Sr _1-x ) TiO ₃ FOR 256M DRAM (Technical Digest of IEEE International Electron Devices Meeting 1991, p. 823) by K. Koyama et al. .

In the past, a laminated film of a silicon oxide film and a silicon nitride film was often used as a capacitor dielectric film. However, if the thickness of the capacitor dielectric film is simply reduced, the leakage current between the electrodes increases, so that there is a limit to the thinning of the dielectric film of the capacitor.

In addition, the three-dimensional capacitor structure complicates the manufacturing process of the memory. As a result, memory manufacturing costs rise and production efficiency decreases.

In contrast, a method of forming a capacitor dielectric film from a material such as (Ba, Sr) TiO ₃ having a high dielectric constant, compared with the dielectric constants of silicon oxide films and silicon nitride films that have been used in the related art, has a relationship with a reduced memory cell area. There is a possibility that the memory can be realized by using a simple capacitor structure having the required capacitance without the need.

On the other hand, in recent years, as the LSI is highly integrated, it is required to make the thickness of the capacitor dielectric film even thinner. However, in a capacitor dielectric film formed of a material having a high dielectric constant, when the thickness of the capacitor dielectric film is thinner than about 100 nm, the substantial dielectric constant is significantly reduced. Therefore, the capacitance over the unit area does not increase constantly as the film thickness of the capacitor dielectric film decreases. The capacitance became almost saturated.

For this reason, it is difficult to obtain a capacitor having the required capacitance by simply making the capacitor dielectric film thin.

The present invention has been made in light of the above circumstances.

It is an object of the present invention to provide a thin film capacitor structure.

Another object of the present invention is to provide a thin film capacitor structure in which the effective dielectric constant of the capacitor dielectric film is not reduced even when the thin capacitor dielectric film is formed of a material having a high dielectric constant.

It is another object of the present invention to provide a thin film capacitor structure in which the capacitor has a sufficiently large capacitance even when the capacitor region is small.

In order to achieve the characteristics of the present invention, a capacitor structure includes an electrode film, a dielectric film provided between the electrode films and formed of a material having a relative permittivity of 40 or more, and an intervening film provided between the dielectric film and the electrode films, respectively. film) to reduce the thickness of the space charge layer formed between the dielectric film and the electrode film when the intervening film is not provided.

The dielectric film is preferably formed of a material having a perovskite type crystal structure. For example, the dielectric layer is BaTiO _3, SrTiO _3, PbTiO _3, and BaTiO _3, SrTiO _3, PbTiO ₃ are formed as one solid solution of at least two materials of.

Each of the intervening films is, for example, an antiferroelectric film formed of a material of perovskite type crystal structure. For example, the preferred anti-ferroelectric film is formed from a material selected from the group consisting of a solid solution of PbZrO _3, PbZrO ₃ and PbTiO ₃ solid solution, and PbZrO _3, PbZrO _3, LaZrO ₃ and LaTiO ₃ in. When the material is a solid solution of PbZrO ₃ and PbTiO ₃ , PbZrO ₃ contains 95 mol% or more. In addition, when the material is a solid solution of PbZrO ₃ , PbTiO ₃ , LaZrO ₃ and LaTiO ₃ , the ratio of Zr: Ti is 70:30 or more, and the ratio of Pb: La is 80:20 or more.

Meanwhile, each of the interlayers may be a layered bismuth compound film represented by the general formula of (Bi ₂ O ₂ ) ²⁺ (A _m-1 B _m O _{3m + 1} ) ^2- , wherein A is +1, Is an ion having a number of valences selected from +2 and +3 valences, B is an ion having a number of valences selected from +4, +5 and +6 valences, m is a positive integer ranging from 1 to 5, The number of valences of A, B and m is chosen such that the number of valences of A _m-1 B _m O _{3m + 1} is -2.

The overall film thickness of the dielectric film and the intervening films may be in the range of 50 to 25 nm. In addition, the film thickness of the dielectric film may be in the range of 30 to 5 nm.

Each of the interlayers may include a conductive layer, and the interlayer may be composed of a plurality of layers.

In order to achieve the other characteristics of the present invention, a capacitor structure is provided with electrode films, a dielectric film provided between the electrode films and formed of a material having a relative dielectric constant of 40 or more, and an antiferroelectric material provided respectively between the dielectric film and the electrode films. Includes acts.

In order to achieve another feature of the present invention, a capacitor structure is provided between electrode films, a dielectric film provided between the electrode films and formed of a material having a relative permittivity of 40 or more, and between the dielectric film and the electrode films, respectively. ^{_{(Bi 2 O 2) 2+ (}} a m-1 B m O 3m + 1) comprises bismuth layer compound of the shape represented by the following formula of the ^two-film, where a is +1, +2 and +3 in valence Is an ion having the number of valences selected, B is an ion having the number of valences selected from among +4, +5, and +6 valences, m is a positive integer ranging from 1 to 5, and valency of A, B, and m The numbers of are selected so that A _m-1 B _m O _{3m + 1} is -2.

1 is a cross-sectional view illustrating a thin film capacitor structure according to a first embodiment of the present invention in which an antiferroelectric film is provided between an electrode film and a capacitor dielectric film having a high dielectric constant.

FIG. 2 is a cross-sectional view illustrating a thin film capacitor structure according to a second embodiment of the present invention in which there is a layered bismuth compound thin film between an electrode film and a capacitor dielectric film having a high dielectric constant.

Explanation of symbols for the main parts of the drawings

1: substrate

2: lower electrode film

3: PbZrO ₃ thin film

4: (Ba _0.5 Sr _0.5 ) TiO ₃ film

5: upper electrode

Next, the capacitor structure of the present invention will be described in detail below with reference to the accompanying drawings.

First, the capacitor structure according to the first embodiment of the present invention will be described. 1 schematically shows a cross-sectional view of a thin film capacitor structure of a first embodiment of the present invention.

Referring to FIG. 1, the thin film capacitor of the first embodiment is composed of a high dielectric film, an antiferroelectric thin film, and an electrode film. The high dielectric film is formed of a material having a high dielectric constant. This high dielectric film is interposed between the electrode films. Antiferroelectric thin films are formed of materials exhibiting antiferroelectric properties. Each of the antiferroelectric thin films is provided between the high dielectric film and one of the electrode films. Each of the antiferroelectric thin films may be composed of a plurality of layers each formed of different materials.

The material of the high dielectric film used in the present invention preferably has a relative permittivity of about 40 or more. For example, the material of the high dielectric film preferably has a perovskite crystal structure. In particular, solid solutions of BaTiO ₃ , SrTiO ₃ , PbTiO ₃ and at least two of these materials are preferred. In solid solution, the composition ratio can be arbitrarily selected to obtain the required permittivity.

It is preferable that the antiferroelectric material of the antiferroelectric thin film has a perovskite crystal structure. For example, PbZrO ₃ is preferred. Instead, Pb (Zr, Ti) O ₃ or (Pb, La) (Zr, Ti) O ₃ containing PbZrO ₃ as a main component is preferred. Here, Pb (Zr, Ti) O ₃ means a solid solution of PbZrO ₃ and PbTiO ₃ . Similarly, (Pb, La) (Zr, Ti) O ₃ represents a solid solution composed of four kinds of components.

In this case, Pb (Zr, Ti) O ₃ needs to contain PbZrO ₃ at least so as to exhibit antiferroelectric properties. In particular, it is preferable that a PbZrO ₃ is not less than 95 mol%. In the case of (Pb, La) (Zr, Ti) O ₃ , the ratio of Zr: Ti is 70:30 or more so that Zr is rich, and the ratio of Pb: La is 80:20 or more so that Pb is rich. Particularly preferred.

Next, a method of manufacturing a thin film capacitor structure according to a first embodiment of the present invention will be described with reference to FIG. 1.

A sapphire substrate 1 having an R surface is used as the substrate. After the substrate 1 is rinsed, palladium is deposited at a substrate temperature of about 300 占 폚 by a sputtering method to form a lower electrode film 2 having a film thickness of 300 nm. Then, the PbZrO ₃ thin film 3 is formed to a film thickness of about 10 nm by a known sol-gel method.

A (Ba _0.5 Sr _0.5 ) TiO ₃ film 4 is formed on the PbZrO ₃ thin film ₃ with a film thickness of about 30 nm at a substrate temperature of about 650 ° C. by a sputtering method as a capacitor dielectric film. Further, the PbZrO ₃ thin film 3 is formed to a film thickness of about 10 nm by the sol-gel method. Then, Ti and Au as the upper electrode 5 are deposited in this order with a film thickness of 50 nm to 300 nm, respectively. The upper electrode film is formed by a known photolithography method and a wet etching method.

In this embodiment, an antiferroelectric film having polarization exhibiting anti-balence in the crystal unit cell is inserted between the high dielectric film as the capacitor dielectric film and the electrode. Therefore, the space charge layer (depletion layer) formed in the interface between each of the upper and lower electrode films and the capacitor dielectric film can be minimized.

In this thin film capacitor structure, the capacitor dielectric film was formed such that the total film thickness of the antiferroelectric material film and the capacitor dielectric film was in the range of 50 nm to 25 nm. In this case, the (Ba _0.5 Sr _0.5 ) TiO ₃ thin film was formed to have a film thickness in the range of 30 nm to 5 nm. However, the relative dielectric constant of the capacitor dielectric film was 250 or more and the capacitor dielectric film did not have a significant film thickness dependency. In addition, even when the film thickness of the PbZrO ₃ thin film was reduced to a thin value of about 10 nm to 5 nm, there was no change in dielectric constant.

Next, the thin film capacitor structure according to the second embodiment of the present invention will be described. 2 schematically illustrates a cross-sectional view of a thin film capacitor structure according to a second embodiment of the present invention.

In this embodiment, a layered bismuth compound film is provided between each of the electrode films and the high dielectric film as a capacitor dielectric film. That is, the thin film capacitor structure of the present embodiment is composed of a high dielectric film formed of a material exhibiting a high dielectric constant, a pair of electrode films having the high dielectric film interposed therebetween, and thin films formed of a layered bismuth compound. Each is provided between the high dielectric film and one of the electrode films.

The layered bismuth compound film is represented by the following general formula.

(Bi ₂ O ₂ ) ²⁺ (A _m-1 B _m O _{3m + 1} ) ^2-

Wherein A is an ion having the number of valences selected from among +1, +2 and +3 valences. Also, B is an ion having the number of valences selected from among +4, +5 and +6 valences. M is also a positive integer in the range of 1-5. Further, the number of valences of A, B and m is chosen such that the number of valences of A _m-1 B _m O _{3m + 1} becomes -2.

A and B are not particularly limited as long as they are ions having the number of valences satisfying the above relationship. For example, Ba and Sr may be used as A having a +2 valence and Bi and the like may be used as A having a +3 valence. Also similarly, Ti may be used as B having a +4 valence, Nb and Ta may be used as B having a +5 valence, and W and the like may be used as B having a +6 valence.

Next, a manufacturing method is demonstrated. The silicon wafer 11 is used as a substrate. After the substrate 11 is thermally oxidized to form a silicon oxide film on the surface of the substrate 11, RuO ₂ is deposited by a sputtering method to obtain a film thickness of 50 nm at a substrate temperature of about 500 ° C. The lower electrode film 13 is formed.

A Bi ₄ Ti ₃ O ₁₂ thin film 14 is formed on the lower electrode 13 with a film thickness of about 10 nm by a sol-gel method known as a layered bismuth compound film.

Then, a (Ba _0.5 Sr _0.5 ) TiO ₃ film 15 is formed to a thickness of about 30 nm at a substrate temperature of about 650 ° C. by a sputtering method. In addition, a Bi ₄ Ti ₃ O ₁₂ thin film 14 is formed with a film thickness of about 10 nm by the sol-gel method.

Then, Ti and Au are deposited in this order on the upper electrode 16 at thicknesses of 50 nm and 300 nm, respectively. The upper electrode 16 is formed by known photolithography methods and wet etching methods.

In this embodiment, layered bismuth compound films having bismuth oxide conductive layers are inserted at the interface with the upper and lower electrodes of the crystal unit cell. Therefore, the space charge layer formed at the interface with the upper and lower electrodes is suppressed by the bismuth oxide conductive layer, thereby minimizing the thickness of the space charge layer (depletion layer).

In the thin film capacitor structure, the capacitor dielectric film is formed so that the total film thickness of the layered bismuth compound films and the high dielectric film of the capacitor dielectric film is in the range of 50 nm to 25 nm. In this case, the film thickness of the high dielectric film of the (Ba _0.5 Sr _0.5 ) TiO ₃ film was formed to have a film thickness in the range of 30 nm to 5 nm. However, the dielectric constant of the capacitor dielectric film was 250 or more and did not have a significant film thickness dependency.

According to the thin film capacitor structure of the present invention, the film thickness of the low dielectric constant layer electrically formed between each of the lower and upper electrodes and the capacitor dielectric film can be kept to a minimum. Therefore, even when the total film thickness of the capacitor dielectric film is reduced to a value of 50 or less, it is possible to prevent the substantial dielectric constant of the entire capacitor dielectric film from being significantly reduced.

The low dielectric constant layer is formed by the space charge layer (depletion layer) due to the difference in Fermi energy between the electrode film and the high dielectric film, and as a result, a part of the high dielectric film having a high dielectric constant is affected by the electric field due to the space charge layer, It is believed to form electrically because of its low permittivity.

According to the thin film capacitor structure of the present invention, even if a thin capacitor dielectric film formed of a material having a high dielectric constant is used, the dielectric constant of the thin capacitor dielectric film is never substantially reduced.

In addition, the memory capacitor may have a sufficiently large capacitance even if the area of the memory capacitor is small.

By using the thin film capacitor structure of the present invention, a highly integrated integrated circuit can be manufactured without complicated manufacturing process.

Claims (19)

In the capacitor structure, Electrode films; A dielectric film formed between the electrode films and formed of a material having a relative permittivity of 40 or more; And Including intervening films respectively provided between the dielectric film and the electrode film, characterized in that to reduce the thickness of the space charge layer formed between the dielectric film and the electrode film when the interlayer film is not provided Capacitor structure. The capacitor structure according to claim 1, wherein the dielectric film is formed of a material having a perovskite crystal structure. The method of claim 2, wherein the dielectric layer capacitor structure, characterized in that one of BaTiO _3, SrTiO _3, PbTiO _3, and BaTiO _3, SrTiO _3, PbTiO ₃ solid solution of at least two materials in the formation. The capacitor structure according to any one of claims 1 to 3, wherein each of the interlayer films is an anti-ferroelectric film. The capacitor structure according to claim 4, wherein the antiferroelectric film is formed of a material of perovskite type crystal structure. The method of claim 4, wherein the capacitor being formed of a material selected from the group consisting of the anti-ferroelectric film PbZrO _3, PbZrO ₃ and solid solutions of PbTiO _3, and PbZrO _3, solid solutions of PbTiO _3, LaZrO ₃ and LaTiO ₃ rescue. 7. The capacitor structure according to claim 6, wherein when the material is a solid solution of PbZrO ₃ and PbTiO ₃ , PbZrO ₃ is contained at least 95 mol%. The method according to claim 6, wherein when the material is a solid solution of PbZrO ₃ , PbTiO ₃ , LaZrO ₃ and LaTiO ₃ , the ratio of Zr: Ti is 70: 30 or more, and the ratio of Pb: La is 80: 20 or more. Capacitor structure. The layer shape according to any one of claims 1 to 3, wherein each of the interlayers is represented by a general formula of (Bi ₂ O ₂ ) ²⁺ (A _m-1 B _m O _{3m + 1} ) ^2- . Is a bismuth compound film of, wherein A is an ion having a number of valences selected from +1, +2, and +3 valences, B is an ion having a number of valences selected from +4, +5, and +6 valences, m is a positive integer ranging from 1 to 5, and the number of valences of A, B and m is chosen such that the number of valences of A _m-1 B _m O _{3m + 1} is -2. The capacitor structure according to any one of claims 1 to 3, wherein the total thickness of said dielectric film and said intervening films is in the range of 50 nm to 25 nm. The capacitor structure of claim 10, wherein the thickness of the dielectric film is in a range of 30 nm to 5 nm. The capacitor structure according to any one of claims 1 to 3, wherein the interlayer includes a conductive layer. The capacitor structure of claim 1, wherein the interlayer includes a plurality of interlayers. In the capacitor structure, Electrode films; A dielectric film formed between the electrode films and formed of a material having a relative permittivity of 40 or more; And Antiferroelectric films provided between the dielectric film and the electrode films, respectively. Capacitor structure comprising a. 15. The method of claim 14 wherein the dielectric layer capacitor structure, characterized in that one of the solid solutions of BaTiO _3, SrTiO _3, PbTiO _3, and BaTiO _3, SrTiO _3, PbTiO _3, at least two materials in the formation. The method of claim 14, wherein the capacitor structure, characterized in that formed with the antiferroelectric film PbZrO _3, PbZrO ₃ and a solid solution of PbZrO _3, and PbZrO _3, PbTiO _3, a material selected from the group formed of a solid solution of LaZrO ₃ and LaTiO ₃ . 17. The capacitor structure of claim 16 wherein PbZrO ₃ contains at least 95 mol% when the material is a solid solution of PbZrO ₃ and PbTiO ₃ . The method according to claim 16, wherein when the material is a solid solution of PbZrO ₃ , PbTiO ₃ , LaZrO ₃ and LaTiO ₃ , the ratio of Zr: Ti is 70: 30 or more, and the ratio of Pb: La is 80: 20 or more. Capacitor structure. In the capacitor structure, Electrode films; A dielectric film formed between the electrode films and formed of a material having a relative permittivity of 40 or more; And A layered bismuth compound film provided between the dielectric film and the electrode films, respectively, and represented by a general formula of (Bi ₂ O ₂ ) ²⁺ (A _m-1 B _m O _{3m + 1} ) ^2- A is an ion having the number of valences selected from +1, +2 and +3 valences, B is an ion having the number of valences selected from +4, +5 and +6 valences, and m is in the range 1-5 A positive structure, wherein the number of valences of A, B, and m is chosen such that the valence number of A _m-1 B _m O _{3m + 1} is -2.