KR19980037814A - Switch mode power supply with high breakdown voltage insulation - Google Patents
Switch mode power supply with high breakdown voltage insulation Download PDFInfo
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- KR19980037814A KR19980037814A KR1019960056624A KR19960056624A KR19980037814A KR 19980037814 A KR19980037814 A KR 19980037814A KR 1019960056624 A KR1019960056624 A KR 1019960056624A KR 19960056624 A KR19960056624 A KR 19960056624A KR 19980037814 A KR19980037814 A KR 19980037814A
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- power supply
- mode power
- switch mode
- integrated circuit
- switching element
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- 230000015556 catabolic process Effects 0.000 title description 10
- 238000009413 insulation Methods 0.000 title description 5
- 239000004065 semiconductor Substances 0.000 claims abstract description 23
- UMIVXZPTRXBADB-UHFFFAOYSA-N benzocyclobutene Chemical compound C1=CC=C2CCC2=C1 UMIVXZPTRXBADB-UHFFFAOYSA-N 0.000 claims description 7
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 4
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 4
- 239000011248 coating agent Substances 0.000 claims description 3
- 238000000576 coating method Methods 0.000 claims description 3
- 239000011247 coating layer Substances 0.000 claims 1
- 238000000034 method Methods 0.000 description 11
- 239000004593 Epoxy Substances 0.000 description 8
- 239000011810 insulating material Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 239000004840 adhesive resin Substances 0.000 description 1
- 229920006223 adhesive resin Polymers 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49575—Assemblies of semiconductor devices on lead frames
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
본 발명은 스위치 모드 전원 장치에 있어서, 특히 반도체 스위칭 소자와 상기 스위칭 소자를 제어하는 제어용 집적 회로를 하나의 리드 프레임에 탑재하여 형성된 패키지를 포함하는 스위치 모드 전원 장치에 있어서, 상기 제어용 집적 회로의 뒷면에 절연막이 형성된 것을 특징으로 한다.The present invention relates to a switch mode power supply comprising a package formed by mounting a semiconductor switching element and a control integrated circuit for controlling the switching element in one lead frame. An insulating film is formed on the film.
Description
본 발명은 스위치 모드 전원 장치에 관한 것으로서, 특히 반도체 스위칭 소자와 상기 스위칭 소자를 제어하는 제어용 집적 회로를 하나의 리드 프레임에 탑제하여 형성된 패키지를 포함하는 스위치 모드 전원 장치에 관한 것이다,The present invention relates to a switch mode power supply, and more particularly, to a switch mode power supply including a semiconductor switching element and a package formed by mounting a control integrated circuit for controlling the switching element in one lead frame.
최근에 전기·전자 분야에서 사용되는 전원 장치로서, 고효율·고기능의 스위치 모드 전원 장치가 대부분을 차지하고 있다. 스위치 모드 전원 장치에는 전력용 반도체 스위칭 소자와 이 스위치 소자를 제어하는 제어용 집적 회로가 필수적인데 최근까지는 상기 반도체 스위칭 소자와 제어용 집적 회로를 별도로 제작하여 왔다(도 1 및 도 2 참조). 이렇게 별도로 제작하게 되면 외부에 부가되는 부품의 숫자가 많아지게 되므로 전체 전원 장치의 제작 원가가 높아지게 된다.In recent years, as a power supply device used in the field of electric and electronic fields, a high efficiency and a high-performance switch mode power supply occupy most. In the switch mode power supply, a power semiconductor switching element and a control integrated circuit for controlling the switch element are essential. Until recently, the semiconductor switching element and the control integrated circuit have been manufactured separately (see FIGS. 1 and 2). If manufactured separately, the number of parts added to the outside increases the manufacturing cost of the entire power supply.
상기 문제를 해결하기 위하여, 도 3 및 도 4 와 같이 반도체 스위칭 소자(10)와 제어용 집적 회로(20)를 하나의 리드 프레임(30)에 탑재하여 하나의 패키지를 형성하는 기술이 알려져 있다. 반도체 스위칭 소자(10)를 리드 프레임(30)에 납땜하고, 제어용 집적 회로(20)를 리드 프레임(30)에 절연 물질을 이용하여 접착시킨다. 여기서 반도체 스위칭 소자(10)가 모스펫인 경우 드레인 단자가 납땜되며, 제어용 집적 회로(20)와 리드프레임(30) 상호간에는 고내압 절연이 요구되므로 절연 물질로서 절연 에폭시를 사용하게 된다. 이 때, 형성된 에폭시막(50)의 내부에 기포(51) 등이 형성될 수 있으며, 이에 의해서 절연이 파괴될 수 있다. 이런 불량은 전체 전원 장치의 동작을 멈추게 한다. 이 문제를 해결하기 위하여 에폭시막(50)과 제어용 집적 회로(20) 사이에 절연지(isolation sheet)를 삽입하는 방법이 있다. 그러나 이 방법은 기존의 반도체 공정 외에 별도의 공정을 요하는 단점이 있다.In order to solve the above problem, a technique of forming a package by mounting the semiconductor switching element 10 and the control integrated circuit 20 in one lead frame 30 as shown in FIGS. 3 and 4 is known. The semiconductor switching element 10 is soldered to the lead frame 30, and the control integrated circuit 20 is bonded to the lead frame 30 using an insulating material. In this case, when the semiconductor switching device 10 is a MOSFET, the drain terminal is soldered, and since the high breakdown voltage is required between the control integrated circuit 20 and the lead frame 30, an insulating epoxy is used as the insulating material. At this time, bubbles 51 and the like may be formed in the formed epoxy film 50, whereby insulation may be destroyed. This failure causes the entire power supply to stop working. In order to solve this problem, there is a method of inserting an isolation sheet between the epoxy film 50 and the control integrated circuit 20. However, this method has a disadvantage of requiring a separate process in addition to the conventional semiconductor process.
반도체 공정 기술의 발전에 따라 반도체 스위칭 소자와 제어용 집적 회로를 하나의 웨이퍼에서 하나의 칩으로 구현하는 스마트 전력 소자 제조 공정이 개발되어 이를 이용한 집적 회로가 출시되고 있다. 그러나, 아직 보편화되지 않은 기술이어서 널리 사용되지는 않고 있고, 집적 회로의 가격이 비싼 편이다.With the development of semiconductor process technology, a smart power device manufacturing process that implements a semiconductor switching device and an integrated control circuit in a single wafer has been developed and an integrated circuit using the same has been introduced. However, because it is not yet widely used, it is not widely used, and integrated circuits are expensive.
본 발명의 목적은 이와 같은 종래 기술의 문제점을 해결하기 위하여, 기존의 반도체 공정을 이용하여 제어용 집적 회로와 리드 프레임을 효과적으로 절연시킴으로써, 고내압 절연 구조를 가지는 스위치 모드 전원 장치를 제공하는 데 있다.SUMMARY OF THE INVENTION An object of the present invention is to provide a switch mode power supply device having a high breakdown voltage insulation structure by effectively isolating a control integrated circuit and a lead frame by using a conventional semiconductor process in order to solve such problems of the prior art.
상기 목적을 달성하기 위하여, 본 발명의 스위치 모드 전원 장치는 제어용 집적 회로의 뒷면에 절연막이 형성된 것을 특징으로 한다.In order to achieve the above object, the switch mode power supply of the present invention is characterized in that an insulating film is formed on the back of the control integrated circuit.
도 1 은 종래의 반도체 스위칭 소자 패키지의 일 예의 평면도.1 is a plan view of an example of a conventional semiconductor switching device package.
도 2 는 도 1 의 단면도.2 is a cross-sectional view of FIG.
도 3 은 종래 기술 및 본 발명에 있어서, 리드 프레임에 반도체 스위칭 소자와 제어용 집적 회로가 탑재된 패키지의 일 실시예의 평면도.3 is a plan view of one embodiment of a package in which a semiconductor switching element and a control integrated circuit are mounted in a lead frame in the prior art and the present invention;
도 4 는 종래 기술에 있어서 도 3 의 단면도.4 is a cross-sectional view of FIG. 3 in the prior art.
도 5 는 본 발명에 있어서 도 3 의 단면도.5 is a cross-sectional view of FIG. 3 in the present invention.
이하, 첨부 도면을 참조하여 본 발명을 보다 상세히 설명하고자 한다.Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings.
도 3 은, 본 발명의 일 실시예로서, 다섯 개의 리드를 가진 패키지의 평면도를 도시한 것이며, 도 5 는 그 단면도를 도시한 것이다.FIG. 3 shows a top view of a package with five leads, as an embodiment of the invention, and FIG. 5 shows a cross sectional view thereof.
일반적으로 반도체 스위칭 소자(10)를 리드 프레임(30)에 납땜(40)하여 붙이게 되는 데, 이 때 납땜(40)된 리드 프레임(30)의 넓은 평면 부분을 힛 싱크(heat sink)라 한다. 반도체 스위칭 소자(10)가 모스펫인 경우에는 드레인 단자가 납땜되어 힛 싱크와 전기적으로 단락된다. 반도체 스위칭 소자(10)가 IGBT인 경우에는 리드 프레임(30)의 힛 싱크가 콜렉터에 연결되어 있다. 제어용 집적 회로(20)의 뒷면은 일반적으로 그라운드이므로 제어용 집적 회로(20)를 리드 프레임(30)에 납땜하여 붙이는 경우에는 제어용 집적 회로(30)의 그라운드와 힛 싱크가 전기적으로 단락된다. 그렇게 되면, 반도체 스위칭 소자(10)의 드레인 또는 콜렉터와 제어용 집적 회로(20)의 그라운드가 단락되어 스위칭 동작을 수행할 수 없게 된다. 이를 방지하기 위해서 제어용 집적 회로(20)와 리드 프레임(30)의 힛 싱크 사이를 에폭시와 같은 절연 접착 수지를 이용하여 전기적으로 절연시키게 된다. 이 때 본 발명에서는, 뒷면에 절연막(21)이 형성된 제어용 집적 회로(20)를 리드 프레임(30)에 접착시키게 된다. 이 절연막은 기존의 반도체 공정을 이용하여 웨이퍼의 뒷면에 미리 형성된다. 상기 절연막(21)으로서 실리콘 질화막, 실리콘 산화막, 또는 BCB(benzocyclobutane) 코팅막 등이 가능한 데, 실리콘 질화막 및 실리콘 산화막을 이용하는 경우에는 그 두께가 2μm 이상, BCB(benzocyclobutane) 코팅막을 이용하는 경우에는 그 두께가 10μm 이상이 되는 것이 적당하다.In general, the semiconductor switching element 10 is attached to the lead frame 30 by soldering 40. At this time, the wide planar portion of the soldered lead frame 30 is called a heat sink. When the semiconductor switching element 10 is a MOSFET, the drain terminal is soldered and electrically shorted with the heat sink. When the semiconductor switching element 10 is an IGBT, the heat sink of the lead frame 30 is connected to the collector. Since the back surface of the control integrated circuit 20 is generally ground, when soldering and attaching the control integrated circuit 20 to the lead frame 30, the ground and the heat sink of the control integrated circuit 30 are electrically shorted. In this case, the drain or the collector of the semiconductor switching element 10 and the ground of the control integrated circuit 20 are short-circuited so that a switching operation cannot be performed. In order to prevent this, the insulating circuit between the control integrated circuit 20 and the lead sink 30 is electrically insulated using an insulating adhesive resin such as epoxy. At this time, in the present invention, the control integrated circuit 20 having the insulating film 21 formed thereon is bonded to the lead frame 30. This insulating film is previously formed on the back side of the wafer using a conventional semiconductor process. As the insulating film 21, a silicon nitride film, a silicon oxide film, or a BCB (benzocyclobutane) coating film may be used. The thickness of the silicon nitride film and the silicon oxide film is 2 μm or more, and the thickness of the BCB (benzocyclobutane) coating film is used. It is suitable to become 10 micrometers or more.
반도체 스위칭 소자 및 제어용 집적 회로를 리드 프레임에 탑재한 후, 와이어 본딩(60)을 하게 되는 데, 도 3 에서는 일 실시예로서, 반도체 스위칭 소자(10)의 소오스(모스펫의 경우) 또는 에미터(IGBT의 경우)와 제어용 집적 회로(20)의 그라운드가 내부에서 와이어 본딩(60)되어 외부로 한 단자로 나와 있는 상태가 도시되어 있다.After the semiconductor switching element and the control integrated circuit are mounted in the lead frame, wire bonding 60 is performed. In FIG. 3, as an embodiment, a source (in case of a MOSFET) or an emitter ( In the case of the IGBT) and the ground of the control integrated circuit 20 is wire-bonded 60 therein and is shown as a terminal outward.
상기 절연막(21)이 형성된 패키지는 다음과 같은 장점이 있다.The package in which the insulating film 21 is formed has the following advantages.
첫째, 기존의 반도체 공정을 이용한다.First, the existing semiconductor process is used.
둘째, 절연막질이 매우 균일하고 상기 절연막 내부에 기포등이 형성되지 않는다.Second, the insulating film quality is very uniform and bubbles are not formed inside the insulating film.
셋째, 절연막이 형성된 경우의 절연 내압은, 절연막만에 의한 절연 내압과 에폭시만에 의한 절연 내압의 합이 되므로, 에폭시만에 의한 절연 내압보다 고내압을 얻을 수 있다.Third, since the dielectric breakdown voltage in the case where the insulating film is formed is the sum of the dielectric breakdown voltage only by the insulating film and the dielectric breakdown voltage only by the epoxy, it is possible to obtain a higher breakdown voltage than the dielectric breakdown voltage by only epoxy.
넷째, 에폭시막에 불량이 생기더라도 절연막만으로도 충분한 내압의 확보가 가능하다.Fourth, even if a defect occurs in the epoxy film, a sufficient breakdown voltage can be secured only by the insulating film.
본 발명은, 기존의 반도체 공정 외의 별도의 공정을 요하지 않으며, 에폭시막의 기포 등에 의한 절연 불량 문제를 해결함과 동시에 절연 내압의 증가를 가져올 수 있다.The present invention does not require a separate process other than the conventional semiconductor process, and solves the problem of poor insulation due to bubbles in the epoxy film, and at the same time, may increase the insulation breakdown voltage.
Claims (5)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019960056624A KR100192970B1 (en) | 1996-11-22 | 1996-11-22 | Switch mode power device with high breakdown voltage insulation structure |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019960056624A KR100192970B1 (en) | 1996-11-22 | 1996-11-22 | Switch mode power device with high breakdown voltage insulation structure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR19980037814A true KR19980037814A (en) | 1998-08-05 |
| KR100192970B1 KR100192970B1 (en) | 1999-06-15 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019960056624A KR100192970B1 (en) | 1996-11-22 | 1996-11-22 | Switch mode power device with high breakdown voltage insulation structure |
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| Country | Link |
|---|---|
| KR (1) | KR100192970B1 (en) |
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1996
- 1996-11-22 KR KR1019960056624A patent/KR100192970B1/en not_active IP Right Cessation
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| KR100192970B1 (en) | 1999-06-15 |
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