KR19980036230A - Semiconductor fine pattern formation method - Google Patents

Abstract

A method of forming a semiconductor fine pattern by a photolithography process.

According to an embodiment of the present invention, a photoresist pattern is formed on a wafer on which an oxide film, a first insulating film, and a second insulating film are sequentially formed, and a first anisotropic etching process is performed on the entire surface of the wafer on which the photoresist pattern is formed. And forming a second insulating layer pattern, performing a first isotropic etching process on the wafer on which the first anisotropic etching process is performed, and removing sidewalls of the second insulating layer, on the wafer on which the isotropic etching process is performed. Forming a conductive film, performing a second anisotropic etching process on the entire surface of the wafer on which the conductive film is formed, forming a spacer on the sidewall of the second insulating film, and performing a second isotropic etching process on the wafer on which the second anisotropic etching process is performed. To And forming a fine pattern by performing the same.

Therefore, since the micropattern having the fine line width can be easily formed, there is an effect of manufacturing a highly integrated semiconductor device.

Description

Semiconductor fine pattern formation method

The present invention relates to a method for forming a semiconductor fine pattern, and more particularly, to a method for forming a semiconductor fine pattern by a photolithography process.

In recent years, the integration density of semiconductor integrated circuits has been remarkable, and submicron level processing has already been realized. The main technology that has sustained this improvement in integration density is a microfabrication technique, and a lithography technique in which a micropattern is formed on a wafer has played a major role.

However, using a conventional lithography process technology, it is not possible to form a fine pattern having an ultra fine line width of 0.2 μm or less due to various problems such as a photomask fabrication problem and a photoresist pattern formation problem. There was this.

An object of the present invention is to provide a method for forming a semiconductor micropattern capable of forming a micropattern having an ultrafine line width of 0.2 μm or less using a photoresist pattern.

1 is a process flowchart for explaining an embodiment of a method for forming a semiconductor fine pattern according to the present invention.

※ Explanation of symbols for main parts of drawing

10 wafer 12 oxide film

14 first insulating film 16 second insulating film

18 photoresist pattern 20 first insulating film pattern

22: second insulating film pattern 24: conductive film

26 spacer 28 fine pattern

In accordance with another aspect of the present invention, a method of forming a semiconductor semiconductor micropattern includes forming a photoresist pattern on a wafer on which an oxide film, a first insulating film, and a second insulating film are sequentially formed, and the wafer having the photoresist pattern formed thereon. Forming a first insulating film pattern and a second insulating film pattern by performing a first anisotropic etching process on the entire surface, and performing a first isotropic etching process on the wafer on which the first anisotropic etching process is performed, thereby forming sidewalls of the second insulating film. Removing, forming a conductive film on the wafer on which the isotropic etching process is performed, forming a spacer on the sidewall of the second insulating film by performing a second anisotropic etching process on the entire surface of the wafer on which the conductive film is formed, and And forming a fine pattern by performing a second isotropic etching process on the wafer having the second anisotropic etching process.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a process flowchart illustrating an embodiment of a method for forming a semiconductor micropattern according to the present invention for forming a gate electrode.

Referring to FIG. 1A, an oxide film 12 is formed on an entire surface of a wafer 10 including a portion where a gate is formed by injecting oxygen (O ₂ ) gas into an oxide film generating furnace at about 900 ° C. to 1050 ° C. FIG. After that, the first insulating film 14 such as the nitride film and the second insulating film 16 are sequentially formed.

Subsequently, a photoresist is applied on the wafer 10 and the photoresist pattern 18 is formed by performing exposure and development processes.

Referring to FIG. 1B, anisotropic etching such as plasma film etching is performed on the entire surface of the wafer 10 to remove the second insulating film 16 and the first insulating film 14 to which the photoresist is not applied. The insulating film pattern 22 and the first insulating film pattern 20 are formed.

In the anisotropic etching, the oxide film 12 and the insulating films 14 and 16 apply process conditions with high selectivity to each other.

Referring to FIG. 1C, an undercut profile is formed by isotropically etching the first insulating film pattern 20 using a process having a good selection ratio with the second insulating film pattern 22, and then a subsequent process. The conductive film 24 is formed by applying a conductive material such as polyside in which the gate electrode is formed.

Referring to FIG. 1D, an upper surface of the wafer 10 on which the conductive layer 24 is formed is etched by using an anisotropic etching method to form spacers on sidewalls of the first insulating layer pattern 20 undercut by the isotropic etching. 26). In this case, the second insulating layer pattern 22 serves as a self-align mask.

In the anisotropic etching, the second insulating film pattern 22 and the oxide film 12 apply process conditions with high selectivity to each other.

Referring to FIG. 1E, the second insulating film pattern 22 is etched by etching the wafer 10 having the spacers 26 formed on the sidewalls of the first insulating film pattern 20 by using a wet etching method or a dry etching method. And the first insulating layer pattern 20 is removed to form a fine pattern 28.

Therefore, according to the present invention, since a fine pattern having a fine line width can be easily formed, there is an effect of manufacturing a highly integrated semiconductor device.

Although the present invention has been described in detail only with respect to the described embodiments, it will be apparent to those skilled in the art that various modifications and variations are possible within the technical scope of the present invention, and such modifications and modifications are within the scope of the appended claims.

Claims (1)

Forming a photoresist pattern on the wafer on which an oxide film, a first insulating film, and a second insulating film are sequentially formed; Forming a first insulating film pattern and a second insulating film pattern by performing a first anisotropic etching process on the entire surface of the wafer on which the photoresist pattern is formed; Performing a first isotropic etching process on the wafer on which the first anisotropic etching process is performed to remove sidewalls of the second insulating layer; Forming a conductive film on the wafer on which the isotropic etching process is performed; Forming a spacer on a sidewall of the second insulating layer by performing a second anisotropic etching process on the entire surface of the wafer on which the conductive layer is formed; And Forming a fine pattern by performing a second isotropic etching process on the wafer on which the second anisotropic etching process is performed; Method for forming a semiconductor fine pattern comprising a.