KR102665410B1 - 메모리 장치의 내부 프로세싱 동작 방법 - Google Patents

메모리 장치의 내부 프로세싱 동작 방법 Download PDF

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KR102665410B1
KR102665410B1 KR1020180088682A KR20180088682A KR102665410B1 KR 102665410 B1 KR102665410 B1 KR 102665410B1 KR 1020180088682 A KR1020180088682 A KR 1020180088682A KR 20180088682 A KR20180088682 A KR 20180088682A KR 102665410 B1 KR102665410 B1 KR 102665410B1
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South Korea
Prior art keywords
internal processing
command
memory
memory device
processing operation
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KR1020180088682A
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English (en)
Korean (ko)
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KR20200013461A (ko
Inventor
파반 쿠마르
파반 쿠마르
오성일
유학수
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삼성전자주식회사
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Priority to KR1020180088682A priority Critical patent/KR102665410B1/ko
Priority to US16/251,983 priority patent/US11074961B2/en
Priority to CN201910201920.2A priority patent/CN110781105A/zh
Priority to TW108112341A priority patent/TWI799563B/zh
Priority to JP2019106861A priority patent/JP7452954B2/ja
Publication of KR20200013461A publication Critical patent/KR20200013461A/ko
Priority to US17/369,010 priority patent/US11482278B2/en
Priority to US17/883,498 priority patent/US11790981B2/en
Priority to US18/223,078 priority patent/US20230360693A1/en
Application granted granted Critical
Publication of KR102665410B1 publication Critical patent/KR102665410B1/ko

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/1642—Handling requests for interconnection or transfer for access to memory bus based on arbitration with request queuing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7807—System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
    • G06F15/7821—Tightly coupled to memory, e.g. computational memory, smart memory, processor in memory
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408—Address circuits
    • G11C11/4087—Address decoders, e.g. bit - or word line decoders; Multiple line decoders
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4093—Input/output [I/O] data interface arrangements, e.g. data buffers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches 
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Databases & Information Systems (AREA)
  • Memory System (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
KR1020180088682A 2018-07-30 2018-07-30 메모리 장치의 내부 프로세싱 동작 방법 KR102665410B1 (ko)

Priority Applications (8)

Application Number Priority Date Filing Date Title
KR1020180088682A KR102665410B1 (ko) 2018-07-30 2018-07-30 메모리 장치의 내부 프로세싱 동작 방법
US16/251,983 US11074961B2 (en) 2018-07-30 2019-01-18 Method of performing internal processing operation of memory device
CN201910201920.2A CN110781105A (zh) 2018-07-30 2019-03-18 存储设备、操作存储设备的方法以及系统
TW108112341A TWI799563B (zh) 2018-07-30 2019-04-09 記憶體系統、記憶體裝置以及其操作方法
JP2019106861A JP7452954B2 (ja) 2018-07-30 2019-06-07 メモリ装置の内部プロセッシング動作方法
US17/369,010 US11482278B2 (en) 2018-07-30 2021-07-07 Method of performing internal processing operation of memory device
US17/883,498 US11790981B2 (en) 2018-07-30 2022-08-08 Method of performing internal processing operation of memory device
US18/223,078 US20230360693A1 (en) 2018-07-30 2023-07-18 Method of performing internal processing operation of memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020180088682A KR102665410B1 (ko) 2018-07-30 2018-07-30 메모리 장치의 내부 프로세싱 동작 방법

Publications (2)

Publication Number Publication Date
KR20200013461A KR20200013461A (ko) 2020-02-07
KR102665410B1 true KR102665410B1 (ko) 2024-05-13

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US (4) US11074961B2 (zh)
JP (1) JP7452954B2 (zh)
KR (1) KR102665410B1 (zh)
CN (1) CN110781105A (zh)
TW (1) TWI799563B (zh)

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CN111679785A (zh) 2019-03-11 2020-09-18 三星电子株式会社 用于处理操作的存储器装置及其操作方法、数据处理系统
US11487699B2 (en) * 2019-06-04 2022-11-01 Micron Technology, Inc. Processing of universal number bit strings accumulated in memory array periphery
WO2020255087A1 (en) * 2019-06-20 2020-12-24 Smolka John Michael Memory module and processor contained in the memory module
CN110476209B (zh) * 2019-06-28 2020-11-17 长江存储科技有限责任公司 三维存储器件中的存储器内计算
US11537323B2 (en) 2020-01-07 2022-12-27 SK Hynix Inc. Processing-in-memory (PIM) device
US11748100B2 (en) 2020-03-19 2023-09-05 Micron Technology, Inc. Processing in memory methods for convolutional operations
CN114158284A (zh) * 2020-07-07 2022-03-08 尼奥耐克索斯有限私人贸易公司 用于使用存储器内处理进行矩阵乘法的装置和方法
KR20220032808A (ko) 2020-09-08 2022-03-15 삼성전자주식회사 프로세싱-인-메모리, 메모리 액세스 방법 및 메모리 액세스 장치
US11868777B2 (en) 2020-12-16 2024-01-09 Advanced Micro Devices, Inc. Processor-guided execution of offloaded instructions using fixed function operations
US11922066B2 (en) * 2021-01-21 2024-03-05 Rambus Inc. Stacked device communication
US11907575B2 (en) 2021-02-08 2024-02-20 Samsung Electronics Co., Ltd. Memory controller and memory control method
US11893278B2 (en) 2021-02-08 2024-02-06 Samsung Electronics Co., Ltd. Memory controller and memory control method for generating commands based on a memory request
US11868657B2 (en) 2021-02-08 2024-01-09 Samsung Electronics Co., Ltd. Memory controller, method of operating the memory controller, and electronic device including the memory controller
CN112835842B (zh) * 2021-03-05 2024-04-30 深圳市汇顶科技股份有限公司 端序处理方法、电路、芯片以及电子终端
US11829619B2 (en) 2021-11-09 2023-11-28 Western Digital Technologies, Inc. Resource usage arbitration in non-volatile memory (NVM) data storage devices with artificial intelligence accelerators
US20230176863A1 (en) * 2021-12-03 2023-06-08 Taiwan Semiconductor Manufacturing Company, Ltd. Memory interface
US11922068B2 (en) 2021-12-10 2024-03-05 Samsung Electronics Co., Ltd. Near memory processing (NMP) dual in-line memory module (DIMM)
US11921634B2 (en) * 2021-12-28 2024-03-05 Advanced Micro Devices, Inc. Leveraging processing-in-memory (PIM) resources to expedite non-PIM instructions executed on a host
US20240095076A1 (en) * 2022-09-15 2024-03-21 Lemon Inc. Accelerating data processing by offloading thread computation
KR20240072783A (ko) 2022-11-17 2024-05-24 에스케이하이닉스 주식회사 Pim 기능을 지원하는 메모리 컨트롤러

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Also Published As

Publication number Publication date
KR20200013461A (ko) 2020-02-07
US11790981B2 (en) 2023-10-17
TW202008160A (zh) 2020-02-16
US20200035291A1 (en) 2020-01-30
JP2020021463A (ja) 2020-02-06
US20220383938A1 (en) 2022-12-01
CN110781105A (zh) 2020-02-11
US11074961B2 (en) 2021-07-27
JP7452954B2 (ja) 2024-03-19
US20230360693A1 (en) 2023-11-09
US20210335413A1 (en) 2021-10-28
US11482278B2 (en) 2022-10-25
TWI799563B (zh) 2023-04-21

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