TWI799563B - 記憶體系統、記憶體裝置以及其操作方法 - Google Patents

記憶體系統、記憶體裝置以及其操作方法 Download PDF

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Publication number
TWI799563B
TWI799563B TW108112341A TW108112341A TWI799563B TW I799563 B TWI799563 B TW I799563B TW 108112341 A TW108112341 A TW 108112341A TW 108112341 A TW108112341 A TW 108112341A TW I799563 B TWI799563 B TW I799563B
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TW
Taiwan
Prior art keywords
operating method
memory
memory device
memory system
operating
Prior art date
Application number
TW108112341A
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English (en)
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TW202008160A (zh
Inventor
帕萬 庫馬爾 K
吳成一
柳鶴洙
Original Assignee
南韓商三星電子股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Priority claimed from KR1020180088682A external-priority patent/KR102665410B1/ko
Application filed by 南韓商三星電子股份有限公司 filed Critical 南韓商三星電子股份有限公司
Publication of TW202008160A publication Critical patent/TW202008160A/zh
Application granted granted Critical
Publication of TWI799563B publication Critical patent/TWI799563B/zh

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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4091Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/1642Handling requests for interconnection or transfer for access to memory bus based on arbitration with request queuing
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10Address translation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668Details of memory controller
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7807System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
    • G06F15/7821Tightly coupled to memory, e.g. computational memory, smart memory, processor in memory
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408Address circuits
    • G11C11/4087Address decoders, e.g. bit - or word line decoders; Multiple line decoders
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4093Input/output [I/O] data interface arrangements, e.g. data buffers
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4096Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches 
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management
TW108112341A 2018-07-30 2019-04-09 記憶體系統、記憶體裝置以及其操作方法 TWI799563B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10-2018-0088682 2018-07-30
KR1020180088682A KR102665410B1 (ko) 2018-07-30 메모리 장치의 내부 프로세싱 동작 방법

Publications (2)

Publication Number Publication Date
TW202008160A TW202008160A (zh) 2020-02-16
TWI799563B true TWI799563B (zh) 2023-04-21

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TW108112341A TWI799563B (zh) 2018-07-30 2019-04-09 記憶體系統、記憶體裝置以及其操作方法

Country Status (4)

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US (4) US11074961B2 (zh)
JP (1) JP7452954B2 (zh)
CN (1) CN110781105A (zh)
TW (1) TWI799563B (zh)

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US11487699B2 (en) * 2019-06-04 2022-11-01 Micron Technology, Inc. Processing of universal number bit strings accumulated in memory array periphery
WO2020255087A1 (en) * 2019-06-20 2020-12-24 Smolka John Michael Memory module and processor contained in the memory module
CN110476209B (zh) * 2019-06-28 2020-11-17 长江存储科技有限责任公司 三维存储器件中的存储器内计算
US11748100B2 (en) 2020-03-19 2023-09-05 Micron Technology, Inc. Processing in memory methods for convolutional operations
CN114158284A (zh) * 2020-07-07 2022-03-08 尼奥耐克索斯有限私人贸易公司 用于使用存储器内处理进行矩阵乘法的装置和方法
US11868777B2 (en) 2020-12-16 2024-01-09 Advanced Micro Devices, Inc. Processor-guided execution of offloaded instructions using fixed function operations
US11922066B2 (en) * 2021-01-21 2024-03-05 Rambus Inc. Stacked device communication
US11907575B2 (en) * 2021-02-08 2024-02-20 Samsung Electronics Co., Ltd. Memory controller and memory control method
US11868657B2 (en) 2021-02-08 2024-01-09 Samsung Electronics Co., Ltd. Memory controller, method of operating the memory controller, and electronic device including the memory controller
CN112835842B (zh) * 2021-03-05 2024-04-30 深圳市汇顶科技股份有限公司 端序处理方法、电路、芯片以及电子终端
US11829619B2 (en) 2021-11-09 2023-11-28 Western Digital Technologies, Inc. Resource usage arbitration in non-volatile memory (NVM) data storage devices with artificial intelligence accelerators
US20230176863A1 (en) * 2021-12-03 2023-06-08 Taiwan Semiconductor Manufacturing Company, Ltd. Memory interface
US11922068B2 (en) 2021-12-10 2024-03-05 Samsung Electronics Co., Ltd. Near memory processing (NMP) dual in-line memory module (DIMM)
US11921634B2 (en) * 2021-12-28 2024-03-05 Advanced Micro Devices, Inc. Leveraging processing-in-memory (PIM) resources to expedite non-PIM instructions executed on a host
US20240095076A1 (en) * 2022-09-15 2024-03-21 Lemon Inc. Accelerating data processing by offloading thread computation

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Publication number Publication date
US20220383938A1 (en) 2022-12-01
US20210335413A1 (en) 2021-10-28
US11790981B2 (en) 2023-10-17
CN110781105A (zh) 2020-02-11
US20200035291A1 (en) 2020-01-30
KR20200013461A (ko) 2020-02-07
TW202008160A (zh) 2020-02-16
JP2020021463A (ja) 2020-02-06
JP7452954B2 (ja) 2024-03-19
US11074961B2 (en) 2021-07-27
US20230360693A1 (en) 2023-11-09
US11482278B2 (en) 2022-10-25

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