TWI799563B - 記憶體系統、記憶體裝置以及其操作方法 - Google Patents
記憶體系統、記憶體裝置以及其操作方法 Download PDFInfo
- Publication number
- TWI799563B TWI799563B TW108112341A TW108112341A TWI799563B TW I799563 B TWI799563 B TW I799563B TW 108112341 A TW108112341 A TW 108112341A TW 108112341 A TW108112341 A TW 108112341A TW I799563 B TWI799563 B TW I799563B
- Authority
- TW
- Taiwan
- Prior art keywords
- operating method
- memory
- memory device
- memory system
- operating
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
- G06F13/1642—Handling requests for interconnection or transfer for access to memory bus based on arbitration with request queuing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7807—System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
- G06F15/7821—Tightly coupled to memory, e.g. computational memory, smart memory, processor in memory
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/408—Address circuits
- G11C11/4087—Address decoders, e.g. bit - or word line decoders; Multiple line decoders
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4093—Input/output [I/O] data interface arrangements, e.g. data buffers
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2018-0088682 | 2018-07-30 | ||
KR1020180088682A KR102665410B1 (ko) | 2018-07-30 | 메모리 장치의 내부 프로세싱 동작 방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
TW202008160A TW202008160A (zh) | 2020-02-16 |
TWI799563B true TWI799563B (zh) | 2023-04-21 |
Family
ID=69178200
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW108112341A TWI799563B (zh) | 2018-07-30 | 2019-04-09 | 記憶體系統、記憶體裝置以及其操作方法 |
Country Status (4)
Country | Link |
---|---|
US (4) | US11074961B2 (zh) |
JP (1) | JP7452954B2 (zh) |
CN (1) | CN110781105A (zh) |
TW (1) | TWI799563B (zh) |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR3075444B1 (fr) * | 2017-12-19 | 2020-07-24 | Commissariat Energie Atomique | Systeme comportant une memoire adaptee a mettre en oeuvre des operations de calcul |
CN111679785A (zh) | 2019-03-11 | 2020-09-18 | 三星电子株式会社 | 用于处理操作的存储器装置及其操作方法、数据处理系统 |
US11487699B2 (en) * | 2019-06-04 | 2022-11-01 | Micron Technology, Inc. | Processing of universal number bit strings accumulated in memory array periphery |
WO2020255087A1 (en) * | 2019-06-20 | 2020-12-24 | Smolka John Michael | Memory module and processor contained in the memory module |
CN110476209B (zh) * | 2019-06-28 | 2020-11-17 | 长江存储科技有限责任公司 | 三维存储器件中的存储器内计算 |
US11748100B2 (en) | 2020-03-19 | 2023-09-05 | Micron Technology, Inc. | Processing in memory methods for convolutional operations |
CN114158284A (zh) * | 2020-07-07 | 2022-03-08 | 尼奥耐克索斯有限私人贸易公司 | 用于使用存储器内处理进行矩阵乘法的装置和方法 |
US11868777B2 (en) | 2020-12-16 | 2024-01-09 | Advanced Micro Devices, Inc. | Processor-guided execution of offloaded instructions using fixed function operations |
US11922066B2 (en) * | 2021-01-21 | 2024-03-05 | Rambus Inc. | Stacked device communication |
US11907575B2 (en) * | 2021-02-08 | 2024-02-20 | Samsung Electronics Co., Ltd. | Memory controller and memory control method |
US11868657B2 (en) | 2021-02-08 | 2024-01-09 | Samsung Electronics Co., Ltd. | Memory controller, method of operating the memory controller, and electronic device including the memory controller |
CN112835842B (zh) * | 2021-03-05 | 2024-04-30 | 深圳市汇顶科技股份有限公司 | 端序处理方法、电路、芯片以及电子终端 |
US11829619B2 (en) | 2021-11-09 | 2023-11-28 | Western Digital Technologies, Inc. | Resource usage arbitration in non-volatile memory (NVM) data storage devices with artificial intelligence accelerators |
US20230176863A1 (en) * | 2021-12-03 | 2023-06-08 | Taiwan Semiconductor Manufacturing Company, Ltd. | Memory interface |
US11922068B2 (en) | 2021-12-10 | 2024-03-05 | Samsung Electronics Co., Ltd. | Near memory processing (NMP) dual in-line memory module (DIMM) |
US11921634B2 (en) * | 2021-12-28 | 2024-03-05 | Advanced Micro Devices, Inc. | Leveraging processing-in-memory (PIM) resources to expedite non-PIM instructions executed on a host |
US20240095076A1 (en) * | 2022-09-15 | 2024-03-21 | Lemon Inc. | Accelerating data processing by offloading thread computation |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW201111998A (en) * | 2009-06-04 | 2011-04-01 | Micron Technology Inc | Communication between internal and external processors |
US20110093662A1 (en) * | 2009-10-21 | 2011-04-21 | Micron Technology, Inc. | Memory having internal processors and data communication methods in memory |
TW201137628A (en) * | 2009-10-21 | 2011-11-01 | Micron Technology Inc | Memory having internal processors and methods of controlling memory access |
US20120246401A1 (en) * | 2009-10-21 | 2012-09-27 | Zikbit Ltd. | In-memory processor |
US20150046660A1 (en) * | 2010-11-23 | 2015-02-12 | IP Cube Partners (ICP) Co., Ltd. | Active memory processor system |
US20150293864A1 (en) * | 2013-12-11 | 2015-10-15 | Adesto Technologies Corporation | Serial memory device alert of an external host to completion of an internally self-timed operation |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06215160A (ja) * | 1992-08-25 | 1994-08-05 | Texas Instr Inc <Ti> | データ処理方法および装置 |
ATE521040T1 (de) | 2001-06-11 | 2011-09-15 | Zoran Microelectronics Ltd | Ein spezialspeichergerät |
US9817582B2 (en) | 2012-01-09 | 2017-11-14 | Microsoft Technology Licensing, Llc | Offload read and write offload provider |
US9250954B2 (en) | 2013-01-17 | 2016-02-02 | Xockets, Inc. | Offload processor modules for connection to system memory, and corresponding methods and systems |
US20150106574A1 (en) | 2013-10-15 | 2015-04-16 | Advanced Micro Devices, Inc. | Performing Processing Operations for Memory Circuits using a Hierarchical Arrangement of Processing Circuits |
US10289604B2 (en) | 2014-08-07 | 2019-05-14 | Wisconsin Alumni Research Foundation | Memory processing core architecture |
US9836277B2 (en) * | 2014-10-01 | 2017-12-05 | Samsung Electronics Co., Ltd. | In-memory popcount support for real time analytics |
US20160147667A1 (en) | 2014-11-24 | 2016-05-26 | Samsung Electronics Co., Ltd. | Address translation in memory |
US9983821B2 (en) | 2016-03-29 | 2018-05-29 | Samsung Electronics Co., Ltd. | Optimized hopscotch multiple hash tables for efficient memory in-line deduplication application |
KR102548591B1 (ko) * | 2016-05-30 | 2023-06-29 | 삼성전자주식회사 | 반도체 메모리 장치 및 그것의 동작 방법 |
US10416896B2 (en) | 2016-10-14 | 2019-09-17 | Samsung Electronics Co., Ltd. | Memory module, memory device, and processing device having a processor mode, and memory system |
US9761300B1 (en) | 2016-11-22 | 2017-09-12 | Micron Technology, Inc. | Data shift apparatuses and methods |
KR20190118428A (ko) * | 2018-04-10 | 2019-10-18 | 에스케이하이닉스 주식회사 | 컨트롤러 및 이를 포함하는 메모리 시스템 |
-
2019
- 2019-01-18 US US16/251,983 patent/US11074961B2/en active Active
- 2019-03-18 CN CN201910201920.2A patent/CN110781105A/zh active Pending
- 2019-04-09 TW TW108112341A patent/TWI799563B/zh active
- 2019-06-07 JP JP2019106861A patent/JP7452954B2/ja active Active
-
2021
- 2021-07-07 US US17/369,010 patent/US11482278B2/en active Active
-
2022
- 2022-08-08 US US17/883,498 patent/US11790981B2/en active Active
-
2023
- 2023-07-18 US US18/223,078 patent/US20230360693A1/en active Pending
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW201111998A (en) * | 2009-06-04 | 2011-04-01 | Micron Technology Inc | Communication between internal and external processors |
US20110093662A1 (en) * | 2009-10-21 | 2011-04-21 | Micron Technology, Inc. | Memory having internal processors and data communication methods in memory |
TW201137628A (en) * | 2009-10-21 | 2011-11-01 | Micron Technology Inc | Memory having internal processors and methods of controlling memory access |
US20120246401A1 (en) * | 2009-10-21 | 2012-09-27 | Zikbit Ltd. | In-memory processor |
US20150046660A1 (en) * | 2010-11-23 | 2015-02-12 | IP Cube Partners (ICP) Co., Ltd. | Active memory processor system |
US20150293864A1 (en) * | 2013-12-11 | 2015-10-15 | Adesto Technologies Corporation | Serial memory device alert of an external host to completion of an internally self-timed operation |
Also Published As
Publication number | Publication date |
---|---|
US20220383938A1 (en) | 2022-12-01 |
US20210335413A1 (en) | 2021-10-28 |
US11790981B2 (en) | 2023-10-17 |
CN110781105A (zh) | 2020-02-11 |
US20200035291A1 (en) | 2020-01-30 |
KR20200013461A (ko) | 2020-02-07 |
TW202008160A (zh) | 2020-02-16 |
JP2020021463A (ja) | 2020-02-06 |
JP7452954B2 (ja) | 2024-03-19 |
US11074961B2 (en) | 2021-07-27 |
US20230360693A1 (en) | 2023-11-09 |
US11482278B2 (en) | 2022-10-25 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TWI799563B (zh) | 記憶體系統、記憶體裝置以及其操作方法 | |
EP3661095A4 (en) | BWP CONTROL METHOD, ASSOCIATED DEVICE AND SYSTEM | |
EP3782934A4 (en) | CARRYING METHOD, CARRYING DEVICE, AND CARRYING SYSTEM | |
EP3567892A4 (en) | INFORMATION CONFIGURATION METHOD, DEVICE AND SYSTEM | |
EP3755011A4 (en) | POSITIONING OPERATING METHOD, DEVICE AND SYSTEM | |
EP3742323A4 (en) | BLOCK CHAIN GENERATION PROCESS, AS WELL AS ASSOCIATED DEVICE AND SYSTEM | |
EP3641365A4 (en) | METHOD, DEVICE AND SYSTEM FOR DEVICE ACCESS | |
EP3739851A4 (en) | ADDRESS MANAGEMENT PROCEDURE, DEVICE AND SYSTEM | |
EP3790315A4 (en) | SWITCHING PROCESS, DEVICE AND SYSTEM | |
EP3825077A4 (en) | CONTROL DEVICE, CONTROL PROCESS, AND CONTROL SYSTEM | |
EP3419222A4 (en) | ACCESS PROCEDURE, DEVICE AND SYSTEM | |
EP3644636A4 (en) | SECURE ACCESS PROCESS, DEVICE AND SYSTEM | |
EP3681201A4 (en) | DATA FORWARDING METHOD, DEVICE AND SYSTEM | |
EP3790297A4 (en) | ACCESS PROCESS, DEVICE AND SYSTEM | |
EP3661258A4 (en) | PROCESS, DEVICE, AND SYSTEM FOR OBTAINING ORDER INFORMATION | |
EP3657315A4 (en) | DATA ACCESS METHOD, DEVICE AND SYSTEM | |
EP3820183A4 (en) | GROUP GENERATION METHOD, DEVICE AND SYSTEM | |
EP3694157A4 (en) | VXLAN ENCODING CONFIGURATION PROCEDURE, DEVICE AND SYSTEM | |
EP3681232A4 (en) | ORDER INFORMATION PROCESSING PROCESS AND SYSTEM, FIRST DEVICE AND SECOND DEVICE | |
EP3790320A4 (en) | SWITCHING PROCESS, DEVICE AND SYSTEM | |
EP3637913A4 (en) | DATA RECEIVING METHOD, ASSOCIATED DEVICE AND SYSTEM | |
EP3834678A4 (en) | DEVICE, PROCESS, PROGRAM AND SYSTEM | |
EP3605381A4 (en) | INFORMATION DISSEMINATION SYSTEM, INFORMATION DISSEMINATION SYSTEM, INFORMATION DISSEMINATION PROCESS, AND PROGRAM | |
EP3617748A4 (en) | POSITIONING METHOD, DEVICE AND SYSTEM | |
EP3570582A4 (en) | ENTITY CONFIGURATION METHOD, DEVICE, AND SYSTEM, AND CU-U |