KR102614069B1 - Sensing Circuit And Organic Light Emitting Display Including The Same, And Sensing Method Of Organic Light Emitting Display - Google Patents

Abstract

The sensing circuit of the present invention is a sensing circuit connected to subpixels of a display panel through at least two sensing channels, common to the first sensing channel connected to the first subpixel and the second sensing channel connected to the second subpixel. It is connected to a current-voltage terminal having a first input terminal through which a first sensing current from the first subpixel and a second sensing current from the second subpixel are selectively input, and a second input terminal into which a reference voltage is input. converter; a mux switching unit that selectively connects a first input terminal of the current-voltage converter to the first sensing channel and the second sensing channel; and an analog-to-digital converter that converts the output signal of the current-to-voltage converter into analog-to-digital.

Description

Sensing circuit, organic light emitting display device including sensing circuit, and sensing method of organic light emitting display device {Sensing Circuit And Organic Light Emitting Display Including The Same, And Sensing Method Of Organic Light Emitting Display}

The present invention relates to a sensing circuit, an organic light emitting display device including the same, and a sensing method of the organic light emitting display device.

The active matrix type organic light emitting display device includes an organic light emitting diode (hereinafter referred to as “OLED”) that emits light on its own, and has the advantages of fast response speed, high luminous efficiency, brightness, and viewing angle.

OLED, a self-luminous device, includes an anode electrode and a cathode electrode, and an organic compound layer formed between them. The organic compound layer includes a hole injection layer (HIL), a hole transport layer (HTL), an emission layer (EML), an electron transport layer (ETL), and an electron injection layer. EIL). When the power supply voltage is applied to the anode electrode and cathode electrode, holes passing through the hole transport layer (HTL) and electrons passing through the electron transport layer (ETL) are moved to the emitting layer (EML) to form excitons, and as a result, the emitting layer (EML) Visible light is generated.

An organic light emitting display device arranges pixels, including an OLED and a driving TFT (Thin Film Transistor), in a matrix form and adjusts the luminance of the image displayed in the pixels according to the gradation of video data. The driving TFT controls the driving current flowing to the OLED according to the voltage applied between its gate electrode and source electrode. The amount of light emitted by the OLED is determined by the driving current, and the brightness of the image is determined by the amount of light emitted by the OLED.

Generally, when the driving TFT operates in the saturation region, the pixel current (Ip) flowing between the drain and source of the driving TFT is expressed as Equation 1 below.

[Equation 1]

Ip = 1/2*(μ*C*W/L)*(Vgs-Vth) ²

In Equation 1, μ represents the electron mobility, C represents the capacitance of the gate oxide film, W represents the channel width of the driving TFT, and L represents the channel length of the driving TFT. And, Vgs represents the voltage between the gate and source of the driving TFT, and Vth represents the threshold voltage (or threshold voltage) of the driving TFT.

The electrical characteristics of the driving TFT, such as threshold voltage and electron mobility, are factors that determine the driving current (Ids) as shown in Equation 1, so they must be the same for all pixels. However, the electrical characteristics of the driving TFT vary between pixels due to various reasons such as process characteristics and time-varying characteristics. Even if the same data voltage is applied to pixels with different electrical characteristics of the driving TFT, luminance deviation occurs, so it is difficult to realize the desired image if this characteristic deviation is not compensated.

In order to compensate for deviations in the electrical characteristics of the driving TFT, an external compensation technology is known that senses the electrical characteristics of the driving TFT and corrects digital data of the input image based on the sensing results. This technology mounts a sensing unit within a source driver IC (Integrated Circuit) to sense the electrical characteristics of the driving TFT.

Existing sensing units take a long time to sense because they directly sample the source node voltage of the driving TFT. Since images cannot be displayed while the electrical characteristics of the driving TFT are being sensed, product performance deteriorates as the sensing time increases. If the sensing time is reduced in an existing sensing unit, sensing and compensation become inaccurate and image quality deteriorates.

Existing sensing units are connected one-to-one to the sensing lines of the display panel through each sensing channel. Since the sensing unit must be mounted on the source driver IC as many times as the number of sensing lines, the sensing unit occupies a large area in the source driver IC. Therefore, there is a limit to reducing the size of the source driver IC.

Therefore, the purpose of the present invention is to reduce the sensing time through a shared current measurement sensing unit and to reduce the area occupied by the sensing unit in the source driver IC, a sensing circuit, an organic light emitting display device including the sensing circuit, and an organic light emitting device. The purpose is to provide a sensing method for a display device.

In order to achieve the above object, the sensing circuit of the present invention is a sensing circuit connected to subpixels of a display panel through at least two sensing channels, with a first sensing channel connected to a first subpixel and a second subpixel connected to the second subpixel. a first input terminal commonly connected to a second sensing channel, through which a first sensing current from the first subpixel and a second sensing current from the second subpixel are selectively input, and a first input terminal into which a reference voltage is input. Current-to-voltage converter with two input stages; a mux switching unit that selectively connects a first input terminal of the current-voltage converter to the first sensing channel and the second sensing channel; and an analog-to-digital converter that converts the output signal of the current-to-voltage converter into analog-to-digital.

The sensing circuit of the present invention is connected between the output terminal of the current-voltage converter and the input terminal of the analog-digital converter, and includes a sampling unit that level-shifts the output signal of the current-voltage converter to fit the input range of the analog-digital converter. Includes more.

The current-voltage converter is implemented as a transimpedance amplifier including a feedback resistor and a reset switch connected in parallel between the first input terminal and the output terminal.

The feedback resistor consists of a first resistor having a negative temperature coefficient and a second resistor having a positive temperature coefficient connected in series.

The mux switching unit includes: a first switch for switching current flow between the first sensing channel and the first input terminal; a first anti-phase switch that switches current flow between the first sensing channel and the second input terminal, and is switched opposite to the first switch;

a second switch for switching current flow between the second sensing channel and the first input terminal; and a second anti-phase switch that switches the current flow between the second sensing channel and the second input terminal and switches in the opposite direction to the second switch, and the first switch and the second switch turn alternately. It comes.

The sampling unit includes: a first sampling switch connected between the output terminal of the current-voltage converter and the input terminal of the analog-to-digital converter; a holding capacitor with one electrode connected between the first sampling switch and the input terminal of the analog-to-digital converter; a second sampling switch for applying the reference voltage to the other electrode of the holding capacitor; and an output control switch for applying an ADC voltage different from the reference voltage to the other electrode of the holding capacitor, wherein the first and second sampling switches are switched in synchronization with each other, and the output control switch is configured to apply an ADC voltage different from the reference voltage to the other electrode of the holding capacitor. 2 Switched in the opposite direction of the sampling switch.

Additionally, the organic light emitting display device according to the present invention includes a display panel; and the sensing circuit according to any one of claims 1 to 6 connected to subpixels of the display panel through at least two sensing channels.

In addition, the present invention is commonly connected to the first and second sensing channels respectively connected to the first and second subpixels of the display panel, and includes a first input terminal through which a sensing current is input and a second input terminal through which a reference voltage is input. a current-voltage converter, a mux switching unit that selectively connects the first input terminal of the current-voltage converter to the first sensing channel and the second sensing channel, and an analog-digital signal connected to the output terminal of the current-voltage converter. A sensing method for an organic light emitting display device having an analog-to-digital converter that converts an output signal and a sampling unit that levels-shifts the output signal of the current-voltage converter to match the input range of the analog-to-digital converter, wherein, in a precharge period, the current- Obtaining a reference sampling value by connecting a second input terminal of a voltage converter to the first and second subpixels through the first and second sensing channels; In a first reset period following the precharge period, resetting the first input terminal and output terminal of the current-voltage converter with a first sensing current input from the first sensing channel; In a first sensing period following the first reset period, storing a first sampling voltage corresponding to the first sensing current in the sampling unit; And in a second reset period following the first sensing period, obtaining a first sampling value according to the first sampling voltage and then performing first correlated double sampling based on the first sampling value and the reference sampling value. In addition, it includes resetting the first input terminal and output terminal of the current-voltage converter with the second sensing current input from the second sensing channel.

A sensing method of an organic light emitting display device according to the present invention includes: storing a second sampling voltage corresponding to the second sensing current in the sampling unit in a second sensing period following the second reset period; and in a third reset period following the second sensing period, obtaining a second sampling value according to the second sampling and then performing second correlated double sampling based on the second sampling value and the reference sampling value. It further includes.

The step of performing the first correlated double sampling is calculating a difference between the first sampling value and the reference sampling value, and the step of performing the second correlated double sampling is calculating the difference between the second sampling value and the reference sampling value. This is the step of calculating the difference between the two.

In the first reset period, the first input terminal of the current-voltage converter is connected to the first subpixel through the first sensing channel, and the second input terminal of the current-voltage converter is connected to the first subpixel through the second channel. It is connected to a second subpixel, and the first input terminal and output terminal of the current-voltage converter are shorted, and in the first sensing period, the first input terminal of the current-voltage converter is connected to the first sensing channel through the first sensing channel. connected to a subpixel, a second input terminal of the current-voltage converter is connected to the second subpixel through the second channel, and a first input terminal and an output terminal of the current-voltage converter are connected through a feedback resistor, In the second reset period, the first input terminal of the current-voltage converter is connected to the second subpixel through the second sensing channel, and the second input terminal of the current-voltage converter is connected to the second subpixel through the first channel. It is connected to a first subpixel, and the first input terminal and output terminal of the current-voltage converter are shorted, and in the second sensing period, the first input terminal of the current-voltage converter is connected to the second sensing channel through the second sensing channel. It is connected to a subpixel, a second input terminal of the current-voltage converter is connected to the first subpixel through the first channel, and a first input terminal and an output terminal of the current-voltage converter are connected through a feedback resistor.

Obtaining a first sampling value according to the first sampling voltage includes level shifting the first sampling voltage to fit the input range of the analog-to-digital converter, and converting the level-shifted first sampling voltage into an analog-to-digital converter. It includes the step of digital conversion, and the step of obtaining a second sampling value according to the second sampling voltage includes level shifting the second sampling voltage to fit the input range of the analog-to-digital converter, and the level-shifted and converting the second sampling voltage into analog-to-digital.

The present invention uses a shared current measurement sensing unit commonly connected to at least two or more sensing channels, thereby reducing the area occupied by the sensing unit in the source driver IC and significantly improving sensing performance, including sensing time.

Figure 1 is a block diagram showing an organic light emitting display device according to an embodiment of the present invention.
Figure 2 is a block diagram schematically showing the connection configuration of the sensing circuit and the pixel array of the present invention.
Figure 3 is a diagram showing an example configuration of the pixel array of the present invention.
Figure 4 is a circuit diagram showing an example configuration of subpixels commonly connected to the shared current measurement sensing unit of the present invention.
Figure 5 is a driving waveform diagram showing the driving of the sensing circuit.
FIG. 6 is an equivalent circuit diagram showing the operation of the sensing circuit in the precharge period (①) of FIG. 5.
FIG. 7 is an equivalent circuit diagram showing the operation of the sensing circuit in the first reset period (②) of FIG. 5.
FIG. 8 is an equivalent circuit diagram showing the operation of the sensing circuit in the first sensing period (③) of FIG. 5.
FIG. 9 is an equivalent circuit diagram showing the operation of the sensing circuit in the second reset period (④) of FIG. 5.
FIG. 10 is an equivalent circuit diagram showing the operation of the sensing circuit in the second sensing period (⑤) of FIG. 5.
FIG. 11 is an equivalent circuit diagram showing the operation of the sensing circuit in the third reset period (⑥) of FIG. 5.
FIG. 12 is an equivalent circuit diagram showing the operation of the sensing circuit in the third sensing period (⑦) of FIG. 5.
Figure 13 is a diagram showing a resistor configuration for maintaining the temperature coefficient of the feedback resistor constant.
Figure 14 is a waveform diagram showing simulation results for checking resistance values according to temperature.

The advantages and features of the present invention and methods for achieving them will become clear by referring to the embodiments described in detail below along with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below and will be implemented in various different forms, but the present embodiments only serve to ensure that the disclosure of the present invention is complete and are within the scope of common knowledge in the technical field to which the present invention pertains. It is provided to fully inform those who have the scope of the invention, and the present invention is only defined by the scope of the claims.

The shapes, sizes, proportions, angles, numbers, etc. disclosed in the drawings for explaining embodiments of the present invention are illustrative, and the present invention is not limited to the matters shown. Like reference numerals refer to like elements throughout the specification. Additionally, in describing the present invention, if it is determined that a detailed description of related known technologies may unnecessarily obscure the gist of the present invention, the detailed description will be omitted. When 'includes', 'has', 'consists of', etc. mentioned in the specification are used, other parts may be added unless '~ only' is used. When a component is expressed in the singular, the plural is included unless specifically stated otherwise.

When interpreting a component, it is interpreted to include the margin of error even if there is no separate explicit description.

In the case of a description of a positional relationship, for example, if the positional relationship between two parts is described as 'on top', 'on top', 'at the bottom', 'next to ~', 'right next to' Alternatively, there may be one or more other parts placed between the two parts, unless 'directly' is used.

Although first, second, etc. are used to describe various elements, these elements are not limited by these terms. These terms are merely used to distinguish one component from another.

Each of the features of the various embodiments of the present invention can be combined or combined with each other partially or entirely, and various technical interconnections and operations are possible, and each embodiment may be implemented independently of each other or together in a related relationship. It may be possible.

Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings.

Figure 1 is a block diagram showing an organic light emitting display device according to an embodiment of the present invention. Figure 2 is a block diagram schematically showing the connection configuration of the sensing circuit and the pixel array of the present invention. And, Figure 3 is a diagram showing an example configuration of the pixel array of the present invention.

1 to 3, an organic light emitting display device according to an embodiment of the present invention includes a display panel 10, a timing controller 11, a data driving circuit 12, a gate driving circuit 13, and a memory ( 16) is provided.

In the display panel 10, a plurality of data lines 14A and sensing lines 14B and a plurality of gate lines 15 intersect, and pixels P are arranged in a matrix form in each intersection area. .

Each pixel P is connected to one of the data lines 14A, one of the sensing lines 14B, and one of the gate lines 15. Each pixel P responds to a gate pulse input through the gate line 15, and is electrically connected to the data line 14A and simultaneously to the sensing line 14B.

Each pixel P may include multiple subpixels. As an example, each pixel P may include a first subpixel (SPR) for red display, a second subpixel (SPG) for green display, and a third subpixel (SPB) for blue display. . As another example, each pixel P may further include a fourth subpixel SPW for white display in addition to the first to third subpixels SPR, SPG, and SPB.

Each subpixel (SPR/SPG/SPB/SPW) is a "subpixel" containing characteristics of the OLED (e.g., threshold voltage, etc.) and/or characteristic values of the driving TFT that drives the OLED (e.g., threshold voltage, mobility, etc.). It can have a circuit structure suitable for sensing “characteristic values.”

The circuit configuration of each subpixel (SPR/SPG/SPB/SPW) can be modified in various ways. For example, each subpixel (SPR/SPG/SPB/SPW) includes an OLED, a driving TFT (DT), a storage capacitor (Cst), a first switch TFT (ST1), and a second switch TFT (ST2) as shown in Figure 3. It can be provided.

The OLED includes an anode electrode connected to a source node (Ns), a cathode electrode connected to an input terminal of a low potential driving voltage (EVSS), and an organic compound layer located between the anode electrode and the cathode electrode. The driving TFT (DT) controls the amount of current input to the OLED according to the gate-source voltage (Vgs). The driving TFT (DT) has a gate electrode connected to the gate node (Ng), a drain electrode connected to the input terminal of the high potential driving voltage (EVDD), and a source electrode connected to the source node (Ns). The first switch TFT (ST1) applies the data voltage (Vdata) on the data line (14A) to the gate node (Ng) in response to the gate pulse (SCAN). The first switch TFT (ST1) has a gate electrode connected to the gate line 15(i), a drain electrode connected to the data line 14A, and a source electrode connected to the gate node Ng. The second switch TFT (ST2) turns on/off the current flow between the source node (Ns) and the sensing line (14B) in response to the gate pulse (SCAN). The second switch TFT (ST2) includes a gate electrode connected to the gate line 15(i), a drain electrode connected to the sensing line 14B, and a source electrode connected to the source node Ns. The storage capacitor (Cst) is connected between the gate node (Ng) and the source node (Ns).

The TFTs included in each subpixel (SPR/SPG/SPB/SPW) may be implemented as a p-type, an n-type, or a hybrid type combining the p-type and the n-type. Additionally, the semiconductor layer of the TFTs may include amorphous silicon, polysilicon, oxide, or a combination thereof.

At least one sensing line 14B may be disposed on the display panel 10. In other words, the sensing lines 14B may be arranged to correspond to K (K ≥ 2) subpixel columns, that is, one for each K data lines. For example, the sensing lines 14B may be arranged to correspond to each of the four subpixel columns. This sensing line 14B is also called a reference voltage line. One sensing line 14B only corresponds to K data lines, and its arrangement direction may vary. For example, the sensing line 14B may be arranged parallel to the data line 14A, or may be arranged to cross the data line 14A.

If the number of sensing lines 14B is small, it is advantageous to secure the aperture ratio of the display panel 10. In addition, since the sensing lines 14B are connected to the sensing circuit through each sensing channel (CH1 to CH6), it is advantageous to simplify the sensing circuit if the number of sensing lines 14B is small. The sensing circuit is a circuit that senses subpixel characteristic values for each subpixel.

The present invention may further include a compensation circuit that corrects digital data (DATA) of the input image based on the sensing result (SD) input from the sensing circuit. The compensation circuit calculates compensation values (correction gain and compensation offset) based on the sensing result (SD), and corrects the digital data (DATA) of the input image with this compensation value, thereby compensating for differences in characteristic values between subpixels. there is. The compensation circuit may be built into the timing controller 11, but is not limited thereto.

The timing controller 11 can temporally separate sensing driving and display driving according to a predetermined control sequence. Here, the sensing drive is a drive for sensing subpixel characteristic values and updating the compensation value accordingly, and the display drive is a drive for displaying an input image in which the compensation value is reflected. By the control operation of the timing controller 11, the sensing drive is performed in the vertical blank period during display drive, or in the power-on sequence period before display drive starts, or in the power-off sequence period after display drive ends. It can be done. The vertical blank period is a period in which input video data (DATA) is not written, and is disposed between vertical active sections in which 1 frame of input video data (DATA) is written. The power-on sequence period refers to the transient period from when the driving power is applied until the input image is displayed. The power-off sequence period refers to the transient period from when the display of the input image ends until the driving power is turned off.

Meanwhile, the sensing drive may be performed in a state where only the screen of the display device is turned off while the system power is being applied, for example, in standby mode, sleep mode, or low power mode. The timing controller 11 can detect standby mode, sleep mode, low power mode, etc. according to a predetermined detection process and control various operations for sensing driving.

The timing controller 11 is a data driving circuit based on timing signals such as the vertical synchronization signal (Vsync), horizontal synchronization signal (Hsync), dot clock signal (DCLK), and data enable signal (DE) input from the host system. A data control signal (DDC) for controlling the operation timing of (12) and a gate control signal (GDC) for controlling the operation timing of the gate driving circuit (13) can be generated. The timing controller 11 may generate different control signals (DDC, GDC) for display driving and control signals (DDC, GDC) for sensing driving.

The gate control signal (GDC) includes a gate start pulse, gate shift clock, etc. The gate start pulse is applied to the gate stage that produces the first output and controls that gate stage. The gate shift clock is a clock signal commonly input to the gate stages and is a clock signal for shifting the gate start pulse.

The data control signal (DDC) includes a source start pulse, a source sampling clock, and a source output enable signal. The source start pulse controls the data sampling start timing of the data driving circuit 12. The source sampling clock is a clock signal that controls the sampling timing of data based on the rising or falling edge. The source output enable signal controls the output timing of the data driving circuit 12.

The timing controller 11 may store the compensation value calculated in the compensation circuit during sensing operation in the memory 16. The compensation value stored in the memory 16 can be updated each time sensing is driven, and changes in subpixel characteristic values can be easily compensated accordingly. The timing controller 11 may supply a compensation value read from the memory 16 when driving the display to the compensation circuit. The compensation circuit corrects the digital data (DATA) of the input image based on the compensation value and supplies it to the data driving circuit 12.

The data driving circuit 12 includes at least one source driver integrated circuit (IC). The source driver IC is equipped with a plurality of digital-to-analog converters (hereinafter referred to as DACs) connected to the data lines 14A.

The DAC of the source driver IC converts the input image data (DATA) into a display data voltage according to the data timing control signal (DDC) applied from the timing controller 11 when driving the display and supplies it to the data lines 14A. The data voltage for display is a voltage that varies depending on the gradation of the input image.

The DAC of the source driver IC generates a data voltage for sensing according to the data timing control signal (DDC) applied from the timing controller 11 during sensing operation and supplies it to the data lines 14A. The data voltage for sensing is a voltage that can turn on the driving TFT provided in each subpixel during sensing operation. The data voltage for sensing may be generated with the same value for all subpixels. Additionally, considering that subpixel characteristics are different for each color, the data voltage for sensing may be generated at a different value for each color.

The DAC of the source driver IC applies the sensing data voltage only to one subpixel that is the sensing target among the multiple subpixels (SPR, SPG, SPB, SPW) that share one sensing line (14B), and the sensing target is A predefined black data voltage as a data voltage for non-sensing is applied to the remaining subpixels that are not used. The black data voltage is a voltage that can turn off the driving TFT (DT). The value obtained by subtracting the reference voltage from the black data voltage is equal to or less than the threshold voltage of the driving TFT (DT).

Subpixels arranged in one pixel line (Li, Li+1, Li+2, Li+3...) can be sensed in color units. For this purpose, the DAC of the source driver IC applies the sensing data voltage only to the subpixels of the first color among the subpixels arranged in one pixel line (Li, Li+1, Li+2, Li+3...). may be applied, and after sensing of the subpixels of the first color is completed, the data voltage for sensing may be applied to the subpixels of the second color.

The source driver IC may include a sensing circuit. The sensing circuit includes sensing units (SU) and an analog-to-digital converter (ADC). The present invention reduces the number of sensing units (SU) required for sensing by commonly connecting one sensing unit (SU) to multiple sensing channels (CH1 to CH3, or CH4 to CH6). The present invention can reduce sensing time and expand the sensing range by implementing the sensing units (SU) as a sensing unit for current measurement. The sensing circuit of the present invention including a shared current measurement sensing unit will be described later with reference to FIG. 4.

When driving the display, the gate driving circuit 13 generates a gate pulse for the display based on the gate control signal (GDC) and then sends it to the pixel lines (Li, Li+1, Li+2, Li+3...). It is sequentially supplied to the connected gate lines (15(i) to 15(i+3)). Pixel lines (Li, Li+1, Li+2, Li+3...) refer to a set of horizontally neighboring pixels (P).

The gate driving circuit 13 generates a gate pulse for sensing based on the gate control signal (GDC) during sensing operation, and then generates a gate pulse for sensing to the pixel lines (Li, Li+1, Li+2, Li+3...). It is supplied to the connected gate lines (15(i) to 15(i+3)). The gate pulse for sensing may have a wider on pulse section than the gate pulse for display. One or more on pulse sections of the sensing gate pulse may be included within one line sensing on time. Here, 1 line sensing on time means the scan time devoted to sensing 1 pixel line (eg, Li).

Figure 4 is a circuit diagram showing an example configuration of subpixels commonly connected to the sensing circuit of the present invention.

Referring to FIG. 4, the shared current measurement sensing unit (SU) included in the sensing circuit of the present invention is commonly connected to at least two sensing channels (CH1, CH2, CH3), and is connected to the sensing channels (CH1, CH3). The sensing current of the subpixels (SP1, SP2, and SP3) input from CH2 and CH3 can be sequentially sensed.

The subpixels (SP1, SP2, SP3) connected to the shared current measurement sensing unit (SU) through the sensing channels (CH1, CH2, CH3) are operated according to the same gate pulse (SCAN) and are also connected to the shared current measurement sensing unit (SU). It is connected to the sensing lines (14B).

When the gate pulse (SCAN) is input at the on level, the first sensing data voltage (Vdata1) is applied to the first subpixel (SP1), and the second sensing data voltage (Vdata2) is applied to the second subpixel (SP2). ) is applied, and the third sensing data voltage (Vdata3) is applied to the third subpixel (SP3). Here, the first to third sensing data voltages (Vdata1 to Vdata3) turn on the driving TFTs included in the first to third subpixels (SP1, SP2, and SP3), respectively, to flow a sensing current to the corresponding driving TFTs. As voltages that can be used, they may be the same or different. First to third sensing currents flow through the first to third subpixels SP1, SP2, and SP3 by the first to third sensing data voltages Vdata1 to Vdata3, respectively. Subpixel characteristic values are reflected in these first to third sensing currents.

The first to third sensing currents are sampled by the shared current measurement sensing unit (SU) in the sensing circuit and then output as a digital level sensing result through an analog-to-digital converter. The shared current measurement sensing unit (SU) may include a current-voltage converter (TIA) and a mux switching unit (MUX) to measure the first to third sensing currents, and in some cases, a sampling unit. (SH) may be further included.

The current-voltage converter (TIA) includes at least two sensing channels, for example, a first sensing channel (CH1) connected to the first subpixel (SP1) and a second sensing channel (CH1) connected to the second subpixel (SP2) CH2) and has a first input terminal (-) into which the sensing current is input and a second input terminal (+) into which the reference voltage (Vref) is input. The first sensing current from the first subpixel SP1 and the second sensing current from the second subpixel SP2 are selectively input to the first input terminal (-) of the current-voltage converter (TIA). Meanwhile, the current-voltage converter (TIA) may be commonly connected to three sensing channels (CH1, CH2, CH3) rather than two sensing channels (CH1, CH2) as shown in FIG. 4.

A current-to-voltage converter (TIA) converts the sensing current to voltage. A current-voltage converter (TIA) may be implemented as a transimpedance amplifier including a feedback resistor (Rf) and a reset switch (SRST) connected in parallel between the first input terminal (-) and the output terminal. When a sensing current flows through the feedback resistor (Rf), a potential difference equal to the sensing voltage occurs between both ends of the feedback resistor (Rf), and this potential difference is proportional to the sensing current.

The resistance value of the feedback resistance (Rf) may change depending on the temperature. If the resistance value changes as shown in FIG. 14, the sensing voltage (Vx) is distorted, so it is better to keep the temperature coefficient of resistance (TCR) of the feedback resistor (Rf) constant. Figure 14 is a simulation result for checking resistance value according to temperature, showing that the output voltage (Vx) changes in proportion to the amount of change in resistance value according to temperature.

In order to keep the resistance temperature coefficient constant, the feedback resistor (Rf) can be formed by serially connecting a first resistor (Rppo_ns) with a negative temperature coefficient and a second resistor (Rppo_s) with a positive temperature coefficient as shown in FIG. 13. there is. Figure 13 shows a resistor configuration to keep the temperature coefficient of the feedback resistor constant.

The mux switching unit (MUX) selectively connects the first input terminal (-) of the current-voltage converter (TIA) to at least two sensing channels (CH1, CH2, and CH3). The mux switching unit (MUX) may include a first switch (SW1), a first anti-phase switch (SWB1), a second switch (SW2), and a second anti-phase switch (SWB2), and a third switch (SW3). It may further include a third anti-phase switch (SWB3).

The first switch (SW1) switches the current flow between the first sensing channel (CH1) and the first input terminal (-). The first anti-phase switch (SWB1) switches the current flow between the first sensing channel (CH1) and the second input terminal (+), but is switched in the opposite direction to that of the first switch (SW1). The second switch (SW2) switches the current flow between the second sensing channel (CH2) and the first input terminal (-). And, the second anti-phase switch (SWB2) switches the current flow between the second sensing channel (CH2) and the second input terminal (+), but is switched in the opposite direction to that of the second switch (SW2). The third switch (SW3) switches the current flow between the third sensing channel (CH3) and the first input terminal (-). The third anti-phase switch (SWB3) switches the current flow between the third sensing channel (CH3) and the second input terminal (+), but is switched in the opposite direction to the third switch (SW3).

The sampling unit (SH) levels shifts the output signal (Vout) of the current-voltage converter (TIA) to match the input range of the analog-to-digital converter (ADC). The sampling unit (SH) is connected between the output terminal of the current-voltage converter (TIA) and the input terminal of the analog-to-digital converter (ADC). The sampling unit (SH) includes first and second sampling switches (DW), an output control switch (DWB), and a holding capacitor (Cd).

The first sampling switch (DW) is connected between the output terminal of the current-voltage converter (TIA) and the input terminal of the analog-to-digital converter (ADC). The holding capacitor (Cd) has one electrode connected between the first sampling switch (DW) and the input terminal of the analog-to-digital converter (ADC). The second sampling switch (DW) is connected between the other electrode of the holding capacitor (Cd) and the reference voltage (Vref) input terminal, and applies the reference voltage (Vref) to the other electrode of the holding capacitor (Cd). The output control switch (DWB) is connected between the other electrode of the holding capacitor (Cd) and the ADC voltage (Vadc) input terminal, and applies an ADC voltage (Vadc) different from the reference voltage (Vref) to the other electrode of the holding capacitor (Cd). do.

The first and second sampling switches (DW) are switched in synchronization with each other, and the output control switch (DWB) is switched opposite to the first and second sampling switches (DW). The ADC voltage (Vadc) is a voltage set considering the input range of the analog-to-digital converter (ADC). The reference voltage (Vref) is determined considering the characteristics of the driving TFT and OLED within the subpixel, and can be set higher than the ADC voltage (Vadc) in consideration of sensing time, sensing sensitivity, etc. The potential on the other side of the holding capacitor (Cd) becomes the reference voltage (Vref) when the second sampling switch (DW) is turned on, and becomes the ADC voltage (Vadc) when the output control switch (DWB) is turned on. Accordingly, when the output control switch (DWB) is turned on, the potential on one side of the holding capacitor (Cd) is lowered by approximately “Vref-Vadc”, and the potential of the output signal (Vout) can be shifted to a down level.

Figure 5 is a driving waveform diagram showing the driving of the sensing circuit. And, Figures 6 to 12 are equivalent circuits of the sensing circuit according to the operation procedure.

First, the operation of the sensing circuit in the precharge period (①) will be described with reference to FIGS. 5 and 6.

In the precharge period (①), the first to third anti-phase switches (SWB1, SWB2, SWB3) are turned on to connect the second input terminal (+) of the current-voltage converter (TIA) to the first to third subpixels (SP1). ,SP2,SP3) Connect to each source node (Ns). The source node (Ns) of each of the first to third subpixels (SP1, SP2, and SP3) receives input through the first to third sensing channels (CH1, CH2, CH3) and the first to third sensing lines (14B). It is precharged to the reference voltage (Vref).

In the precharge period (①), the reference voltage (Vref) is applied to the other electrode of the holding capacitor (Cd) to sample the output signal (Vout) of the current-voltage converter (TIA), and then the other electrode of the holding capacitor (Cd) is sampled. When the connection power is changed from the reference voltage (Vref) to the ADC voltage (Vadc), the output signal (Vout) is level shifted down by "Vref-Vadc" to become the reference sampling value (Vr). The reference sampling value (Vr) includes the offset value of the current-voltage converter (TIA) and the switching error value of the sampling unit (SH).

Next, the operation of the sensing circuit in the first reset period (②) will be described with reference to FIGS. 5 and 7.

As the first sensing data voltage (Vdata1) is applied in the first reset period (②), the first sensing current (Isen[1]) flows through the driving TFT (DT) of the first subpixel (SP1). In the first reset period (②), the first anti-phase switch (SWB1) is turned off and the first switch (SW1) is turned on, so the first sensing current (Isen[1]) is connected to the first sensing line and the first It is input to the current-voltage converter (TIA) via the sensing channel (CH1). At this time, the reset switch (SRST) is turned on, so the first input terminal (-) and output terminal of the current-voltage converter (TIA) are reset by the first sensing current (Isen[1]). In the first reset period (②), the settling time of the first sensing current (Isen[1]) is minimized by the feedback resistor (Rf), and the output signal (Vout) becomes the reference voltage (Vref). .

In the first reset period (②), the second and third anti-phase switches (SWB2, SWB3) remain turned on, and the source node (Ns) of each of the second and third subpixels (SP2, SP3) continues to be operated. By precharging to the reference voltage (Vref), settling time is minimized.

Next, the operation of the sensing circuit in the first sensing period (③) will be described with reference to FIGS. 5 and 8.

In the first sensing period (③), unlike the first reset period (②), the reset switch (SRST) is turned off. When the reset switch (SRST) is turned off, the first sensing current (Isen[1]) flows through the feedback resistor (Rf) of the current-voltage converter (TIA), and the first sensing voltage (Vsen) is applied to the feedback resistor (Rf). [1]) A potential difference occurs. At this time, when the reference voltage (Vref) is connected to the other electrode of the holding capacitor (Cd) and the first and second sampling switches (DW) are turned on, the first sampling voltage defined as “Vref-Vsen[1]” is It is stored in the holding capacitor (Cd) as the output signal (Vout). In the first sensing period (③), the output signal (Vout) becomes the first sampling voltage defined as “Vref-Vsen[1]”. According to this method, even if noise is mixed into the reference voltage (Vref), it is erased at the first sampling voltage.

In the first sensing period (③), the second and third anti-phase switches (SWB2, SWB3) remain turned on, and the source node (Ns) of each of the second and third subpixels (SP2, SP3) continues to be operated. By precharging to the reference voltage (Vref), settling time is minimized. In order to reduce sensing errors and settling times, it is desirable that the switches of the mux switching unit (MUX) are designed to have the same size.

Next, the operation of the sensing circuit in the second reset period (④) will be described with reference to FIGS. 5 and 9.

In the second reset period (④), when the first and second sampling switches (DW) are turned off and the power connected to the other electrode of the holding capacitor (Cd) is changed from the reference voltage (Vref) to the ADC voltage (Vadc), the holding capacitor (Cd) The first sampling voltage stored in the capacitor (Cd) is level shifted down by “Vref-Vadc” to become the first sampling value (V1). In the second reset period (④), the reference sampling value (Vr) and the first sampling value (V1) are converted to analog-to-digital and then undergo a first correlated double sampling process. In the first correlated double sampling process, a subtraction is performed between the first sampling value (V1) and the reference sampling value (Vr), and the offset value of the current-voltage converter (TIA) included in the first sampling value (V1) and the sampling unit Eliminate switching error of (SH).

Meanwhile, as the second sensing data voltage (Vdata2) is applied in the second reset period (④), the second sensing current (Isen[2]) flows through the driving TFT (DT) of the second subpixel (SP2). In the second reset period (④), the second anti-phase switch (SWB2) is turned off and the second switch (SW2) is turned on, so that the second sensing current (Isen[2]) is connected to the second sensing line and the second It is input to the current-voltage converter (TIA) via the sensing channel (CH2). At this time, the reset switch (SRST) is turned on, so the first input terminal (-) and output terminal of the current-voltage converter (TIA) are reset by the second sensing current (Isen[2]). In the second reset period (④), the settling time of the second sensing current (Isen[2]) is minimized by the feedback resistance (Rf).

In the second reset period (④), the first and third anti-phase switches (SWB1, SWB3) are turned on, and the source node (Ns) of each of the first and third subpixels (SP1, SP3) is applied to the reference voltage (Vref). ) to minimize settling time.

Next, the operation of the sensing circuit in the second sensing period (⑤) will be described with reference to FIGS. 5 and 10.

In the second sensing period (⑤), unlike the second reset period (④), the reset switch (SRST) is turned off. When the reset switch (SRST) is turned off, the second sensing current (Isen[2]) flows through the feedback resistor (Rf) of the current-voltage converter (TIA), and the second sensing voltage (Vsen) is applied to the feedback resistor (Rf). [2]) A potential difference occurs. At this time, when the reference voltage (Vref) is connected to the other electrode of the holding capacitor (Cd) and the first and second sampling switches (DW) are turned on, the second sampling voltage defined as “Vref-Vsen[2]” It is stored in the holding capacitor (Cd) as the output signal (Vout). In the second sensing period (⑤), the output signal (Vout) becomes the second sampling voltage defined as “Vref-Vsen[2]”. According to this method, even if noise is mixed into the reference voltage (Vref), it is erased at the second sampling voltage.

In the second sensing period (⑤), the first and third anti-phase switches (SWB1, SWB3) remain turned on, thereby continuing to operate the source node (Ns) of each of the first and third subpixels (SP1, SP3). By precharging to the reference voltage (Vref), settling time is minimized.

Next, the operation of the sensing circuit in the third reset period (⑥) will be described with reference to FIGS. 5 and 11.

In the third reset period (⑥), when the first and second sampling switches (DW) are turned off and the power connected to the other electrode of the holding capacitor (Cd) is changed from the reference voltage (Vref) to the ADC voltage (Vadc), the holding capacitor (Cd) The second sampling voltage stored in the capacitor (Cd) is level shifted down by “Vref-Vadc” to become the second sampling value (V2). In the third reset period (⑥), the reference sampling value (Vr) and the second sampling value (V2) are converted to analog-to-digital and then undergo a second correlated double sampling process. In the second correlated double sampling process, a subtraction is performed between the second sampling value (V2) and the reference sampling value (Vr), and the offset value of the current-voltage converter (TIA) included in the second sampling value (V2) and the sampling unit Eliminate switching error of (SH).

Meanwhile, as the third sensing data voltage (Vdata3) is applied in the third reset period (⑥), the third sensing current (Isen[3]) flows through the driving TFT (DT) of the third subpixel (SP3). In the third reset period (⑥), the third anti-phase switch (SWB3) is turned off and the third switch (SW3) is turned on, so that the third sensing current (Isen[3]) is connected to the third sensing line and the third It is input to the current-voltage converter (TIA) via the sensing channel (CH3). At this time, the reset switch (SRST) is turned on, so the first input terminal (-) and output terminal of the current-voltage converter (TIA) are reset by the third sensing current (Isen[3]). In the third reset period (⑥), the settling time of the third sensing current (Isen[3]) is minimized by the feedback resistance (Rf).

In the third reset period (⑥), the first and second anti-phase switches (SWB1, SWB2) are turned on, and the source node (Ns) of each of the first and second subpixels (SP1, SP2) is applied to the reference voltage (Vref). ) to minimize settling time.

Next, the operation of the sensing circuit in the third sensing period (⑦) will be described with reference to FIGS. 5 and 12.

In the third sensing period (⑦), unlike the third reset period (⑥), the reset switch (SRST) is turned off. When the reset switch (SRST) is turned off, the third sensing current (Isen[3]) flows through the feedback resistor (Rf) of the current-voltage converter (TIA), and the third sensing voltage (Vsen) is applied to the feedback resistor (Rf). [3]) A potential difference occurs. At this time, when the reference voltage (Vref) is connected to the other electrode of the holding capacitor (Cd) and the first and second sampling switches (DW) are turned on, the third sampling voltage defined as “Vref-Vsen[3]” is It is stored in the holding capacitor (Cd) as the output signal (Vout). In the third sensing period (⑦), the output signal (Vout) becomes the third sampling voltage defined as “Vref-Vsen[3]”. According to this method, even if noise is mixed into the reference voltage (Vref), it is erased at the third sampling voltage.

In the third sensing period (⑦), the first and second anti-phase switches (SWB1, SWB2) remain turned on, thereby continuing to operate the source node (Ns) of each of the first and second subpixels (SP1, SP2). By precharging to the reference voltage (Vref), settling time is minimized.

Through the above-described content, those skilled in the art will be able to see that various changes and modifications can be made without departing from the technical idea of the present invention. Therefore, the technical scope of the present invention should not be limited to what is described in the detailed description of the specification, but should be defined by the scope of the patent claims.

10: display panel 11: timing controller
12: data driving circuit 13: gate driving circuit
14B: Sensing line 16: Memory

Claims (12)

In a sensing circuit connected to subpixels of a display panel through at least two sensing channels,
Commonly connected to a first sensing channel connected to the first subpixel and a second sensing channel connected to the second subpixel, the first sensing current from the first subpixel and the second sensing current from the second subpixel A current-voltage converter having a first input terminal to which a sensing current is selectively input, and a second input terminal to which a reference voltage is input;
a mux switching unit that selectively connects a first input terminal of the current-voltage converter to the first sensing channel and the second sensing channel; and
It includes an analog-to-digital converter that converts the output signal of the current-to-voltage converter into analog-to-digital,
The current-voltage converter is,
A sensing circuit implemented with a transimpedance amplifier including a feedback resistor and a reset switch connected in parallel between the first input terminal and the output terminal. According to claim 1,
A sensing circuit connected between the output terminal of the current-voltage converter and the input terminal of the analog-to-digital converter and level-shifting the output signal of the current-voltage converter to match the input range of the analog-to-digital converter. delete According to claim 1,
The feedback resistance is,
A sensing circuit consisting of a series connection of a first resistor with a negative temperature coefficient and a second resistor with a positive temperature coefficient. According to claim 1,
The mux switching unit,
a first switch for switching current flow between the first sensing channel and the first input terminal;
a first anti-phase switch that switches current flow between the first sensing channel and the second input terminal, and is switched opposite to the first switch;
a second switch for switching current flow between the second sensing channel and the first input terminal; and
A second anti-phase switch switches current flow between the second sensing channel and the second input terminal, and switches in the opposite direction to the second switch,
A sensing circuit in which the first switch and the second switch are alternately turned on. According to claim 2,
The sampling unit,
a first sampling switch connected between the output terminal of the current-voltage converter and the input terminal of the analog-to-digital converter;
a holding capacitor with one electrode connected between the first sampling switch and the input terminal of the analog-to-digital converter;
a second sampling switch for applying the reference voltage to the other electrode of the holding capacitor; and
An output control switch that applies an ADC voltage different from the reference voltage to the other electrode of the holding capacitor,
A sensing circuit wherein the first and second sampling switches are switched in synchronization with each other, and the output control switch is switched opposite to the first and second sampling switches. display panel; and
An organic light emitting display device including the sensing circuit according to any one of claims 1 to 2 and 4 to 6 connected to subpixels of the display panel through at least two sensing channels. It is commonly connected to the first and second sensing channels respectively connected to the first and second subpixels of the display panel, and has a first input terminal through which a sensing current is input and a second input terminal through which a reference voltage is input, and the first input terminal A current-voltage converter implemented as a transimpedance amplifier including a feedback resistor and a reset switch connected in parallel between the and output terminals, and the first input terminal of the current-voltage converter to the first sensing channel and the second sensing channel. A selectively connected mux switching unit, an analog-to-digital converter connected to the output terminal of the current-voltage converter, and level shifting the output signal of the current-voltage converter to match the input range of the analog-to-digital converter. A sensing method of an organic light emitting display device having a sampling unit, wherein, in a precharge period, a second input terminal of the current-voltage converter is connected to the first and second subpixels through the first and second sensing channels. Obtaining reference sampling values;
In a first reset period following the precharge period, resetting the first input terminal and output terminal of the current-voltage converter with a first sensing current input from the first sensing channel;
In a first sensing period following the first reset period, storing a first sampling voltage corresponding to the first sensing current in the sampling unit; and
In the second reset period following the first sensing period, a first sampling value according to the first sampling voltage is obtained, and then first correlated double sampling is performed based on the first sampling value and the reference sampling value. , A sensing method of an organic light emitting display device comprising resetting the first input terminal and the output terminal of the current-voltage converter with a second sensing current input from the second sensing channel. According to claim 8,
In a second sensing period following the second reset period, storing a second sampling voltage corresponding to the second sensing current in the sampling unit; and
In a third reset period following the second sensing period, obtaining a second sampling value according to the second sampling and then performing second correlated double sampling based on the second sampling value and the reference sampling value. A sensing method for an organic light emitting display device further comprising: According to clause 9,
Performing the first correlated double sampling is calculating a difference between the first sampling value and the reference sampling value,
The step of performing the second correlated double sampling is a step of calculating a difference between the second sampling value and the reference sampling value. According to clause 9,
In the first reset period, the first input terminal of the current-to-voltage converter is connected to the first subpixel through the first sensing channel, and the second input terminal of the current-to-voltage converter is connected to the first subpixel through the second sensing channel. It is connected to the second subpixel, and the first input terminal and output terminal of the current-voltage converter are shorted,
In the first sensing period, the first input terminal of the current-to-voltage converter is connected to the first subpixel through the first sensing channel, and the second input terminal of the current-to-voltage converter is connected to the first subpixel through the second sensing channel. It is connected to the second subpixel, and the first input and output terminals of the current-voltage converter are connected through a feedback resistor,
In the second reset period, the first input terminal of the current-to-voltage converter is connected to the second subpixel through the second sensing channel, and the second input terminal of the current-to-voltage converter is connected to the second subpixel through the first sensing channel. It is connected to the first subpixel, and the first input terminal and output terminal of the current-voltage converter are shorted,
In the second sensing period, the first input terminal of the current-voltage converter is connected to the second subpixel through the second sensing channel, and the second input terminal of the current-voltage converter is connected to the second subpixel through the first sensing channel. A sensing method for an organic light emitting display device, wherein the first sub-pixel is connected, and the first input and output terminals of the current-voltage converter are connected through a feedback resistor. According to clause 9,
Obtaining a first sampling value according to the first sampling voltage includes level shifting the first sampling voltage to fit the input range of the analog-to-digital converter, and converting the level-shifted first sampling voltage into an analog-to-digital converter. Including the step of digital transformation,
The step of obtaining a second sampling value according to the second sampling voltage includes level shifting the second sampling voltage to fit the input range of the analog-to-digital converter, and converting the level-shifted second sampling voltage into an analog-to-digital converter. A sensing method for an organic light emitting display device including the step of digital conversion.