KR102544046B1 - Organic light emitting display panel, organic light emitting display device, image driving method, and sensing method - Google Patents

Abstract

The present embodiments relate to an organic light emitting display panel, an organic light emitting display device, an image driving method and a sensing method thereof, and more particularly, a source node of a driving transistor receives a data voltage through a data line, and a driving transistor The gate node has a subpixel structure to which a reference voltage is applied through a reference voltage line and a signal line structure therefor, and through this, an organic light emitting display panel and an organic light emitting display device capable of significantly reducing the sensing time for the subpixel, It relates to an image driving method and a sensing method.

Description

Organic light emitting display panel, organic light emitting display device, image driving method and sensing method thereof

The present embodiments relate to an organic light emitting display panel, an organic light emitting display device, an image driving method and a sensing method thereof.

Recently, an organic light emitting display device that has been in the limelight as a display device uses an organic light-emitting diode (OLED) that emits light by itself, and has advantages such as fast response speed, luminous efficiency, luminance, and viewing angle.

An organic light emitting display panel of such an organic light emitting display device includes an organic light emitting diode, a driving transistor for driving the diode, and two or more transistors for controlling voltages of a gate node and a source node (drain node) of the driving transistor, respectively. Subpixels are arranged in a matrix form.

Meanwhile, the driving transistor and organic light emitting diode in each subpixel have unique characteristic values (eg, threshold voltage and mobility), and the characteristic values may change according to driving time.

In this case, variation in characteristic values between driving transistors or organic light emitting diodes between subpixels may occur, resulting in image non-uniformity, thereby degrading image quality.

Accordingly, a technology for compensating for a characteristic value deviation by sensing characteristic values of a driving transistor and an organic light emitting diode in each subpixel is being developed.

However, this prior art has a problem in that it takes too long to sense the characteristic values of the driving transistor and organic light emitting diode in each subpixel.

In particular, in order to reduce the number of signal lines, when a signal line serving as a sensing line for sensing a characteristic value is made in a structure in which several subpixels share, sensing driving for several subpixels cannot be simultaneously performed, so that each subpixel It may take a longer time to sense the characteristic values (eg, threshold voltage, mobility) of the driving transistor or the characteristic values (eg, threshold voltage) of the organic light emitting diode.

An object of the present embodiments is to provide an organic light emitting display panel, an organic light emitting display device, an image driving method, and a sensing method capable of significantly reducing the sensing time for subpixels.

Another object of the present embodiments is to provide an organic light emitting display panel, an organic light emitting display device, an image driving method, and a sensing method having a subpixel structure and a signal line structure capable of greatly reducing the sensing time for the subpixels. there is.

Another object of the present embodiments is an organic light emitting display panel having a subpixel structure and a signal line structure capable of greatly reducing the sensing time for a subpixel and increasing an aperture ratio, an organic light emitting display device, and an image driving method thereof. And to provide a sensing method.

In one aspect, in the present embodiments, a plurality of data lines and a plurality of reference voltage lines are disposed in a first direction, a plurality of gate lines are disposed in a second direction, and a plurality of data lines and a plurality of gate lines An organic light emitting display device including an organic light emitting display panel in which a plurality of defined subpixels are arranged in a matrix type, a data driver driving a plurality of data lines, and a gate driver driving a plurality of gate lines may be provided. .

In such an organic light emitting display device, each subpixel includes an organic light emitting diode, a driving transistor for driving the organic light emitting diode, a first transistor electrically connected between a source node of the driving transistor and a data line, and a gate node of the driving transistor. and a storage capacitor electrically connected between the source node.

In such an organic light emitting display device, a source node of a driving transistor of each subpixel receives a data voltage through a data line, and a gate node of a driving transistor of each subpixel receives a reference voltage through a reference voltage line.

In another aspect, in the present embodiments, a plurality of data lines and a plurality of reference voltage lines are disposed in a first direction, a plurality of gate lines are disposed in a second direction, and an organic light emitting diode, a device for driving the organic light emitting diode. An organic light emitting display panel in which subpixels including a driving transistor and a storage capacitor electrically connected between a gate node and a source node of the driving transistor are arranged in a matrix type, a data driver driving a plurality of data lines, and a plurality of gate lines A method for driving an image of an organic light emitting display device including a gate driver for driving may be provided.

This image driving method includes a first step of applying a reference voltage supplied by a reference voltage line to the gate node of the driving transistor and applying a data voltage supplied by the data line to the source node of the driving transistor; A second step of floating the gate node and the source node and a third step of emitting light from the organic light emitting diode may be included.

In another aspect, in the present embodiments, a plurality of data lines and a plurality of reference voltage lines are disposed in a first direction, a plurality of gate lines are disposed in a second direction, an organic light emitting diode, and a method for driving the organic light emitting diode. An organic light emitting display panel in which subpixels including driving transistors for driving transistors and storage capacitors electrically connected between a gate node and a source node of the driving transistors are arranged in a matrix type, a data driver driving a plurality of data lines, and a plurality of gates. A sensing method of an organic light emitting display device including a gate driver driving a line may be provided.

This sensing method includes an initialization step of applying a reference voltage supplied by a reference voltage line to the gate node of the driving transistor and applying an initialization voltage supplied by the data line to the source node of the driving transistor; It may include a tracking step of increasing the voltage of the source node of the driving transistor by floating , and a sampling step of electrically connecting the analog-to-digital converter and the data line and sensing the voltage of the data line by the analog-to-digital converter.

In another aspect, the present embodiments include a plurality of data lines disposed in a first direction, a plurality of reference voltage lines disposed in a first direction, a plurality of gate lines disposed in a second direction, and a plurality of data lines disposed in a second direction. An organic light emitting display panel including a plurality of subpixels defined by lines and a plurality of gate lines and arranged in a matrix type may be provided.

In such an organic light emitting display panel, each subpixel includes an organic light emitting diode, a driving transistor for driving the organic light emitting diode, a first transistor electrically connected between a source node of the driving transistor and a data line, and a gate node of the driving transistor. and a storage capacitor electrically connected between the source node and the source node.

In such an organic light emitting display panel, a source node of a driving transistor of each subpixel may be electrically connected to a data line, and a gate node of a driving transistor of each subpixel may be electrically connected to a reference voltage line.

Embodiments of the present disclosure include data lines extending in a first direction, a reference voltage line extending in the first direction and transmitting a reference voltage, a gate line extending in a second direction and transmitting a sensing signal, and a gate line. An organic light emitting display panel including subpixels connected in common, wherein each of the subpixels includes an organic light emitting diode, a driving transistor driving the organic light emitting diode, a source node of the driving transistor, and a corresponding data line among data lines. and a storage capacitor connected between a gate node and a source node of the driving transistor, and a first transistor controlled by a sensing signal, wherein the organic light emitting display panel is connected to a reference voltage line, and includes at least one of subpixels. An organic light emitting display device may further include a second transistor for applying a common reference voltage to both gate nodes.

Among the subpixels, at least two subpixels consecutively arranged in the second direction may share a second transistor, and a gate node of the second transistor may be connected to a gate line to which a scan signal is applied.

A reference voltage may be supplied to a gate node of the driving transistor, and a data voltage may be supplied to a source node of the driving transistor through a corresponding data line.

The data driver may further include a data driver driving the data lines, a gate driver driving the gate lines, and an analog-to-digital converter electrically connected to the corresponding data line to sense a voltage of the corresponding data line and convert it into a digital value.

A sampling switch electrically connected between the corresponding data line and the analog-to-digital converter, an initialization switch electrically connected between the corresponding data line and an initialization voltage supply node to which the initialization voltage is provided, and a data line to which the corresponding data line and data voltage are provided. A data switch electrically connected between the voltage supply nodes may be included.

Data drivers may include sampling switches and analog-to-digital converters.

A data voltage or an initialization voltage may be supplied to a corresponding data line, or a voltage of a corresponding data line may be supplied to an analog-to-digital converter.

In the threshold voltage sensing driving period of the driving transistor, the period in which the sensing signal has the turn-on level is shorter than the period in which the scan signal has the turn-on level, and in the mobility sensing driving period of the driving transistor, the scan signal is turned on. The period during which the sensing signal has the level may be shorter than the period during which the sensing signal has the turn-on level.

In the threshold voltage sensing driving period of the driving transistor, an entire period in which the sensing signal has a turn-on level may overlap a period in which the scan signal has a turn-on level.

In the mobility sensing driving period of the driving transistor, an entire period in which the scan signal has a turn-on level may overlap a period in which the sensing signal has a turn-on level.

According to the present embodiments as described above, it is possible to provide an organic light emitting display panel, an organic light emitting display device, an image driving method, and a sensing method capable of significantly reducing the sensing time for subpixels.

In addition, according to the present embodiments, an organic light emitting display panel having a subpixel structure and a signal line structure, an organic light emitting display device, an image driving method, and a sensing method thereof, which can greatly reduce the sensing time for the subpixels, are provided. can

In addition, according to the present embodiments, an organic light emitting display panel having a subpixel structure and a signal line structure capable of greatly reducing the sensing time for a subpixel and increasing an aperture ratio, an organic light emitting display device, and an image driving method thereof And a sensing method may be provided.

1 is a system configuration diagram of an organic light emitting display device according to the present embodiments.
2 is a diagram illustrating a 3T1C structure of each subpixel in an organic light emitting display panel according to the present embodiments.
3 is a diagram showing a 2T1C structure of each subpixel in an organic light emitting display panel according to the present embodiments.
4 is an exemplary arrangement of signal lines in a column direction based on four subpixels in an organic light emitting display panel according to the present embodiments.
5 is a diagram showing four subpixels having a 3T1C structure in an organic light emitting display panel according to the present embodiments.
6 is a diagram showing four sub-pixels having a 2T1C structure in an organic light emitting display panel according to the present embodiments.
7 to 9 are diagrams for explaining an image driving method of an organic light emitting display device according to the present exemplary embodiments.
10 is a diagram illustrating a compensation circuit of an organic light emitting display device according to example embodiments.
11 is a flowchart of a method for driving an image of an organic light emitting display device according to example embodiments.
12 is a flowchart of a sensing method of an organic light emitting display device according to example embodiments.
13 is a timing diagram of sensing a threshold voltage of a driving transistor of an organic light emitting display device according to example embodiments.
14 is a timing diagram for sensing mobility of a driving transistor of an organic light emitting display device according to the present embodiments.
15 is a diagram for explaining a sensing time saving effect of the organic light emitting display device according to the present embodiments.
16 is a diagram illustrating a source driver integrated circuit of an organic light emitting display device according to the present embodiments.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Some embodiments of the present invention are described in detail below with reference to exemplary drawings. In adding reference numerals to components of each drawing, the same components may have the same numerals as much as possible even if they are displayed on different drawings. In addition, in describing the present invention, if it is determined that a detailed description of a related known configuration or function may obscure the gist of the present invention, the detailed description may be omitted.

Also, terms such as first, second, A, B, (a), and (b) may be used in describing the components of the present invention. These terms are only used to distinguish the component from other components, and the nature, sequence, order, or number of the corresponding component is not limited by the term. When an element is described as being “connected,” “coupled to,” or “connected” to another element, that element is or may be directly connected to that other element, but intervenes between each element. It will be understood that may be "interposed", or each component may be "connected", "coupled" or "connected" through other components.

1 is a system configuration diagram of an organic light emitting display device 100 according to the present embodiments.

Referring to FIG. 1 , an organic light emitting display device 100 according to the present exemplary embodiments has a plurality of data lines (DL) and a plurality of reference voltage lines (RVL) in a first direction (eg, : column direction), a plurality of gate lines (GL) are disposed in a second direction (eg, row direction), and defined by a plurality of data lines DL and a plurality of gate lines GL an organic light emitting display panel 110 in which a plurality of sub pixels (SP) are arranged in a matrix type, a data driver 120 driving a plurality of data lines DL, and a plurality of gate lines GL It includes a gate driver 130 for driving, a controller 140 for controlling the data driver 120 and the gate driver 130, and the like.

The controller 140 controls the data driver 120 and the gate driver 130 by supplying various control signals to the data driver 120 and the gate driver 130 .

The controller 140 starts scanning according to the timing implemented in each frame, converts input image data input from the outside to suit the data signal format used by the data driver 120, and outputs the converted image data. , data drive is controlled at an appropriate time according to the scan.

The controller 140 may be a timing controller used in a typical display technology or a control device that further performs other control functions including a timing controller.

The data driver 120 drives the plurality of data lines DL by supplying data voltages to the plurality of data lines DL. Here, the data driver 120 is also referred to as a 'source driver'.

The data driver 120 may include at least one source driver integrated circuit (SDIC) to drive a plurality of data lines.

The gate driver 130 sequentially drives the plurality of gate lines GL by sequentially supplying scan signals to the plurality of gate lines GL. Here, the gate driver 130 is also referred to as a 'scan driver'.

The gate driver 130 may include at least one gate driver integrated circuit (GDIC).

The gate driver 130 sequentially supplies scan signals of an on voltage or an off voltage to the plurality of gate lines GL under the control of the controller 140 .

When a specific gate line is opened by the gate driver 130, the data driver 120 converts the image data Data received from the controller 140 into an analog data voltage Vdata to generate multiple data lines DL. ) is supplied.

The data driver 120 is located on only one side (eg, upper or lower side) of the organic light emitting display panel 110 in FIG. : upper side and lower side) may be located both.

The gate driver 130 is located on only one side (eg, the left or right side) of the organic light emitting display panel 110 in FIG. Example: left and right) may be located on both sides.

The above-described controller 140 includes various types of input image data, including a vertical synchronization signal (Vsync), a horizontal synchronization signal (Hsync), an input data enable (DE) signal, a clock signal (CLK), and the like. Receive timing signals from outside (e.g. host system).

The controller 140 receives timing signals such as a vertical sync signal (Vsync), a horizontal sync signal (Hsync), an input DE signal, and a clock signal in order to control the data driver 120 and the gate driver 130, Various control signals are generated and output to the data driver 120 and the gate driver 130.

For example, in order to control the gate driver 130, the controller 140 includes a gate start pulse (GSP), a gate shift clock (GSC), and a gate output enable signal (GOE: It outputs various gate control signals (GCS: Gate Control Signal) including Gate Output Enable).

Here, the gate start pulse GSP controls the operation start timing of one or more gate driver integrated circuits constituting the gate driver 130 . The gate shift clock (GSC) is a clock signal commonly input to one or more gate driver integrated circuits and controls shift timing of scan signals (gate pulses). The gate output enable signal GOE specifies timing information of one or more gate driver integrated circuits.

In addition, the controller 140, in order to control the data driver 120, a source start pulse (SSP: Source Start Pulse), a source sampling clock (SSC: Source Sampling Clock), a source output enable signal (SOE: Source Output It outputs various data control signals (DCS) including Enable) and the like.

Here, the source start pulse SSP controls data sampling start timing of one or more source driver integrated circuits constituting the data driver 120 . The source sampling clock (SSC) is a clock signal that controls sampling timing of data in each source driver integrated circuit. The source output enable signal SOE controls output timing of the data driver 120 .

The data driver 120 may include at least one source driver integrated circuit (SDIC) to drive a plurality of data lines.

Each source driver integrated circuit (SDIC) is attached to a bonding pad of the organic light emitting display panel 110 by a tape automated bonding (TAB) method or a chip on glass (COG) method. It may be connected to, directly disposed on the organic light emitting display panel 110, or may be integrated and disposed on the organic light emitting display panel 110 in some cases. In addition, each source driver integrated circuit (SDIC) may be implemented in a Chip On Film (COF) method mounted on a film connected to the organic light emitting display panel 110 .

Each source driver integrated circuit (SDIC) may include a shift register, a latch circuit, a digital to analog converter (DAC), an output buffer, and the like.

In some cases, each source driver integrated circuit (SDIC) may further include an analog to digital converter (ADC).

The gate driver 130 may include at least one gate driver integrated circuit (GDIC).

Each gate driver integrated circuit (GDIC) is connected to a bonding pad of the organic light emitting display panel 110 by a tape automated bonding (TAB) method or a chip on glass (COG) method, or is connected to a gate in panel (GIP) method. ) type and directly disposed on the organic light emitting display panel 110, or may be integrated and disposed on the organic light emitting display panel 110 in some cases. In addition, each gate driver integrated circuit (GDIC) may be implemented in a chip on film (COF) method mounted on a film connected to the organic light emitting display panel 110 .

Each gate driver integrated circuit (GDIC) may include a shift register, a level shifter, and the like.

The organic light emitting display device 100 according to the present embodiments includes at least one source printed circuit board (S-PCB) required for circuit connection to at least one source driver integrated circuit (SDIC) and It may include a control printed circuit board (C-PCB) for mounting control parts and various electric devices.

At least one source driver integrated circuit (SDIC) may be mounted on the at least one source printed circuit board (S-PCB), or a film having at least one source driver integrated circuit (SDIC) mounted may be connected.

On the control printed circuit board (C-PCB), the controller 140 for controlling operations of the data driver 120 and the gate driver 130, the organic light emitting display panel 110, the data driver 120, and the gate driver A power controller that supplies various voltages or currents to 130 or the like or controls various voltages or currents to be supplied may be mounted.

The at least one source printed circuit board (S-PCB) and the control printed circuit board (C-PCB) may be circuitically connected through at least one connecting member.

Here, the connecting member may be a flexible printed circuit (FPC) or a flexible flat cable (FFC).

At least one source printed circuit board (S-PCB) and one control printed circuit board (C-PCB) may be integrated into one printed circuit board.

Each subpixel SP disposed on the organic light emitting display panel 110 may include a circuit element such as a transistor.

For example, each sub-pixel SP is composed of organic light emitting diodes (OLEDs) and circuit elements such as driving transistors for driving them.

The type and number of circuit elements constituting each subpixel (SP) may be variously determined according to a provided function and a design method. In the present specification, each subpixel includes three transistors and one capacitor. A case of having a 3T (transistor) 1C (capacitor) structure and a case of having a 2T1C structure including two transistors and one capacitor are exemplified.

2 is a diagram showing a 3T1C structure of each sub-pixel (SP) in the organic light emitting display panel 110 according to the present embodiments, and FIG. 3 is a view showing the organic light emitting display panel 110 according to the present embodiments, It is a diagram showing the 2T1C structure of each sub-pixel (SP).

Referring to FIGS. 2 and 3 , in the organic light emitting display panel 110 according to the present embodiments, each subpixel SP having a 3T1C structure or a 2T1C structure is an organic light-emitting diode (OLED). Emitting Diode), a driving transistor (DRT: Driving Transistor) for driving an organic light emitting diode (OLED), and a sensing signal (SENSE), which is a gate signal, and is controlled by the source node (Ns) of the driving transistor (DRT) and data A first transistor T1 electrically connected between the lines DL and a storage capacitor Cst electrically connected between the gate node Ng and the source node Ns of the driving transistor DRT may be commonly included. there is.

Meanwhile, as shown in FIG. 2 , the organic light emitting display panel 110 in which the subpixels SP of the 3T1C structure or the subpixels SP of the 2T1C structure are arranged in a matrix type is controlled by the sensing signal SENSE, which is a gate signal. A second transistor T2 may be disposed to transfer the reference voltage Vref supplied from the reference voltage line RVL to the gate node Ng of the driving transistor DRT of each subpixel SP.

Through the second transistor T2, the voltage state of the gate node Ng of the driving transistor DRT can be controlled, so that subpixel driving can be efficiently controlled and various subpixel driving can be performed. there is.

The organic light emitting diode (OLED) mentioned above may include a first electrode (eg, an anode electrode), an organic layer, and a second electrode (eg, a cathode electrode).

The driving transistor DRT drives the organic light emitting diode (OLED) by supplying a driving current to the organic light emitting diode (OLED).

In the driving transistor DRT, the source node may be electrically connected to the first electrode of the organic light emitting diode (OLED) and electrically connected to the source node (or drain node) of the first transistor T1, and the drain node may be driven. It may be electrically connected to a driving voltage line (DVL) that supplies the voltage EVDD, and the gate node may be electrically connected to the source node (or drain node) of the second transistor T2.

2 and 3 , in a subpixel SP having a 3T1C structure and a subpixel SP having a 2T1C structure, the source node Ns of the driving transistor DRT is connected to the data line DL The data voltage Vdata is applied through , and the gate node Ng of the driving transistor DRT receives the reference voltage Vref through the reference voltage line RVL.

As described above, in each subpixel SP of the organic light emitting display panel 110 according to the present exemplary embodiments, the driving transistor DRT driving the organic light emitting diode OLED receives the data voltage Vdata. It is different from the general subpixel structure in that it is applied to the source node Ns instead of the gate node Ng and the reference voltage Vref is applied to the gate node Ng instead of the source node Ns.

Due to this unique subpixel structure, as will be described later, in a structure in which the reference voltage line (RVL) delivering the reference voltage (Vref) corresponding to the common voltage is disposed not in one subpixel column but in each of a plurality of subpixel columns, the sensing time is reduced. has the advantage of significantly reducing

Meanwhile, one second transistor T2 may exist in each subpixel SP. In this case, each subpixel SP has a 3T1C structure as shown in FIG. 2 .

Referring to FIG. 2 , second transistors T2 existing one by one for each subpixel SP are electrically connected between the gate node Ng of the driving transistor DRT and the reference voltage line RVL. .

When the second transistor T2 is turned on, the reference voltage Vref supplied from the reference voltage line RVL is applied to the gate node Ng of the driving transistor DRT.

As described above, the second transistor T2 for transferring the reference voltage Vref to the gate node Ng of the driving transistor DRT is disposed in each sub-pixel SP, so that the gate node of the driving transistor DRT DRT The voltage of (Ng) can be controlled for each subpixel, and through this, driving can be efficiently controlled for each subpixel.

Meanwhile, referring to FIG. 3 , one second transistor T2 may exist for every two or more subpixels SP or one for each reference voltage line RVL. In this case, each subpixel SP may have a 2T1C structure as shown in FIG. 3 .

In this way, the second transistor T2 for transferring the reference voltage Vref to the gate node Ng of the driving transistor DRT is not disposed in every subpixel SP, but every two or more subpixels SP. By arranging one by one or one by one for each reference voltage line RVL, the number of transistors in the organic light emitting display panel 110 can be greatly reduced and the aperture ratio of the organic light emitting display panel 110 can be increased.

Meanwhile, in FIGS. 2 and 3 , each of the driving transistor DRT, the first transistor T1 and the second transistor T2 may be implemented as an n type or a p type.

Meanwhile, the scan signal SCAN and the sensing signal SENSE may be separate gate signals. In this case, the scan signal SCAN and the sensing signal SENSE may be respectively applied to the gate node of the first transistor T1 and the gate node of the second transistor T2 through different gate lines.

In some cases, the scan signal SCAN and the sensing signal SENSE may be the same gate signal. In this case, the scan signal SCAN and the sensing signal SENSE may be commonly applied to the gate node of the first transistor T1 and the gate node of the second transistor T2 through the same gate line.

The storage capacitor Cst is not a parasitic capacitor (eg, Cgs or Cgd) that is an internal capacitor existing between the first node N1 and the second node N2 of the driving transistor DRT, but a driving capacitor Cst. It is an external capacitor intentionally designed outside the transistor (DRT).

4 is an exemplary arrangement of signal lines DL1, DL2, DL3, DL4, and RVL in a column direction based on four subpixels (SP) in the organic light emitting display panel 110 according to the present embodiments. am.

The reference voltage line RVL is a column-direction signal line for transmitting the reference voltage Vref corresponding to the common voltage, and may be arranged one by one in each subpixel column, but two or more subpixels for driving efficiency. One can be placed in each column.

If one reference voltage line RVL is disposed in every two or more subpixel columns, for example, as shown in FIG. 4 , one reference voltage line RVL may be disposed in every four subpixel columns.

In FIG. 4 , four subpixels SP1 , SP2 , SP3 , and SP4 are four subpixels belonging to any one subpixel row among four subpixel columns.

Here, the four subpixels SP1, SP2, SP3, and SP4 are, for example, a subpixel emitting red light, a subpixel emitting white light, a subpixel emitting blue light, and a subpixel emitting green light. may be pixels.

Referring to FIG. 4 , four subpixels SP1 , SP2 , SP3 , and SP4 correspond to and electrically connect four data lines DL1 , DL2 , DL3 , and DL4 .

In this case, in the subpixel SP1 , the first transistor T1 transfers the data voltage supplied from the data line DL1 to the source node Ns of the driving transistor DRT. In the subpixel SP2, the first transistor T1 transfers the data voltage supplied from the data line DL2 to the source node Ns of the driving transistor DRT. In the subpixel SP3, the first transistor T1 transfers the data voltage supplied from the data line DL3 to the source node Ns of the driving transistor DRT. Also, in the subpixel SP4, the first transistor T1 transfers the data voltage supplied from the data line DL4 to the source node Ns of the driving transistor DRT.

Referring to FIG. 4 , four subpixels SP1 , SP2 , SP3 , and SP4 may be connected in common to one reference voltage line RVL. That is, one reference voltage line RVL is shared by four subpixels SP1, SP2, SP3, and SP4.

In this case, the gate node Ng of the driving transistor DRT of each of the four subpixels SP1, SP2, SP3, and SP4 is commonly applied with the reference voltage Vref through one reference voltage line RVL. can receive

Regarding the application of the reference voltage Vref, the second transistor T2 is involved in controlling whether or not the gate node Ng of the driving transistor DRT is connected to the reference voltage line RVL.

As shown in FIG. 4, when one reference voltage line (RVL) is arranged for every four subpixel columns, four subpixels (SP1, SP2, SP3, SP4) have the 3T1C structure of FIG. 2 and FIG. 5 shows the structure of the second transistor T2 and the reference voltage line RVL for applying the reference voltage Vref to the gate node Ng of the driving transistor DRT for each case having the 2T1C structure of FIG. It will be described in more detail with reference to FIG. 6 .

5 is a diagram illustrating four sub-pixels SP1 , SP2 , SP3 , and SP4 having a 3T1C structure in the organic light emitting display panel 110 according to the present exemplary embodiments.

Referring to FIG. 5, each of the four sub-pixels SP1, SP2, SP3, and SP4 is a 3T1C including three transistors DRT, T1, and T2 and one capacitor Cst, as shown in FIG. have a structure

Accordingly, when one reference voltage line RVL is disposed in every four subpixel columns, each of the four subpixels SP1 , SP2 , SP3 , and SP4 includes the driving transistor DRT and the first transistor T1 . In addition, a second transistor T2 may also be included.

The second transistor T2 included in each of the four subpixels SP1 , SP2 , SP3 , and SP4 may be connected in common to one reference voltage line RVL.

The second transistor T2 of the sub-pixel SP1 is connected between the gate node Ng of the driving transistor DRT of the sub-pixel SP1 and the reference voltage line RVL, and the second transistor T2 of the sub-pixel SP2 is It is connected between the gate node Ng of the driving transistor DRT of the pixel SP2 and the reference voltage line RVL, and the second transistor T2 of the subpixel SP3 is connected to the gate node of the driving transistor DRT of the subpixel SP3 ( Ng) and the reference voltage line RVL, and the second transistor T2 of the subpixel SP4 is connected between the gate node Ng of the driving transistor DRT of the subpixel SP4 and the reference voltage line RVL. do.

Meanwhile, among the four subpixels SP1 , SP2 , SP3 , and SP4 , the drain node (or source node) of the second transistor T2 of the first subpixel SP1 and the second transistor T2 of the second subpixel SP2 The drain node (or source node) of transistor T2 may be electrically connected to each other and connected together to reference voltage line RVL.

Also, among the four subpixels SP1 , SP2 , SP3 , and SP4 , the drain node (or source node) of the second transistor T2 of the third subpixel SP3 and the second transistor T2 of the fourth subpixel SP4 The drain node (or source node) of transistor T2 may be electrically connected to each other and connected together to reference voltage line RVL.

According to the structure as shown in FIG. 5 , even if the reference voltage Vref is supplied through the reference voltage line RVL, the second transistor T2 of each of the four subpixels SP1 , SP2 , SP3 , and SP4 is turned on and off. By individually controlling the driving of each of the four subpixels (SP1, SP2, SP3, SP4) can be individually controlled.

6 is a diagram illustrating four sub-pixels SP1 , SP2 , SP3 , and SP4 having a 2T1C structure in the organic light emitting display panel 110 according to the present exemplary embodiments.

Referring to FIG. 6 , each of the four subpixels SP1 , SP2 , SP3 , and SP4 has a 2T1C structure including two transistors DRT and T1 and one capacitor Cst, as shown in FIG. 3 . have

Accordingly, when one reference voltage line RVL is disposed in each of four subpixel columns, each of the four subpixels SP1, SP2, SP3, and SP4 includes a driving transistor DRT and a first transistor T1. but does not individually include the second transistor T2.

In this case, one reference voltage line RVL is disposed in each of the four subpixel columns, and the first part RVL_I into which the reference voltage Vref is introduced and the reference voltage Vref are connected to the four subpixels SP1. , SP2, SP3, and SP4) and a second part (RVL_O) supplied to.

The gate node Ng of the driving transistor DRT of each of the four subpixels SP is connected in common with the second part RVL_O of one reference voltage line RVL.

The second transistor T2, which is commonly used to apply the reference voltage Vref to the gate node Ng of the driving transistor DRT, is a first part RVL_I of one reference voltage line RVL. and the second portion RVL_O of one reference voltage line RVL.

One such second transistor T2 may be present for each reference voltage line RVL, or one for each subpixel row in one reference voltage line RVL.

As described above, in order to transfer the reference voltage Vref to the gate node Ng of the driving transistor DRT of each of the four subpixels SP1, SP2, SP3, and SP4, the four subpixels SP1 and SP2 , SP3, and SP4 are disposed on one reference voltage line RVL, so that all subpixels in the organic light emitting display panel 110 are connected to the second transistor (T2). Since it is not necessary to include T2), the number of second transistors T2 can be greatly reduced. Accordingly, the aperture ratio of the organic light emitting display panel 110 can be significantly increased.

Meanwhile, one commonly used second transistor T2 may also be regarded as a transistor included in one of the four subpixels SP1 , SP2 , SP3 , and SP4 .

In this case, among the four subpixels SP1, SP2, SP3, and SP4, one subpixel deemed to include the second transistor T2 may have a 3T1C structure, and the remaining three subpixels may have a 2T1C structure. there is.

7 to 9 are diagrams for explaining an image driving method of the organic light emitting display device 100 according to the present exemplary embodiments.

Referring to FIG. 7 , a data voltage Vdata, which is a variable voltage according to an image pattern, is applied to the source node Ns of the driving transistor DRT, and the gate node Ng of the driving transistor DRT A reference voltage (Vref), which is a constant voltage, may be applied as , and an image may be expressed using a potential difference (Vref - Vdata) of both ends of the storage capacitor (Cst).

In a general organic light emitting display device, a data voltage Vdata, which is a variable voltage according to an image pattern, is applied to the gate node Ng of the driving transistor DRT, and the source node of the driving transistor DRT is applied. There is a difference from expressing an image by applying a reference voltage (Vref), which is a constant voltage (Ns).

A case of driving the four subpixels SP1, SP2, SP3, and SP4 according to the image driving method will be described as an example with reference to FIGS. 8 and 9 .

According to the present embodiments, 8V and 4V are applied as four data voltages Vdata1, Vdata2, Vdata3, and Vdata4 to the gate nodes Ng of the driving transistors DRT of the four subpixels SP1, SP2, SP3, and SP4. , 3V, 9V are applied, and a common reference voltage (Vref) of 6V is applied to the source node (NS) of the driving transistor (DRT) of the four sub-pixels (SP1, SP2, SP3, SP4), the four sub-pixels (SP1, SP2, SP3, SP4) The potential difference (Vref-Vdata1, Vref-Vdata2, Vref-Vdata3, Vref-Vdata4) of the storage capacitor (Cst) of the pixel (SP1, SP2, SP3, SP4) is made -2V, 2V, 3V, -3V, Desired image expression may be possible.

Meanwhile, in the case of the organic light emitting display device 100 according to the present exemplary embodiments, as the driving time of each subpixel SP is increased, circuit elements such as an organic light emitting diode (OLED) and a driving transistor (DRT) Degradation may proceed.

Accordingly, inherent characteristic values (eg, threshold voltage, mobility, etc.) of circuit elements such as organic light emitting diodes (OLEDs) and driving transistors (DRTs) may change.

The degree of change in characteristic values between circuit elements may be different depending on the degree of deterioration of each circuit element.

In this case, characteristic value deviations between circuit elements may occur, and luminance deviations between subpixels may occur.

Accordingly, problems such as deterioration in accuracy of luminance expressiveness of subpixels or occurrence of screen abnormalities may occur.

The organic light emitting display device 100 according to the present embodiments includes a sensing function for sensing characteristic values or changes in characteristic values of circuit elements (driving transistors and organic light emitting diodes) and circuit elements (driving transistors and organic light emitting diodes) using sensing results. A compensation function for compensating for a characteristic value deviation between diodes) may be provided.

The organic light emitting display device 100 according to the present embodiments may include a compensation circuit as shown in FIG. 10 to provide sensing and compensation functions.

10 is a diagram illustrating a compensation circuit of the organic light emitting display device 100 according to the present embodiments.

Referring to FIG. 10 , the compensation circuit of the organic light emitting display device 100 according to the present embodiments is electrically connected to each data line DL and senses the voltage (analog voltage) of each data line DL. An analog-to-digital converter (ADC) that converts the sensed voltage into a sensing value corresponding to a digital value and outputs sensing data including the converted sensing value, and receives sensing data or senses data stored in a memory (not shown) Compensation unit 1000 that reads and compensates for the characteristics of circuit elements (eg, threshold voltage or mobility of a driving transistor, threshold voltage of an organic light emitting diode) in the corresponding subpixel (SP) by using the sensing data. can do.

A characteristic value of a driving transistor (DRT) or organic light emitting diode (OLED) in each subpixel may be sensed and compensated for using the compensation circuit as described above. Accordingly, it is possible to prevent deterioration of image quality due to variation in characteristic values.

Meanwhile, in the organic light emitting display device 100 according to the present embodiments, each data line DL not only serves as a “data signal line” that transfers the data voltage Vdata for image driving, but also performs sensing driving. The role of the "sensing driving line" for applying the initialization voltage Vpres for sensing driving to the source node Ns of the driving transistor DRT and the analog voltage of the source node Ns of the driving transistor DRT It can also serve as a "sensing line" to deliver to a digital converter (ADC).

Therefore, as shown in FIG. 10, the compensation circuit includes an initialization switch SPRE for controlling whether the data line DL operates as a sensing driving line, and whether the data line DL operates as a data signal line. A data switch PRE_SEL for controlling whether the data line DL operates as a sensing line or not, and a sampling switch SAM for controlling whether or not the data line DL operates as a sensing line may be included.

The sampling switch (SAM) is electrically connected between the data line (DL) and the analog-to-digital converter (ADC).

The sampling switch SAM is turned on at a predetermined specific time or timing, and can connect the data line DL and the analog-to-digital converter ADC.

Here, the specific time may be a predetermined time when the voltage of the data line DL is expected to be in a voltage state reflecting characteristic values of the driving transistor DRT or the organic light emitting diode OLED according to the sensing drive.

Further, the specific timing may be a timing monitored when the voltage of the data line DL becomes a voltage state reflecting characteristic values of the driving transistor DRT or the organic light emitting diode OLED according to the sensing drive.

The initialization switch SPRE is electrically connected between the data line DL and the initialization voltage supply node Npres.

The initialization switch SPRE is turned on in the initialization phase during the sensing driving period, the initialization voltage Vpres is supplied from the initialization voltage supply node Npres to the data line DL, and the turned-on first transistor ( T1) is applied to the source node Ns of the driving transistor DRT.

The data switch PRE_SEL is electrically connected between the data line DL and the data voltage supply node Ndata.

The data switch PRE_SEL is turned on in the image driving period, and the data voltage Vdata corresponding to the image signal is supplied from the data voltage supply node Ndata to the data line DL.

By controlling the on/off of the aforementioned three switch configurations (PRE_SEL, SPRE, and SAM), the data line DL may operate as one of a data signal line, a sensing driving line, and a sensing line, depending on circumstances.

11 is a flowchart of an image driving method of the organic light emitting display device 100 according to the present embodiments.

Referring to FIG. 11 , in an image driving method of an organic light emitting display device 100 according to the present embodiments, a reference voltage Vref supplied by a reference voltage line RVL is applied to a gate node of a driving transistor DRT ( Ng) and a first step (S1110) of applying the data voltage Vdata supplied by the data line DL to the source node Ns of the driving transistor DRT, and the gate of the driving transistor DRT. A second step ( S1120 ) of floating the node Ng and the source node ( Ns ) and a third step ( S1130 ) of causing the organic light emitting diode (OLED) to emit light.

According to the above-described image driving method, the data voltage Vdata, which is a variable voltage according to the image pattern, is applied to the source node Ns of the driving transistor DRT, and the gate node of the driving transistor DRT ( A reference voltage (Vref), which is a constant voltage (Ng), may be applied, and an image may be expressed using a potential difference (Vref - Vdata) across the storage capacitor (Cst).

Meanwhile, in the first step S1110, the turn-on level sensing signal SENSE is connected between the data line DL and the source node Ns of the driving transistor DRT, and is connected to the gate node of the first transistor T1. to turn on the first transistor T1 and turn on the data switch PRE_SEL electrically connected between the data line DL and the data voltage supply node Ndata to The data voltage Vdata supplied by may be applied to the source node Ns of the driving transistor DRT.

Further, in the first step S1110, the turn-on level scan signal SCAN is applied to the gate node of the second transistor T2 connected between the reference voltage line RVL and the gate node Ng of the driving transistor DRT. ) may be applied to turn on the second transistor T2 so that the reference voltage Vref supplied by the reference voltage line RVL may be applied to the gate node Ng of the driving transistor DRT.

In the second step S1120, the first transistor T1 or the data switch PRE_SEL is turned off to float the source node Ns of the driving transistor DRT, and the second transistor T2 is turned off. so that the gate node Ng of the driving transistor DRT can be floated.

In the second step S1120, as the gate node Ng and the source node Ns of the driving transistor DRT float, the potential difference between the gate node Ng and the source node Ns of the driving transistor DRT ( While Vref-Vdata) is maintained, the voltages of the gate node Ng and the source node Ns of the driving transistor DRT increase together.

When the voltage of the source node Ns of the driving transistor DRT rises, the increased voltage of the source node Ns of the driving transistor DRT supplies current to the organic light emitting diode OLED (base voltage). higher than the voltage obtained by adding the threshold voltage of the organic light emitting diode (OLED) to EVSS), the third step (S1130) proceeds. That is, current is supplied to the organic light emitting diode (OLED) so that the organic light emitting diode (OLED) emits light.

Here, in the first step S1110, the data voltage Vdata applied to the source node Ns of the driving transistor DRT should be used as a voltage lower than the threshold voltage of the organic light emitting diode OLED.

Only then, when the organic light emitting diode (OLED) does not emit light in the first step ( S1110 ) and passes through the second step ( S1120 ), that is, when the voltage of the source node (Ns) of the driving transistor (OLED) increases, the organic light emitting diode (OLED) emits light. Since the diode OLED emits light, image expression may be improved.

In the above-described third step S1130, the luminance expressed in the sub-pixel SP according to the emission of the organic light-emitting diode OLED is based on the reference voltage Vref applied to the gate node Ng of the driving transistor DRT. It may be the luminance corresponding to the difference (Vref-Vdata) of the data voltage Vdata applied to the source node Ns of the driving transistor DRT.

12 is a flowchart of a sensing method of the organic light emitting display device 100 according to the present embodiments.

Referring to FIG. 12 , the sensing method of the organic light emitting display device 100 according to the present exemplary embodiments may include an initialization step ( S1210 ), a tracking step ( S1220 ), and a sampling step ( S1230 ).

In the initialization step S1210, the reference voltage Vref supplied by the reference voltage line RVL is applied to the gate node Ng of the driving transistor DRT, and the initialization voltage supplied by the data line DL ( Vpres) is applied to the source node Ns of the driving transistor DRT.

In the tracking step ( S1220 ), the source node Ns of the driving transistor DRT is floated to increase the voltage at the source node Ns of the driving transistor DRT.

As the voltage of the source node Ns of the driving transistor DRT rises in this tracking step (S1220), the characteristic value (eg, threshold voltage, mobility) of the driving transistor DRT or the characteristic value of the organic light emitting diode (OLED) ( Example: Tracking the voltage state reflecting the threshold voltage).

In this tracking step (S1220), when the voltage state reflecting the characteristic value (eg, threshold voltage, mobility) of the driving transistor (DRT) or the characteristic value (eg, threshold voltage) of the organic light emitting diode (OLED) is obtained, the sampling step (S1230) ) proceeds.

In the sampling step (S1230), the analog-to-digital converter (ADC) and the data line (DL) are electrically connected. Accordingly, the analog-to-digital converter ADC senses the voltage of the data line DL.

According to the above-described sensing method, the initialization voltage Vpres is applied to the source node Ns of the driving transistor DRT, and the reference voltage Vref for sensing is applied to the gate node Ng of the driving transistor DRT. After the sensing drive is set to an initial state, the source node (Ns) of the driving transistor (DRT) and the data line (DL) are brought into a desired voltage state through the data line (DL) present in each subpixel (SP). By sensing the voltage, there is an advantage in that the sampling process for each subpixel SP can be simultaneously performed. Accordingly, the entire sensing time of the organic light emitting display panel 110 can be greatly reduced.

Meanwhile, in the initialization step S1210, the first transistor T1 connected between the data line DL and the source node Ns of the driving transistor DRT is turned on through the turn-on level sensing signal SENSE. and turns on the initialization switch SPRE electrically connected between the data line DL and the initialization voltage supply node Npres to supply the initialization voltage Vpres supplied by the data line DL to the driving transistor ( DRT) to the source node (Ns).

In addition, in the initialization step S1210, the second transistor T2 connected between the reference voltage line RVL and the gate node Ng of the driving transistor DRT is turned on, so that the reference voltage line RVL The supplied reference voltage Vref is applied to the gate node Ng of the driving transistor DRT.

In the tracking step S1220, the initialization switch SPRE is turned off to float the source node Ns of the driving transistor DRT, and the source node Ns of the driving transistor DRT and the data line DL The voltage of rises from the initialization voltage Vpres.

In the sampling step (S1230), the analog-to-digital converter (ADC) and the data line (DL) are electrically connected by turning on the sampling switch (SAM) electrically connected between the analog-to-digital converter (ADC) and the data line (DL). it connects

Accordingly, the analog-to-digital converter ADC senses the voltage of the data line DL.

In the sampling step ( S1230 ), the sampling time point, ie, the turn-on time point of the sampling switch SAM, may vary according to the type of sensing drive.

For example, in the case of sensing driving for sensing the threshold voltage of the driving transistor DRT, the sampling time may be after the point at which the voltage of the source node Ns of the driving transistor DRT rises and becomes saturated.

In the case of sensing driving for sensing the mobility of the driving transistor DRT, only the time required to obtain the degree of voltage increase (voltage change) of the source node Ns of the driving transistor DRT from the floating point is elapsed. A certain period of time after the plotting point can be set as the sampling point.

Referring to FIG. 12 , after the sampling step (S1230), a characteristic value compensation step (S1240) of compensating for the threshold voltage or mobility of the driving transistor DRT based on the voltage sensed by the analog-to-digital converter (ADC) may be performed. .

In the characteristic value compensation step ( S1240 ), a threshold voltage or mobility of the driving transistor DRT is determined based on the sensed voltage, and a threshold voltage deviation or mobility deviation is found and a compensation value is calculated to remove it.

The compensation unit 1000 changes image data to be supplied to a corresponding subpixel SP based on the calculated compensation value.

When the source driver integrated circuit (SDIC) converts the changed image data into data voltages and outputs them, compensation for the threshold voltage or mobility of the driving transistor (DRT) is actually performed for the corresponding subpixel.

13 is a timing diagram of sensing a threshold voltage of the driving transistor DRT of the organic light emitting display device 100 according to the present embodiments.

Referring to FIG. 13 , in the initialization step (S1210) of the threshold voltage sensing driving period, a voltage is generated between the data line DL and the source node Ns of the driving transistor DRT through the turn-on level sensing signal SENSE. The connected first transistor T1 is turned on, and the initialization switch SPRE electrically connected between the data line DL and the initialization voltage supply node Npres is turned on and supplied by the data line DL. The initialization voltage Vpres is applied to the source node Ns of the driving transistor DRT.

Also, in the initialization step S1210, the second transistor T2 connected between the reference voltage line RVL and the gate node Ng of the driving transistor DRT is turned on through the turn-on level scan signal SCAN. - By turning on, the reference voltage Vref supplied by the reference voltage line RVL is applied to the gate node Ng of the driving transistor DRT.

Referring to FIG. 13 , in the tracking step S1220, the initialization switch SPRE is turned off to float the source node Ns of the driving transistor DRT.

Accordingly, the voltage of the source node Ns of the driving transistor DRT rises from the initialization voltage Vpres. At this time, the voltage of the data line DL also rises.

The source node Ns of the driving transistor DRT and the data line DL become saturated as the voltage rise decreases over time.

When the voltages of the source node Ns of the driving transistor DRT and the data line DL are saturated, a sampling step ( S1230 ) may be performed.

Referring to FIG. 13, when the sampling switch SAM is turned on at a sampling time set after the voltage of the source node Ns of the driving transistor DRT and the data line DL is saturated, the analog-to-digital converter ( ADC) and the data line DL are electrically connected.

Accordingly, the analog-to-digital converter ADC senses the voltage of the data line DL.

At this time, when the threshold voltage Vth of the transistor DRT is a positive threshold voltage, the voltage Vsen sensed by the analog-to-digital converter ADC is the reference voltage applied to the gate node Ng of the driving transistor DRT. It is a voltage (Vref-Vth) lower than (Vref) by the threshold voltage (Vth) of the driving transistor (DRT).

Of course, when the threshold voltage Vth of the driving transistor DRT is a negative threshold voltage, the voltage Vsen sensed by the analog-to-digital converter ADC is the reference applied to the gate node Ng of the driving transistor DRT. It may be a voltage (Vref+Vth) higher than the voltage Vref by the threshold voltage Vth of the driving transistor DRT.

14 is a timing diagram for sensing mobility of the driving transistor DRT of the organic light emitting display device 100 according to the present embodiments.

Referring to FIG. 14 , in the initialization step (S1210) of the mobility sensing driving period, a voltage is generated between the data line DL and the source node Ns of the driving transistor DRT through the turn-on level sensing signal SENSE. The connected first transistor T1 is turned on, and the initialization switch SPRE electrically connected between the data line DL and the initialization voltage supply node Npres is turned on and supplied by the data line DL. The initialization voltage Vpres is applied to the source node Ns of the driving transistor DRT.

Also, in the initialization step S1210, the second transistor T2 connected between the reference voltage line RVL and the gate node Ng of the driving transistor DRT is turned on through the turn-on level scan signal SCAN. - By turning on, the reference voltage Vref supplied by the reference voltage line RVL is applied to the gate node Ng of the driving transistor DRT.

Referring to FIG. 14 , in the tracking step S1220, the initialization switch SPRE is turned off to float the source node Ns of the driving transistor DRT, and the scan signal SCAN of the second transistor T2 is changed to the turn-off voltage level to float the gate node Ng of the driving transistor DRT.

Accordingly, the voltages of the gate node Ng and the source node Ns of the driving transistor DRT rise from the initialization voltage Vpres. At this time, the voltage of the data line DL also rises.

After the voltage of the gate node Ng and the source node Ns of the driving transistor DRT rises for a predetermined time Δt, a sampling step ( S1230 ) may be performed.

Referring to Figure 14,

After the voltage of the gate node Ng and the source node Ns of the driving transistor DRT rises for a predetermined time Δt, the sampling switch SAM is turned on.

Accordingly, the analog-to-digital converter ADC is electrically connected to the data line DL to sense the voltage of the data line DL.

The compensator 1000 calculates the difference between the sensed voltage Vsen of the analog-to-digital converter ADC and the voltage Vpres before the voltage rise as a voltage rise Δt, and uses the calculated voltage rise Δt as the voltage rise section. By dividing by the time (Δt) of , the voltage rise rate (graph slope) can be calculated.

The compensator 1000 may determine the mobility (current capability) of the driving transistor DRT from the calculated voltage rise rate.

Here, since the time Δt is fixed, the amount of voltage change and the speed of voltage increase are proportional. Also, the voltage rising speed is proportional to the mobility (current capability) of the driving transistor DRT.

15 is a diagram for explaining a sensing time saving effect of the organic light emitting display device 100 according to the present exemplary embodiments.

Referring to FIG. 15, as described above, even though the reference voltage line RVL is shared by the four subpixels SP1, SP2, SP3, and SP4, the four subpixels SP1, SP2, SP3, and SP4 An analog-to-digital converter (ADC) may be electrically connected to each of the corresponding four data lines DL1 , DL2 , DL3 , and DL4 .

Therefore, by simultaneously sensing and driving the four subpixels (SP1, SP2, SP3, and SP4) and simultaneously turning on the four sampling switches (SAM1, SAM2, SAM3, and SAM4), the voltage of the data line (DL) is can sense Accordingly, the entire sensing time of the organic light emitting display panel 110 can be greatly reduced.

16 is a diagram illustrating a source driver integrated circuit (SDIC) of the organic light emitting display device 100 according to the present embodiments.

Referring to FIG. 16 , the source driver integrated circuit (SDIC) of the organic light emitting display device 100 according to the present embodiments includes a shift register 1610, a first latch 1620, a basic configuration for data driving, A multi-channel output circuit (1650) including a second latch 1630, a digital-to-analog converter (DAC, 1640), and an output buffer for outputting data voltages (Vdata) to several channels corresponding to several data lines (DL). ), etc.

In addition, the source driver integrated circuit SDIC of the organic light emitting display device 100 according to the present embodiments may output the reference voltage Vref through the reference voltage line RVL.

In addition, by controlling the on-off of the aforementioned three switch configurations (PRE_SEL, SPRE, and SAM), the data line DL may operate as one of a data signal line, a sensing driving line, and a sensing line, depending on circumstances. As three types of switch configurations, a data switch (PRE_SEL), an initialization switch (SPRE), and a sampling switch (SAM) may be included.

In addition, each source driver integrated circuit (SDIC) included in the data driver 120 of the organic light emitting display device 100 according to the present embodiments may be connected to a plurality of data lines DL through a sampling switch SAM. It may include an analog-to-digital converter (ADC) capable of

Here, the sampling circuit 1660 including the sampling switch SAM connected to correspond to each of the plurality of data lines DL includes, in addition to the plurality of sampling switches SAM, the sampling switch SAM and the analog-to-digital converter (ADC). ) may further include a sample and hold circuit between them.

Using the aforementioned source driver integrated circuit (SDIC), image driving and sensing driving can be provided for subpixels having the subpixel structure and signal line structure according to the present embodiments described above.

According to the present embodiments as described above, it is possible to provide an organic light emitting display panel 110, an organic light emitting display device 100, an image driving method, and a sensing method capable of significantly reducing the sensing time for subpixels. can

In addition, according to the present embodiments, an organic light emitting display panel 110 having a subpixel structure and a signal line structure capable of significantly reducing the sensing time for a subpixel, an organic light emitting display device 100, and an image driving method thereof And a sensing method may be provided.

In addition, according to the present embodiments, the organic light emitting display panel 110 and the organic light emitting display device 100 have a subpixel structure and a signal line structure that can significantly reduce the sensing time for the subpixels and increase the aperture ratio. ), the image driving method and sensing method can be provided.

The above description and accompanying drawings are merely illustrative of the technical idea of the present invention, and those skilled in the art can combine the configuration within the scope not departing from the essential characteristics of the present invention. , various modifications and variations such as separation, substitution and alteration will be possible. Therefore, the embodiments disclosed in the present invention are not intended to limit the technical idea of the present invention, but to explain, and the scope of the technical idea of the present invention is not limited by these embodiments.

100: organic light emitting display device
110: organic light emitting display panel
120: data driver
130: gate driver
140: controller

Claims (10)

Data lines extending in a first direction, a reference voltage line extending in the first direction and transmitting a reference voltage, a gate line extending in a second direction and transmitting a sensing signal, and a sub commonly connected to the gate line. An organic light emitting display panel including pixels,
Each of the subpixels,
organic light emitting diode;
a driving transistor for driving the organic light emitting diode;
a first transistor coupled between a source node of the driving transistor and a corresponding one of the data lines and controlled by the sensing signal; and
A storage capacitor connected between a gate node and a source node of the driving transistor;
The organic light emitting display panel,
a second transistor connected to the reference voltage line and applying the reference voltage in common to at least two gate nodes of the subpixels;
At least two of the subpixels arranged consecutively in the second direction share the second transistor;
A gate node of the second transistor is connected to a gate line to which a scan signal is applied.
delete According to claim 1,
The reference voltage is supplied to the gate node of the driving transistor;
An organic light emitting display device wherein a data voltage is supplied to the source node of the driving transistor through the corresponding data line.
According to claim 1,
a data driver driving the data lines;
a gate driver driving the gate lines; and
and an analog-to-digital converter electrically connected to the corresponding data line to sense a voltage of the corresponding data line and convert it into a digital value.
According to claim 4,
a sampling switch electrically connected between the corresponding data line and the analog-to-digital converter;
an initialization switch electrically connected between the corresponding data line and an initialization voltage supply node to which an initialization voltage is provided; and
and a data switch electrically connected between the corresponding data line and a data voltage supply node to which a data voltage is supplied.
According to claim 5,
The data driver includes the sampling switch and the analog-to-digital converter.
According to claim 5,
The organic light emitting display device wherein the data voltage or the initialization voltage is supplied to the corresponding data line or the voltage of the corresponding data line is supplied to the analog-to-digital converter.
According to claim 1,
In a threshold voltage sensing driving period of the driving transistor, a period in which the sensing signal has a turn-on level is shorter than a period in which the scan signal has a turn-on level;
In a mobility sensing driving period of the driving transistor, a period in which the scan signal has a turn-on level is shorter than a period in which the sensing signal has a turn-on level.
According to claim 8,
In the threshold voltage sensing driving period of the driving transistor, an entire period in which the sensing signal has a turn-on level overlaps a period in which the scan signal has a turn-on level.
According to claim 8,
In the mobility sensing driving period of the driving transistor, an entire period in which the scan signal has a turn-on level overlaps a period in which the sensing signal has a turn-on level.

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