KR102519823B1 - Flat Panel Display Having A Dummy Pixel For Preventing Electrottatic Damage - Google Patents

Abstract

The present invention relates to a flat panel display device having dummy pixels for preventing damage due to static electricity. A flat panel display device according to the present invention includes a substrate, a display area, a non-display area, a scan line, a dummy pixel area, a dummy pixel, and a first antistatic element. The display area is defined in the central portion of the substrate. The non-display area is disposed on the outer periphery of the display area. The scan wiring is arranged from the non-display area to the display area. The dummy pixel area is disposed in the non-display area adjacent to the display area. Dummy pixels are arranged in the dummy pixel area. The first antistatic element is disposed in the dummy pixel and includes a first dummy gate electrode and a first dummy semiconductor layer. The first dummy gate electrode branches from the scan wiring. The first dummy semiconductor layer overlaps the first dummy gate electrode.

Description

Flat Panel Display Having A Dummy Pixel For Preventing Electrottatic Damage

The present invention relates to a flat panel display device having dummy pixels for preventing damage due to static electricity. In particular, the present invention relates to a flat panel display device having dummy pixels disposed in a non-display area to prevent damage due to static electricity generated between a gate (or “scan”) metal layer and a semiconductor material layer.

As the information society develops, various demands for display devices for displaying images are increasing. The field of display devices has rapidly changed to a flat panel display device (FPD) that is thin, light, and capable of large area, replacing a bulky cathode ray tube (CRT). Flat panel displays include Liquid Crystal Display Device (LCD), Plasma Display Panel (PDP), Organic Light Emitting Display Device (OLED), and Electrophoretic Display Device (ELD). : ED), etc.

A liquid crystal display device (LCD) displays an image by adjusting light transmittance of a liquid crystal using an electric field. An organic light emitting display device displays an image by forming organic light emitting elements in pixels themselves arranged in a matrix manner. An organic light emitting diode (OLED) display device is a self-light emitting device that emits light by itself, and has advantages of fast response speed, high luminous efficiency, luminance, and viewing angle. In particular, organic light emitting diode displays (OLEDs) using the characteristics of organic light emitting diodes with excellent energy efficiency include passive matrix type organic light emitting diode displays (PMOLEDs) and It is roughly classified into an active matrix type organic light emitting diode display (AMOLED).

An actively driven flat panel display displays an image using a gate driving circuit that supplies scan signals to gate (or “scan”) wires of a display panel and a data driver circuit that supplies data voltages to data wires. . 1 is a plan view showing a schematic structure of a conventional flat panel display device. FIG. 2 is an enlarged plan view of a circular area “A” indicated by a dotted line in FIG. 1 and showing a planar structure of an organic light emitting diode display.

First, referring to FIG. 1, the flat panel display includes a substrate (SUB) divided into a display area (AA) representing image information and a non-display area (NA) in which various elements for driving the display area (AA) are disposed. includes The display area AA occupies most of the central portion of the substrate SUB. The non-display area NA occupies a narrow area surrounding the display area AA. The non-display area NA may be formed across four sides of the substrate SUB, or may be formed only on any two sides or only one side.

Next, with reference to FIG. 2, a schematic configuration of an organic light emitting diode display, which is an example of a flat panel display, will be described. In the display area AA, a plurality of display pixels PA are arranged in a matrix manner. For example, the display pixels PAs may be arranged in an NxM rectangular shape. However, it is not necessarily limited to this method, and may be arranged in various ways. Each display pixel PA may have the same size or different sizes. In addition, three sub-pixels representing RGB (red, green and blue) colors may be regularly arranged as a unit. In the simplest structure, the display pixels PA have a cross structure of a plurality of scan lines SL running in a horizontal direction, a plurality of data lines DL and driving current lines VDD running in a vertical direction. can be defined as

A data driver (or data driving integrated circuit) (DIC) for supplying a signal corresponding to image information to the data lines DL in the non-display area NA defined on the outer periphery of the display pixel PA; A gate driver (or Gate Driving Integrated Circuit) (GIP) may be disposed to supply scan signals to the scan lines SL. In the case of high resolution higher than the VGA level, where the number of data lines DL and driving current lines VDD increases, the data driver DIC is mounted on the outside of the substrate SUB, and the data driver DIC ), data connection pads may be disposed instead.

3 is a diagram showing the structure of a general organic light emitting diode. The organic light emitting diode includes an organic electroluminescent compound layer for electroluminescence as shown in FIG. 3, and a cathode electrode and an anode electrode facing each other with the organic electroluminescent compound layer interposed therebetween. The organic electroluminescent compound layer includes a hole injection layer (HIL), a hole transport layer (HTL), an emission layer (EML), an electron transport layer (ETL), and an electron injection layer. layer, EIL).

In the organic light emitting diode, excitons are formed during an excitation process when holes and electrons injected into the anode and cathode electrodes recombine in the light emitting layer (EML), and light is emitted due to energy from the excitons. The organic light emitting diode display displays an image by electrically controlling the amount of light generated from the light emitting layer (EML) of the organic light emitting diode as shown in FIG. 3 .

An active matrix type organic light emitting diode display (AMOLED) displays an image by controlling current flowing through an organic light emitting diode using a thin film transistor (or "TFT"). 4 is an example of an equivalent circuit diagram showing the structure of one pixel in a general organic light emitting diode display. 5 is a plan view illustrating the structure of one pixel in a prior art organic light emitting diode display.

4 and 5, the active matrix organic light emitting diode display includes a switching thin film transistor ST, a driving thin film transistor DT connected to the switching thin film transistor ST, and an organic light emitting diode connected to the driving thin film transistor DT. (OLE). The switching thin film transistor ST is formed where the scan line SL and the data line DL intersect. The switching thin film transistor ST serves to select a pixel. The switching thin film transistor ST includes a gate electrode SG branching from the scan line SL, a semiconductor layer (not shown), a source electrode SS, and a drain electrode SD.

Also, the driving thin film transistor DT serves to drive the organic light emitting diode OLE of the pixel selected by the switching thin film transistor ST. The driving thin film transistor DT includes a gate electrode DG connected to the drain electrode SD of the switching thin film transistor ST, a semiconductor layer (not shown), and a source electrode DS connected to the driving current line VDD. , and a drain electrode DD. The drain electrode DD of the driving TFT DT is connected to the anode electrode ANO of the organic light emitting diode OLE.

While organic light emitting diode display devices are being developed into medium and large-sized displays, defects that do not occur in small-sized display devices often occur. As a typical defect, a bright spot defect or a dark spot defect frequently occurs in a corner area of the display area AA. The defective luminous point means that the light is emitted darker than the pixel in the central portion. The dark spot defect refers to a defect in which a pixel is damaged or, even if not damaged, emits too dark light.

It is determined that the cause of the bright spot defect and the dark spot defect is due to static electricity. Circuits for preventing static electricity are already provided in the flat panel display. The anti-static circuit is to prevent large static electricity generated from the outside from flowing into the display panel during a manufacturing process. Static electricity to be dealt with in the present invention is not static electricity introduced from the outside, but relates to defective static electricity generated between various display elements formed inside a display panel.

For example, characteristics of the thin film transistor may be changed by a slight short occurring between the scan metal layer and the semiconductor material layer. As a result, the organic light emitting diode OLE connected to the thin film transistor DT is driven abnormally, resulting in defective bright or dark spots. This is a defect caused by a weak level of influence rather than structural damage of display elements, and an anti-static means suitable for this is required.

An object of the present invention is to provide a flat panel display device having a large area while securing good image quality by preventing image quality defects caused by static electricity. Another object of the present invention is to provide a flat panel display device having dummy pixels for preventing a short circuit between a gate metal layer and a semiconductor material layer due to static electricity. Another object of the present invention is to provide a flat panel display device having dummy pixels for preventing static electricity in a non-display area while minimizing the area of the non-display area.

To achieve the above object, a flat panel display device according to the present invention includes a substrate, a display area, a non-display area, a scan line, a dummy pixel area, a dummy pixel, and a first antistatic element. The display area is defined in the central portion of the substrate. The non-display area is disposed on the outer periphery of the display area. The scan wiring is arranged from the non-display area to the display area. The dummy pixel area is disposed in the non-display area adjacent to the display area. Dummy pixels are arranged in the dummy pixel area. The first antistatic element is disposed in the dummy pixel and includes a first dummy gate electrode and a first dummy semiconductor layer. The first dummy gate electrode branches from the scan wiring. The first dummy semiconductor layer overlaps the first dummy gate electrode.

For example, it further includes a second static electricity prevention element. The second antistatic element includes a second dummy gate electrode branched from the scan line and a second dummy semiconductor layer overlapping the second dummy gate electrode.

For example, in the display area, display pixels including gate electrodes branching from scan lines are arranged in a matrix manner.

In one example, the first dummy semiconductor layer is formed over the substrate. A gate insulating film is deposited over the first dummy semiconductor layer. A short circuit or formed on the gate insulating layer exposes a portion of the first dummy semiconductor layer. The first dummy gate electrode contacts the first dummy semiconductor layer through the shorting hole.

In one example, a light blocking layer is disposed below the first dummy semiconductor layer on the substrate. A gate insulating film is deposited over the first dummy semiconductor layer. The first dummy semiconductor layer forms a step while covering the side of the light blocking layer. In the gate insulating film, a portion covering the step has a thinner thickness than other portions. A first dummy gate electrode is stacked on the gate insulating film covering the step.

The flat panel display device according to the present invention further includes a dummy pixel disposed in the non-display area to prevent a short circuit defect between the gate metal layer and the semiconductor material layer due to static electricity. Therefore, even if static electricity is generated, a short circuit occurs between the gate metal layer and the semiconductor material layer in the dummy pixels disposed in the non-display area, and only normal electrical signals are transmitted to the display pixels disposed in the display area. In addition, by providing a plurality of anti-static devices in the dummy pixel, it is possible to minimize the area of the non-display area and prevent a change in characteristics of the thin film transistor due to static electricity.

1 is a plan view showing a schematic structure of a conventional flat panel display device;
FIG. 2 is an enlarged plan view of a circular area “A” indicated by a dotted line in FIG. 1 and showing a planar structure of an organic light emitting diode display;
3 is a view showing the structure of a general organic light emitting diode;
4 is an equivalent circuit diagram showing the structure of one pixel in a general organic light emitting diode display;
5 is a plan view showing the structure of one pixel in an organic light emitting diode display according to the prior art;
6 is an enlarged plan view illustrating an organic light emitting diode display having dummy pixels according to a first embodiment of the present invention.
7 is an enlarged plane view showing structures of dummy pixels and display pixels according to the first embodiment of the present invention;
8 is an enlarged plan view showing structures of dummy pixels and display pixels according to a second embodiment of the present invention;
9A is a plan view showing the structure of an anti-static device included in a dummy pixel according to a first application example of the present invention;
9B is a cross-sectional view showing the structure of an anti-static device according to the first application example of the present invention, taken along the line II-II' of FIG. 9A.
10A is a plan view showing the structure of an anti-static device included in a dummy pixel according to a second application example of the present invention;
10B is a cross-sectional view showing the structure of an anti-static device according to a second application example of the present invention, taken along the line III-III' of FIG. 10A.

Hereinafter, preferred embodiments according to the present invention will be described in detail with reference to the accompanying drawings. Like reference numbers throughout the specification indicate substantially the same elements. In the following description, if it is determined that a detailed description of a known function or configuration related to the present invention may unnecessarily obscure the subject matter of the present invention, the detailed description will be omitted. In addition, component names used in the following description may be selected in consideration of ease of writing specifications, and may be different from names of parts of actual products.

<First Embodiment>

Hereinafter, a first embodiment of the present invention will be described with reference to FIG. 7 . 7 is an enlarged plan view illustrating structures of dummy pixels and display pixels according to the first embodiment of the present invention. The basic configuration of the organic light emitting diode display according to the first embodiment is very similar to that of the prior art. Redundant description of the same configuration will not be made. Also, if necessary, reference is made to the drawings used in the prior art.

An organic light emitting diode display, which is a kind of flat panel display according to the first embodiment of the present invention, includes a substrate SUB on which a display area AA and a non-display area NA are defined. The display area AA occupies most of the central portion of the substrate SUB, and the non-display area NA is disposed on the outer periphery of the display area AA. A plurality of display pixels PAs arranged in a matrix manner are disposed in the display area AA. Driving elements (not shown) for driving the display pixels PA may be disposed in the non-display area NA.

A scan line SL, a data line DL, and a driving current line VDD defining the display pixels PA arranged in the display area AA are disposed. These lines SL, DL, and VDD are connected to driving elements (not shown) disposed in the non-display area NA.

A dummy pixel area DPA is defined in the non-display area NA adjacent to one side of the display area AA. The dummy pixel area DPA includes dummy pixels DP. The dummy pixel area DPA is defined by scan lines SL, data lines DL, and/or driving current lines VDD. For example, as shown in FIG. 7 , the first dummy pixel DP1 may be disposed adjacent to the left side of the first pixel row. Also, the second dummy pixel DP2 may be disposed adjacent to the left side of the second pixel row. In this way, dummy pixels DP may be disposed adjacent to the left side of the display area AA.

The dummy pixels DP constituting the dummy pixel area DPA have the same size as the display pixel PA. Also, each of the dummy pixels DP includes an anti-static device TD to prevent static electricity. For example, the antistatic element TD included in the first dummy pixel DP1 includes a dummy gate electrode GD branched from the scan line SL and a dummy semiconductor layer overlapping the gate electrode GD ( AD) included.

Meanwhile, the display pixel PA disposed on the right side of the first dummy pixel DP1 includes a switching thin film transistor ST, a driving thin film transistor DT, and an organic light emitting diode OLE. The switching thin film transistor ST includes a gate electrode SG branching from the scan line SL, a source electrode SS branching from the data line DL, and a drain electrode SD facing the source electrode SS. includes The driving thin film transistor DT includes a gate electrode DG connected to the drain electrode SD of the switching thin film transistor ST, a source electrode DS branching from the driving current line VDD, and a source electrode DS. and an opposing drain electrode DD. The organic light emitting diode OLE includes an anode electrode ANO connected to the drain electrode DD of the driving thin film transistor DT, an organic light emitting layer stacked on the anode electrode ANO, and a cathode electrode.

The dummy pixel DP does not have the same configuration as the switching thin film transistor ST and the driving thin film transistor DT formed in the display pixel PA. For example, when static electricity is often generated due to a short circuit between the gate electrode SG of the switching thin film transistor ST and the semiconductor layer SA, the dummy pixel DP is connected to the scan line SL. It is sufficient to have only the dummy gate electrode GD branching from and the dummy semiconductor layer AD overlapping the gate electrode GD.

When a signal is applied from the gate driver to the scan line SL, a short circuit caused by static electricity first occurs in the dummy gate electrode GD and the dummy semiconductor layer AD provided in the dummy pixel DP, thereby removing the static electricity. . As a result, the static electricity signal is not transmitted to the display pixels PAs to which the scan signal is subsequently transmitted. In other words, when the electrostatic voltage is transmitted to the scan line SL, the electrostatic voltage is absorbed by the antistatic element TD formed in the dummy pixel DP. On the other hand, normal electrical signals are continuously transferred to the display pixels PA along the scan line SL.

<Second Embodiment>

Hereinafter, a second embodiment of the present invention will be described with reference to FIG. 8 . 8 is an enlarged plan view illustrating structures of dummy pixels and display pixels according to a second embodiment of the present invention. The organic light emitting diode display according to the second embodiment has almost the same basic configuration as that of the first embodiment. The difference is that the dummy pixel includes a plurality of anti-static elements TD1, TD2, and TD3.

In the case of the organic light emitting diode display including the dummy pixel according to the first embodiment, if the static electricity voltage is not completely removed and remains even after passing through the dummy pixel, defects may occur in the display pixels. To prevent this, a plurality of dummy pixels may be disposed. However, when a plurality of dummy pixels are disposed, a larger area of the dummy pixel area DPA is required. This causes an increase in the non-display area NA, which is undesirable. The second embodiment provides a dummy pixel structure capable of efficiently preventing static electricity without increasing the areas of the dummy pixel area DPA and the non-display area NA.

An organic light emitting diode display, which is a kind of flat panel display according to the first embodiment of the present invention, includes a substrate SUB on which a display area AA and a non-display area NA are defined. The display area AA occupies most of the central portion of the substrate SUB, and the non-display area NA is disposed on the outer periphery of the display area AA. A plurality of display pixels PAs arranged in a matrix manner are disposed in the display area AA. Driving elements (not shown) for driving the display pixels PA may be disposed in the non-display area NA.

A scan line SL, a data line DL, and a driving current line VDD defining the display pixels PA arranged in the display area AA are disposed. These lines SL, DL, and VDD are connected to driving elements (not shown) disposed in the non-display area NA.

A dummy pixel area DPA is defined in the non-display area NA adjacent to one side of the display area AA. The dummy pixel area DPA includes dummy pixels DP. The dummy pixels DP are defined by scan lines SL, data lines DL, and/or driving current lines VDD.

The dummy pixel DP according to the second embodiment includes a first anti-static device TD1 , a second anti-static device TD2 , and a third anti-static device TD3 . For example, the first anti-static device TD1 includes a first dummy gate electrode GD1 branching from the scan line SL and a first dummy semiconductor layer AD1 overlapping the first gate electrode GD1. do. The second anti-static device TD2 includes a second dummy gate electrode GD2 branching from the scan line SL and a second dummy semiconductor layer AD2 overlapping the second gate electrode GD2. The third antistatic element TD3 includes a third dummy gate electrode GD3 branching from the scan line SL and a third dummy semiconductor layer AD3 overlapping the third gate electrode GD3.

When a signal is applied from the gate driver to the scan line SL, the first dummy gate electrode GD1, the first dummy semiconductor layer AD1, and the second dummy gate electrode GD2 provided in the dummy pixel DP A short circuit caused by static electricity occurs between the second dummy semiconductor layer AD2 and/or the third dummy gate electrode GD3 and the third dummy semiconductor layer AD3 to remove static electricity. Therefore, the static electricity signal is not transmitted to the display pixels PAs to which the scan signal is subsequently transmitted. In other words, when the electrostatic voltage is transmitted to the scan line SL, the electrostatic voltage is absorbed by the antistatic elements TD1, TD2, and TD3 formed in the dummy pixel DP. On the other hand, normal electrical signals are continuously transferred to the display pixels PA along the scan line SL.

In FIG. 8 , a first dummy semiconductor layer AD1 , a second dummy semiconductor layer AD2 , and a third dummy semiconductor layer AD3 independent of each other are illustrated in the antistatic elements TD1 , TD2 , and TD3 . However, the first dummy semiconductor layer AD1 , the second dummy semiconductor layer AD2 , and the third dummy semiconductor layer AD3 may be connected to each other to form one dummy semiconductor layer.

In the dummy pixel according to the second embodiment, a plurality of antistatic elements connected to the same scan line SL are continuously disposed. Thus, static electricity can be completely eliminated. In addition, since all static electricity can be removed with only one dummy pixel DP, the area of the dummy pixel area DPA or the non-display area NA can be minimized.

<First application example>

So far, the structure of the dummy pixel included in the display panel for preventing static electricity has been described through the first and second embodiments. From now on, the structure of the anti-static element included in the dummy pixel will be described in detail. Hereinafter, a first application example of the anti-static device according to the present invention will be described with reference to FIGS. 9A and 9B. 9A is a plan view illustrating a structure of an anti-static device included in a dummy pixel according to a first application example of the present invention. 9B is a cross-sectional view showing the structure of an anti-static device according to the first application example of the present invention, taken along the line II-II' of FIG. 9A.

Referring to FIGS. 9A and 9B , the anti-static device TD included in the dummy pixel according to the first application example of the present invention includes a dummy gate electrode GD branching from a scan line SL and a dummy semiconductor layer AD. ). A buffer layer BUF is applied on the substrate SUB. A dummy semiconductor layer AD is formed on the buffer layer BUF. A gate insulating layer GI is coated on the substrate SUB on which the dummy semiconductor layer AD is formed.

A short hole SH exposing a part of the dummy semiconductor layer AD is formed in the gate insulating layer GI. The shorting hole SH is for shorting (or “connecting”) the dummy gate electrode GD and the dummy semiconductor layer AD in advance. A single shorting hole SH may be formed or a plurality of short holes SH may be formed. The shorting hole SH is preferably formed at a position where it can contact the side of the dummy gate electrode GD.

A scan line SL and a dummy gate electrode GD branching from the scan line SL are formed on the gate insulating layer GI. The dummy gate electrode GD has a structure in contact with the dummy semiconductor layer AD through the shorting hole SH.

In the case of the display pixel PA, the gate insulating layer GI serves to maintain insulation between the gate electrode and the semiconductor layer. If the gate insulating layer GI interposed between the gate electrode and the semiconductor layer is damaged due to static electricity, the gate electrode is directly connected to the semiconductor layer, which causes deterioration in characteristics of the thin film transistor. As a result, the organic light emitting diode cannot be normally driven.

However, by short-circuiting the dummy gate electrode GD and the dummy semiconductor layer AD in advance in the anti-static device TD provided in the dummy pixel DP, the effect of absorbing the static voltage in the dummy pixel DP can be obtained. can Since the dummy semiconductor layer AD has an isolated island shape that is not connected to any other device, static electricity can be efficiently removed. If necessary, the dummy semiconductor layer AD may extend to the lower side of the substrate SUB to drain static electricity to the outside.

<Second application example>

In the first application example, a dummy pixel having a structure in which the dummy gate electrode GD and the dummy semiconductor layer AD are short-circuited in advance is proposed. In the second application example, a dummy pixel having a structure in which the gate insulating film GI can easily break down is proposed.

Hereinafter, a second application example of the anti-static device according to the present invention will be described with reference to FIGS. 10A and 10B. 10A is a plan view illustrating a structure of an anti-static device included in a dummy pixel according to a second application example of the present invention. FIG. 10B is a cross-sectional view showing the structure of an anti-static device according to a second application example of the present invention, taken along the line III-III' of FIG. 10A.

Referring to FIGS. 10A and 10B , the anti-static device TD included in the dummy pixel according to the second application example of the present invention includes a dummy gate electrode GD branching from the scan line SL and a dummy semiconductor layer AD. ) and a light blocking layer (LS). A light blocking layer LS is formed on the substrate SUB. A buffer layer BUF is coated on the entire substrate SUB on which the light blocking layer LS is formed. A dummy semiconductor layer AD is formed on the buffer layer BUF. The semiconductor layer AD has a slightly wider width than the light blocking layer LS. For example, it is preferable to form the dummy semiconductor layer AD to have a step at the edge of the light blocking layer LS.

A gate insulating layer GI is coated on the substrate SUB on which the dummy semiconductor layer AD is formed. A scan line SL and a dummy gate electrode GD branching from the scan line SL are formed on the gate insulating layer GI. The dummy gate electrode GD is preferably formed to completely cover the dummy semiconductor layer AD. Therefore, the dummy gate electrode GD is formed to have a step that goes over the upper edge of the step-shaped dummy semiconductor layer AD.

As a result, the dummy semiconductor layer AD and the dummy gate electrode GD overlap each other in a stepped shape. The gate insulating layer GI covering the dummy semiconductor layer AD is thinly coated in the stepped portion. After the dummy gate electrode GD is stacked on the gate insulating layer GI, the stepped portion has a structure between the dummy gate electrode GD and the dummy semiconductor layer AD that is thinner than other portions.

In the case of the display pixel PA, the gate insulating layer GI serves to maintain insulation between the gate electrode and the semiconductor layer. If the gate insulating layer GI interposed between the gate electrode and the semiconductor layer is damaged due to static electricity, the gate electrode is directly connected to the semiconductor layer, which causes deterioration in characteristics of the thin film transistor. As a result, the organic light emitting diode cannot be normally driven.

However, in the anti-static device TD provided on the dummy pixel DP, the gate insulating film GI between the dummy gate electrode GD and the dummy semiconductor layer AD has a stepped portion, and dielectric breakdown easily occurs in the stepped portion. It has an insulating weak part (WP). Therefore, when the static electricity voltage is transmitted along the scan line SL, the gate insulating layer GI is easily damaged at the weak insulating portion WP of the dummy pixel DP, thereby obtaining an effect of absorbing static electricity. Since the dummy semiconductor layer AD has an isolated island shape that is not connected to any other device, static electricity can be efficiently removed. If necessary, the dummy semiconductor layer AD may extend to the lower side of the substrate SUB to drain static electricity to the outside.

In the above description of the dummy pixel including the anti-static device, only the case of one scan line has been described for convenience. In some cases, a thin film transistor for compensation may be further provided in the pixel area disposed in the display area. Alternatively, a thin film transistor for detecting/compensating for compensation when an error occurs by checking a scan signal or checking a driving current may be further included. In this case, one or two gate wires may be further included in the pixel area in addition to the scan wires.

Even when a plurality of gate wires or scan wires are disposed in one pixel area, the dummy pixel structure according to the present invention can be applied. For example, a plurality of scan wires and/or gate wires are disposed on the dummy pixel in the same manner as the display pixels disposed in the pixel area. One or more ESD elements may be disposed on the plurality of scan lines and/or gate lines disposed in the dummy pixel area. Here, the antistatic elements may have the same structure as described above.

In addition, the dummy pixels described above have a structure different from that of the display pixels arranged in the display area. This is to focus on preventing dielectric breakdown of the semiconductor layer due to static electricity introduced mainly along a scan line or a gate line. However, it may have the same structure as the display pixel. For example, a dummy pixel may also include both a switching thin film transistor and a driving thin film transistor. As a result, the driving thin film transistor disposed in the dummy pixel first absorbs damage due to static electricity that also occurs in the driving thin film transistor of the display pixel, so that the display pixels can operate normally.

Alternatively, the dummy pixel may have exactly the same structure as the display pixel. For example, the dummy pixel may further include a dummy organic light emitting diode identical to the organic light emitting diode formed in the display pixel. By further including the dummy organic light emitting diode, defects that may occur in display pixels can be detected or prevented in advance.

The dummy pixel is disposed in the non-display area immediately adjacent to the display area and has the same structure as the display pixel or a structure with main components. Accordingly, abnormal signals such as static electricity that may be transmitted to the display pixels are absorbed and removed in advance. As a result, damage can be prevented in advance by allowing only normal signals to be transmitted to the display pixels.

In the description of the dummy pixel including the antistatic device described above, the organic light emitting diode display has been mainly described. However, display defects due to static electricity generated between the gate metal layer and the semiconductor material layer may be prevented by being applied to other flat panel display devices using thin film transistors.

Through the above description, those skilled in the art will be able to know that various changes and modifications are possible within a range that does not deviate from the technical spirit of the present invention. Therefore, the present invention should not be limited to the contents described in the detailed description, but should be defined by the claims.

AA: display area NA: non-display area
DPA: dummy pixel area DP: dummy pixel
PA: Display pixel TD: Antistatic element
DL: Data wiring SL: Scan wiring
VDD: driving current wiring ST: switching thin film transistor
DT: driving thin film transistor OLE: organic light emitting diode
ANO: anode electrode

Claims (6)

Board;
a display area defined in a central portion of the substrate;
a non-display area disposed on an outer periphery of the display area;
a scan wire disposed from the non-display area to the display area;
a dummy pixel area disposed in the non-display area adjacent to the display area;
a dummy pixel disposed in the dummy pixel area; and
a first anti-static device disposed in the dummy pixel and having a first dummy gate electrode branching from the scan line and a first dummy semiconductor layer overlapping the first dummy gate electrode;
The flat panel display device of claim 1 , wherein display pixels including gate electrodes branching from the scan wires connected to the dummy pixels are arranged in a matrix in the display area.
According to claim 1,
and a second anti-static device including a second dummy gate electrode branched from the scan line connected to the dummy pixel and a second dummy semiconductor layer overlapping the second dummy gate electrode.
delete a substrate including a display area and a non-display area disposed on an outer periphery of the display area;
a scan wire disposed from the non-display area to the display area;
a dummy pixel area disposed in the non-display area adjacent to the display area;
a dummy pixel disposed in the dummy pixel area;
an anti-static element disposed on the dummy pixel and including a dummy gate electrode branching from the scan line and a dummy semiconductor layer overlapping the dummy gate electrode; and
a gate insulating layer stacked on the dummy semiconductor layer and including a short-circuit hole exposing a portion of the dummy semiconductor layer;
The dummy gate electrode directly contacts the dummy semiconductor layer through the shorting hole.
a substrate including a display area and a non-display area disposed on an outer periphery of the display area;
a scan wire disposed from the non-display area to the display area;
a dummy pixel area disposed in the non-display area adjacent to the display area;
a dummy pixel disposed in the dummy pixel area;
an anti-static element disposed on the dummy pixel and including a dummy gate electrode branching from the scan line and a dummy semiconductor layer overlapping the dummy gate electrode;
a light blocking layer disposed below the dummy semiconductor layer on the substrate; and
a gate insulating layer stacked on the dummy semiconductor layer;
The dummy semiconductor layer forms a step while covering the side of the light blocking layer;
A portion of the gate insulating film covering the step has a smaller thickness than other portions,
The dummy gate electrode is stacked on the gate insulating layer covering the step.
According to claim 5,
The dummy gate electrode has a shape completely covering the dummy semiconductor layer.

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