KR102410104B1 - Organic Light Emitting Diode Display - Google Patents

Abstract

The present invention relates to an organic light emitting diode display having an increased aperture ratio by reducing a width of a driving current line. The organic light emitting diode display according to the present invention includes a substrate, a buffer layer, a scan line, an intermediate insulating layer, a driving current line, a data line, an auxiliary driving current line, an organic light emitting diode, and a pixel region. A buffer layer is laminated over the substrate. The scan wiring runs over the buffer layer in the first direction. The intermediate insulating film covers the scan wiring. The driving current wiring and the data wiring run in the second direction on the intermediate insulating film. The auxiliary driving current wiring is disposed under the intermediate insulating layer and is connected to the driving current wiring.

Description

Organic Light Emitting Diode Display

The present invention relates to an organic light emitting diode display. In particular, the present invention relates to an organic light emitting diode display having an increased aperture ratio by reducing a width of a driving current line.

Recently, various flat panel display devices capable of reducing weight and volume, which are disadvantages of a cathode ray tube, have been developed. Such flat panel displays include a liquid crystal display (LCD), a field emission display (FED), a plasma display panel (PDP), and an electro-luminescence device (EL). etc.

The electroluminescent display device is broadly classified into an inorganic electroluminescent display device and an organic light emitting diode display device according to the material of the light emitting layer. In particular, the demand for an organic light emitting diode display having excellent energy efficiency, low leakage current, and easy grayscale expression through current control is rapidly increasing.

When an organic light emitting diode display device is used for a long time, display quality may deteriorate due to a change in electrical characteristics of pixels. Accordingly, there is a need for a compensation means capable of detecting and compensating for changes in electrical characteristics of pixels. When the compensation means and/or circuit is directly mounted in the pixel, the aperture ratio, which is the ratio of the light emitting area in the pixel area, may be reduced.

In addition, as the organic light emitting diode display device is developed with a large area and/or ultra-high resolution structure, the size of the pixel is decreasing, and a high aperture ratio structure that increases the ratio of the opening area in the pixel is required. In the ultra-high resolution, as the number of pixels increases, the probability of occurrence of defective pixels increases. When a defect occurs in a pixel, it is possible to prevent the defective pixel from being recognized by a user by darkening the pixel. Considering these various situations, it is very important to develop a structure for an organic light emitting diode display capable of securing a high aperture ratio in a large area and/or ultra-high resolution.

An object of the present invention is to provide an organic light emitting diode display device having a large area and high aperture ratio as an invention devised to solve the problems of the prior art. Another object of the present invention is to provide an organic light emitting diode display device that maintains a low resistance while reducing the width of a wiring by adding an auxiliary wiring to a driving current wiring that supplies a constant voltage to an entire area of a substrate. Another object of the present invention is to provide a large-area organic light emitting diode display having an increased aperture ratio by reducing a width of a driving current wiring without increasing wiring resistance.

In order to achieve the above object, an organic light emitting diode display device according to the present invention includes a substrate, a buffer layer, a scan wiring, an intermediate insulating film, a driving current wiring, a data wiring, an auxiliary driving current wiring, an organic light emitting diode, and a pixel region. . A buffer layer is laminated over the substrate. The scan wiring runs over the buffer layer in the first direction. The intermediate insulating film covers the scan wiring. The driving current wiring and the data wiring run in the second direction on the intermediate insulating film. The auxiliary driving current wiring is disposed under the intermediate insulating layer and is connected to the driving current wiring. The pixel region is defined as a region surrounded by scan wirings, driving current wirings and data wirings, and organic light emitting diodes are disposed therein.

For example, the auxiliary driving current line includes a metal material stacked between the substrate and the buffer layer, and runs in the second direction while overlapping the data line.

In one example, it further includes a semiconductor layer and a horizontal driving current wiring. The semiconductor layer is disposed between the intermediate insulating film and the buffer layer, and overlaps the gate electrode branching from the scan wiring with the gate insulating film interposed therebetween. The horizontal driving current wiring is disposed between the gate insulating film and the intermediate insulating film. The driving current wiring is connected to the horizontal driving current wiring through a horizontal driving wiring contact hole penetrating the intermediate insulating layer. The horizontal driving current wiring is connected to the auxiliary driving current wiring through an auxiliary wiring contact hole penetrating the gate insulating layer and the buffer layer.

For example, the semiconductor layer may be disposed between the intermediate insulating layer and the buffer layer and may further include a semiconductor layer overlapping the gate electrode branching from the scan wiring with the gate insulating layer interposed therebetween. The auxiliary driving current wiring is spaced apart from the semiconductor layer by a predetermined distance in the same layer as the semiconductor layer, and overlaps the organic light emitting diode.

For example, the driving current wiring is connected to the auxiliary driving current wiring through an auxiliary wiring contact hole penetrating the intermediate insulating layer and the gate insulating layer.

In one example, the semiconductor layer includes a source region, a drain region, and a channel region. The source region includes impurities in the semiconductor material and is defined in one region. The drain region includes impurities in the semiconductor material and is defined in the other region. The channel region is made of a semiconductor material that does not contain impurities, and is defined between the source region and the drain region. The auxiliary driving current wiring includes impurities in the semiconductor material.

For example, the semiconductor layer may be disposed between the intermediate insulating layer and the buffer layer and may further include a semiconductor layer overlapping the gate electrode branching from the scan wiring with the gate insulating layer interposed therebetween. The auxiliary drive current line includes a first auxiliary drive current line and a second auxiliary drive current line. The first auxiliary driving current line includes a metal material stacked between the substrate and the buffer layer, and runs in the second direction while overlapping the data line. The second auxiliary driving current wiring is spaced apart from the semiconductor layer by a predetermined distance in the same layer as the semiconductor layer, and overlaps the organic light emitting diode.

In one example, a horizontal driving current line disposed between the gate insulating layer and the intermediate insulating layer is further included. The driving current wiring is connected to the horizontal driving current wiring through a horizontal driving wiring contact hole penetrating the intermediate insulating layer. The horizontal driving current wiring is connected to the first auxiliary driving current wiring through a first auxiliary wiring contact hole penetrating the gate insulating layer and the buffer layer. The driving current wiring is connected to the second auxiliary driving current wiring through a second auxiliary wiring contact hole penetrating the intermediate insulating layer and the gate insulating layer.

The organic light emitting diode display device according to the present invention further includes an auxiliary driving current line for maintaining a low resistance even when the width of the driving current line for applying a constant voltage across the substrate is narrowed. In particular, when the auxiliary driving current line is formed of an opaque metal material, the auxiliary driving current line is disposed to overlap the data line. Alternatively, when formed of a transparent conductive material, it is disposed to overlap the light emitting area. Accordingly, it is possible to reduce the width of the driving current wiring while maintaining the line resistance in a low resistance state, thereby further securing an aperture ratio. In particular, it is possible to provide a high-quality screen in an organic light emitting diode display having a large area and a high aperture ratio.

1 is an equivalent circuit diagram showing the structure of one pixel in an organic light emitting diode display having a compensation circuit according to the present invention.
2 is a plan view showing the structure of an organic light emitting diode display device according to a first embodiment of the present invention.
3 is a cross-sectional view showing the structure of the organic light emitting diode display according to the first embodiment taken along the cut line I-I' of FIG. 2;
4 is a plan view showing the structure of an organic light emitting diode display device according to a second embodiment of the present invention.
5 is a cross-sectional view showing the structure of the organic light emitting diode display according to the second embodiment taken along the cut line II-II' of FIG. 4;
6 is a plan view showing the structure of an organic light emitting diode display device according to a third embodiment of the present invention.
7 is a cross-sectional view showing the structure of the organic light emitting diode display according to the third embodiment taken along the cut line III-III' of FIG. 6;
8 is a plan view showing the structure of an organic light emitting diode display device according to a fourth embodiment of the present invention.

Advantages and features of the present invention, and a method for achieving them will become apparent with reference to the embodiments described below in detail in conjunction with the accompanying drawings. The present invention is not limited to the embodiments disclosed below, but may be implemented in various forms. The present embodiments are provided to complete the disclosure of the present invention, and to completely inform those of ordinary skill in the art to the scope of the present invention.

The shapes, sizes, proportions, angles, numbers, etc. disclosed in the drawings for explaining the embodiments of the present invention are exemplary, and thus the present invention is not limited to the illustrated matters. Like reference numerals refer to like elements throughout.

In describing the present invention, if it is determined that a detailed description of a related known function or configuration may unnecessarily obscure the gist of the present invention, the detailed description thereof will be omitted. When 'including', 'having', 'consisting', etc. mentioned in this specification are used, other parts may be added unless 'only' is used. When a component is expressed in the singular, cases including the plural are included unless otherwise explicitly stated.

In interpreting the components, it is construed as including an error range even if there is no separate explicit description. In the case of a description of the positional relationship, for example, when the positional relationship of two parts is described as 'on', 'on', 'on', 'next to', etc., 'right' Alternatively, one or more other components may be positioned between the two parts unless 'directly' is used.

In the description of the embodiments, 'first', 'second', etc. are used to describe various components, but the components are not limited by these terms. These terms are only used to distinguish one component from another. In addition, the component names used in the following description may be selected in consideration of ease of writing the specification, and may be different from the component names of the actual product.

Each feature of the various embodiments of the present invention can be partially or wholly combined or combined with each other, and technically various interlocking and driving are possible. In addition, each embodiment may be implemented independently of each other or may be implemented together in a related relationship.

Hereinafter, preferred embodiments according to the present invention will be described in detail with reference to the accompanying drawings. In the following embodiments, the electroluminescent display will be mainly described with respect to the organic light emitting display including the organic light emitting material. However, it should be noted that the technical spirit of the present invention is not limited to an organic light emitting display device, and may be applied to an inorganic light emitting display device including an inorganic light emitting material.

Hereinafter, the present invention will be described with reference to FIG. 1 . 1 is an example of an equivalent circuit diagram showing the structure of one pixel in an organic light emitting diode display having a compensation circuit according to the present invention.

Referring to FIG. 1 , one pixel of an organic light emitting diode display includes a switching thin film transistor ST, a driving thin film transistor DT, an auxiliary capacitor Cst, a compensation circuit, and an organic light emitting diode OLE. The compensation circuit may be configured in various ways. Here, a case in which the sensing thin film transistor ET, the sensing wiring REF, and the sensing control wiring EL are provided will be described.

The switching thin film transistor ST performs a switching operation so that a data signal supplied through the data line DL is stored as a data voltage in the storage capacitor Cst in response to a scan signal supplied through the scan line SL. The driving thin film transistor DT operates so that a driving current flows between the power supply line VDD and the base line VSS according to the data voltage stored in the storage capacitor Cst. The organic light emitting diode OLE operates to emit light according to a driving current formed by the driving thin film transistor DT.

The sensing thin film transistor ET is a circuit added to a pixel to compensate for a threshold voltage of the driving thin film transistor DT. The sensing thin film transistor ET is connected between the drain electrode of the driving thin film transistor DT and the anode electrode of the organic light emitting diode OLE (or a sensing node). The sensing thin film transistor ET is activated by the sensing control wiring EL. The sensing thin film transistor ET operates to supply an initialization voltage (or a sensing voltage) transferred through the sensing line REF to the sensing node or to sense (detect) a voltage or current of the sensing node.

The switching thin film transistor ST has a source electrode connected to the data line DL and a drain electrode connected to a gate electrode of the driving thin film transistor DT. The driving thin film transistor DT has a source electrode connected to the power wiring VDD and a drain electrode connected to an anode electrode of the organic light emitting diode OLE. The storage capacitor Cst has a first electrode connected to the gate electrode of the driving thin film transistor DT and a second electrode connected to a drain electrode of the driving thin film transistor DT.

In the organic light emitting diode OLE, an anode electrode is connected to a drain electrode of the driving thin film transistor DT and a cathode electrode is connected to a base line VSS. In the sensing transistor ET, a gate electrode is connected to the sensing control line EL, a source electrode is connected to the sensing line REF, and a drain electrode is connected to the anode electrode of the organic light emitting diode OLE, which is a sensing node.

The operating time of the sensing thin film transistor ET may be similar to/same as or different from that of the switching thin film transistor ST according to a compensation algorithm. For example, as shown in FIG. 1 , the switching thin film transistor ST may have a gate electrode connected to the scan line SL, whereas the sensing thin film transistor ET may have a gate electrode connected to the sensing control line EL. . As another example, the gate electrode of the switching thin film transistor ST and the gate electrodes of the sensing thin film transistor ET may be connected in common to the scan line SL.

In FIG. 1 , a 3T1C (3 transistors, 1 capacitor) structure pixel including a switching thin film transistor (ST), a driving thin film transistor (DT), a storage capacitor (Cst), an organic light emitting diode (OLE), and a sensing thin film transistor (ET) has been described as an example, when another compensation circuit is further added, it may be configured as 3T2C, 4T2C, 5T1C, 6T2C, or the like.

Hereinafter, structural features of the large-area and/or ultra-high resolution organic light emitting diode display device according to the present invention in which the circuit configuration described in FIG. 1 is implemented as a product will be described.

<First embodiment>

A first embodiment of the present invention will be described with reference to FIG. 2 . 2 is a plan view illustrating a structure of an organic light emitting diode display including a compensation thin film transistor according to a first embodiment of the present invention.

The organic light emitting diode display device according to the first embodiment of the present invention includes a horizontal sensing wiring REFh, a horizontal current wiring VDDh and The scan line SL and the sensing control line EL, and the sensing line REF, the data line DL, and the driving current line running in a vertical direction (column direction or vertical direction) that can be defined in the second direction ( VDD) defines a pixel area. Specifically, between two adjacent horizontal sensing lines REFh in the horizontal direction and between the driving current line VDD and the data line DL or the sensing line REF and the data line DL in the vertical direction. The space of is defined as one pixel area.

The scan line SL, the sensing control line EL, the horizontal sensing line REFh, and the horizontal current line VDDh run in a horizontal direction of the substrate. The data lines DL, the driving current lines VDD, and the sensing lines REF run in the vertical direction of the substrate. The horizontal sensing line REFh is connected to the sensing line REF running in the vertical direction through the sensing contact hole RH. The horizontal current line VDDh is connected to the driving current line VDD running in the vertical direction through the current contact hole VH.

In the organic light emitting diode display according to the first embodiment, sub-pixels of four colors red (R), white (W), green (G), and blue (B) sequentially arranged in a row direction are gathered to form a unit pixel . A unit pixel in which four sub-pixels are gathered is repeatedly arranged. A unit pixel is defined between two neighboring horizontal sensing lines REFh and between two neighboring driving current lines VDD.

Two of the four sub-pixels are disposed on the left and right sides of the sensing line REF, respectively, and have a shape that is symmetrical with respect to the sensing line REF. The horizontal sensing line REFh is branched or connected to the sensing line REF and extends into two left sub-pixel areas and two right sub-pixel areas.

In the pixel area, between the horizontal driving current line VDDh and the horizontal sensing line REFh is defined as a non-emission area in which thin film transistors and storage capacitors are disposed. An anode electrode ANO of the organic light emitting diode OLE is disposed between the horizontal driving current line VDDh and the previous horizontal sensing line REFh. A light emitting area of the anode ANO is defined by a bank BA, and an organic light emitting diode OLE is formed in the light emitting area.

The switching thin film transistor ST includes a switching source electrode SS connected to the data line DL, a switching gate electrode SG that is a part of the scan line SL, a switching semiconductor layer SA, and a switching drain electrode SD. do. A region where the switching semiconductor layer SA and the switching gate electrode SG overlap is a channel region (hatched portion). The switching semiconductor layer SA is disposed across from the lower side to the upper side of the scan line SL, so that the switching thin film transistor ST is formed.

The sensing thin film transistor ET includes a sensing source electrode ES connected to the horizontal sensing line REFh, a sensing gate electrode EG that is a part of the sensing control line EL, a sensing semiconductor layer EA, and a sensing drain electrode ED. includes A region where the sensing semiconductor layer EA and the sensing gate electrode EG overlap is a channel region (hatched portion). The sensing semiconductor layer EA is disposed across from the lower side to the upper side of the sensing control line EL, so that the sensing thin film transistor ET is formed.

The driving thin film transistor DT includes a driving source electrode DS that is branched from the driving current wiring VDD or a part of the horizontal current wiring VDDh, a driving gate electrode DG connected to the switching drain electrode SD, and a driving semiconductor layer ( DA) and a driving drain electrode DD. A region where the driving semiconductor layer DA and the driving gate electrode DG overlap is a channel region (hatched portion). The driving semiconductor layer DA starts from the driving source electrode DS and extends across the driving gate electrode DG in the scan line SL direction. The driving drain electrode DD is connected to one side of the driving semiconductor layer DA and the sensing drain electrode ED.

The storage capacitor Cst includes a first electrode and a second electrode. The first electrode is formed by extending a part of the switching drain electrode SD. The second electrode is formed as a part of the driving drain electrode DD or the anode electrode ANO. Here, for convenience, a case in which a part of the anode ANO is formed as a second electrode overlapping the first electrode is illustrated.

The driving thin film transistor DT and the storage capacitor Cst are disposed between the horizontal current line VDDh and the scan line SL. In addition, the switching thin film transistor ST and the sensing thin film transistor ET are disposed between the scan line SL and the horizontal sensing line REFh. As a result, driving elements are disposed between the horizontal current line VDDh and the horizontal sensing line REFh, and this area is defined as a non-emission area. The anode electrode ANO has a structure extending from the light emitting area to a part of the non-emission area.

The anode electrode ANO of the organic light emitting diode OLE is connected to the driving drain electrode DD through the pixel contact hole PH. The opening of the bank BA is formed to expose the maximum area among the areas disposed in the light emitting area among the anode electrodes ANO.

A part of the anode electrode ANO is exposed by the bank BA. An organic light emitting diode OLE is formed by sequentially stacking an organic light emitting layer and a cathode electrode on the anode electrode ANO and the bank BA. The organic light emitting diode OLE is preferably formed to have a maximum area in the light emitting region.

The organic light emitting diode display device of FIG. 2 shows a structure in which the open area of the bank BA does not overlap the thin film transistors ST, DT, and ET. In this case, the structure of the bottom emission type organic light emitting diode display is mainly shown. In the case of a top emission type, the area of the anode electrode ANO overlapping the thin film transistors ST and DT and the storage capacitor Cst is also an opening area (or light emitting area) from which the bank BA is removed. can be included in Furthermore, the anode electrode ANO may be extended before the horizontal sensing line REFh, and even the sensing thin film transistor ET may be included in the opening area.

Additionally, a cross-sectional structure of the organic light emitting diode display according to the first embodiment of the present invention will be described with reference to FIG. 3 . Here, for convenience, the structure of the switching thin film transistor (ST), the driving thin film transistor (DT), and the organic light emitting diode (OLE) will be mainly described. 3 is a cross-sectional view showing the structure of the organic light emitting diode display including the compensation thin film transistor according to the first embodiment, taken along the cut line I-I' of FIG. 2 .

A buffer layer BUF is coated on the entire surface of the substrate SUB. The buffer layer BUF is applied to improve interfacial properties when another inorganic or organic material is applied on the surface of the substrate SUB. A semiconductor layer is formed on the buffer layer BUF. In particular, the switching semiconductor layer SA of the switching thin film transistor ST and the driving semiconductor layer DA of the driving thin film transistor DT are formed.

A gate insulating layer GI is coated on the semiconductor layers SA and DA. A gate element is formed on the gate insulating layer GI. The gate element includes a switching gate electrode SG overlapping the central region of the switching semiconductor layer SA and a driving gate electrode DG overlapping the central region of the driving semiconductor layer DA. The gate element may further include a scan line SL connecting the switching gate electrode SG. In addition, it further includes a horizontal driving current line VDDh. The gate insulating layer GI may be applied to the entire surface of the substrate SUB or disposed only under the gate electrodes SG and DG, depending on a method of forming the semiconductor layer. Here, for convenience, it will be described as a case in which it is applied to the entire substrate SUB. An intermediate insulating film (ILD) is applied over the gate element.

A source-drain element is formed on the intermediate insulating layer ILD. The source-drain element includes a switching source electrode SS, a switching drain electrode SD, a driving source electrode DS, a driving drain electrode DD, a data line DL, and a driving current line VDD. The switching source electrode SS contacts one side of the switching semiconductor layer SA, and the switching drain electrode SD contacts the other side of the switching semiconductor layer DA. The driving source electrode DS contacts one side of the driving semiconductor layer DA, and the driving drain electrode DD contacts the other side of the driving semiconductor layer DA. The switching source electrode SS is connected to the data line DL, and the driving source electrode DS is connected to the driving current line VDD. A planarization film OC is applied over the source-drain elements.

An anode electrode ANO is formed on the planarization layer OC. The anode electrode ANO is connected to the driving drain electrode DD through the pixel contact hole PH passing through the planarization layer OC. A portion of the anode electrode ANO overlaps a portion of the switching drain electrode SD with the planarization layer OC interposed therebetween. A storage capacitor Cst is formed in this overlapping region.

A bank BA is coated on the anode electrode ANO. An opening area (or a light emitting area) removed to expose most of the central area of the anode electrode ANO is defined in the bank BA. In the case of the bottom emission type, the opening area of the bank BA is formed so as not to overlap with the surrounding wirings. On the other hand, in the case of the top emission type, the opening area of the bank BA may be formed to partially overlap, regardless of the positions of the wirings.

An organic light emitting layer OL is stacked on the bank BA in which the opening area is defined to cover the entire surface of the substrate SUB. In this case, the organic light emitting layer OL contains a material emitting white light. In order to express color, although not shown in the drawings, in the case of the bottom emission type, a color filter may be further included under the anode electrode. A cathode electrode CAT is stacked on the organic light emitting layer OL to cover the entire surface of the substrate SUB. An organic light emitting diode OLE in which an anode electrode ANO, an organic light emitting layer OL, and a cathode electrode CAT are sequentially stacked is formed in the opening region.

In the organic light emitting diode display device according to the present invention, the degree of light emission of the organic light emitting diode OLE is determined by the base voltage applied to the cathode electrode CAT and the light emission voltage applied to the anode electrode ANO. The ground voltage applied to the cathode electrode CAT is always constant. Accordingly, in order to prevent voltage fluctuation due to resistance at the cathode electrode CAT from occurring, the cathode electrode CAT is formed in a single sheet shape over the entire surface of the substrate SUB.

On the other hand, the emission voltage applied to the anode electrode ANO is determined by the driving thin film transistor DT with the high potential voltage applied to the driving current line VDD. That is, a constant high potential voltage is always applied to the driving current line VDD. The high potential voltage should also be configured to maintain the same voltage across the entire substrate SUB. To this end, it is preferable that the driving current wiring VDD is formed of a low-resistance metal material, and that a voltage fluctuation is prevented by securing a large area as much as possible.

Since the driving current wiring VDD has a larger area than other wirings in order to ensure line resistance as low as possible, the area of the driving current wiring VDD may be an important factor in securing an aperture ratio. In particular, in the case of the bottom emission type, since the opening area is determined to be a region that does not overlap the wirings, the opening ratio may be reduced by the area of the driving current wiring VDD. In the following embodiments, the present invention further proposes a structure capable of minimizing an area while maintaining a low line resistance of the driving current wiring VDD.

<Second embodiment>

Hereinafter, an organic light emitting diode display device according to a second embodiment of the present invention will be described with reference to FIG. 4 . 4 is a plan view showing the structure of an organic light emitting diode display device according to a second embodiment of the present invention.

In a plan view, the organic light emitting diode display device according to the second embodiment is substantially the same as that of the first embodiment. If there is a difference, an auxiliary driving current line AVD is further provided. Due to the auxiliary driving current wiring AVD, the line resistance and/or the sheet resistance of the driving current wiring VDD may be reduced. Due to the auxiliary driving current wiring AVD, even when the wiring width of the driving current wiring VDD is reduced, the resistance of the driving current wiring VDD does not increase. By overlapping the auxiliary driving current line AVD with the data line DL, it is possible to achieve a high aperture ratio without affecting the aperture ratio.

For example, as shown in FIG. 4 , an auxiliary driving current line AVD formed as a third metal layer under the data line DL is further included. The auxiliary driving current line AVD is disposed to be parallel to the data line DL in a lower layer of the data line DL. The driving current wiring VDD and the auxiliary driving current wiring AVD are disposed in parallel to each other with a pixel area therebetween in different layers.

The driving current line VDD and the auxiliary driving current line AVD are connected to each other through the horizontal driving current line VDDh. That is, the driving current line VDD is connected to the horizontal driving current line VDDh through the horizontal driving line contact hole VH. The horizontal driving current line VDDh is connected to the auxiliary driving current line AVD through the auxiliary wiring contact hole ADH.

A cross-sectional structure of the organic light emitting diode display device according to the second embodiment will be described with reference to FIG. 5 . The structures of the thin film transistors ST and DT and the organic light emitting diode OLE are the same as those of the first embodiment, and thus a redundant description will be omitted. The arrangement structure and connection structure of the auxiliary driving current wiring AVD, which are characteristics of the second embodiment, will be mainly described. 5 is a cross-sectional view showing the structure of the organic light emitting diode display according to the second embodiment taken along the cut line II-II' of FIG. 4 .

An auxiliary driving current line AVD is formed on the substrate SUB. The auxiliary driving current line AVD is preferably formed to cross the substrate SUB while overlapping the data line DL at a position where the data line DL is to be formed. As shown in FIG. 4 , when the data lines DL of two neighboring pixel areas are disposed adjacent to each other, it is preferable to arrange the auxiliary driving current line AVD to overlap the two data lines DL at the same time. desirable.

A buffer layer BUF is stacked on the auxiliary driving current line AVD. Although not shown in the drawings, a light blocking layer made of the same material may be further formed on the same layer as the auxiliary driving current line AVD. Here, the light blocking layer is to prevent external light from being irradiated to the semiconductor layer of the thin film transistor, and is preferably disposed at a position where the thin film transistor is to be formed.

Although not shown in FIG. 5 , a semiconductor layer is formed on the buffer layer BUF as shown in FIG. 3 . A gate insulating layer GI is stacked on the semiconductor layer. In addition, a gate element is formed on the gate insulating film GI. The horizontal driving current line VDDh, which is one of the gate elements, is connected to the auxiliary driving current line AVD. For example, an auxiliary wiring contact hole ADH is formed through the gate insulating layer GI and the buffer layer BUF to expose the auxiliary driving current wiring AVD. The horizontal driving current line VDDh is connected to the auxiliary driving current line AVD through the auxiliary wiring contact hole ADH. An intermediate insulating layer ILD is stacked on the gate element including the horizontal driving current line VDDh.

A source-drain element is formed on the intermediate insulating layer ILD. The source-drain element includes a data line DL and a driving current line VDD. The driving current line VDD is connected to the horizontal driving current line VDDh. For example, a horizontal driving wiring contact hole VH is formed through the intermediate insulating layer ILD to expose a portion of the horizontal driving current wiring VDDh. The driving current line VDD is connected to the horizontal driving current line VDDh through the horizontal driving line contact hole VH.

A planarization film OC is deposited over the source-drain element. An anode electrode is formed on the planarization layer OC. A bank BA is formed on the anode electrode. FIG. 5 is a portion in which the anode electrode is not formed, and the anode electrode is not shown, and has a structure in which only the bank BA is formed. On the bank BA, the organic light emitting layer OL and the cathode electrode CAT are sequentially stacked on the entire surface of the substrate SUB.

<Third embodiment>

Hereinafter, a third embodiment of the present invention will be described with reference to FIG. 6 . 6 is a plan view showing the structure of an organic light emitting diode display device according to a third embodiment of the present invention.

In a plan view, the organic light emitting diode display device according to the third embodiment is substantially the same as that of the first embodiment. If there is a difference, an auxiliary driving current line AVD is further provided. Due to the auxiliary driving current wiring AVD, the line resistance and/or the sheet resistance of the driving current wiring VDD may be reduced. Due to the auxiliary driving current wiring AVD, even when the wiring width of the driving current wiring VDD is reduced, the resistance of the driving current wiring VDD does not increase. In particular, by forming the auxiliary driving current wiring AVD on the same layer as the semiconductor layer and overlapping the organic light emitting diode OLE formed in the opening area, the aperture ratio is not affected, and thus a high aperture ratio can be achieved.

For example, as shown in FIG. 6 , an auxiliary driving current line AVD formed as a semiconductor layer under the organic light emitting diode OLE is further included. When the semiconductor layer is patterned, the auxiliary driving current wiring AVD is formed to overlap the opening region with the same material and to have a shape disposed in the horizontal direction of the substrate SUB. In particular, in the process of forming the semiconductor layer, both sides in contact with the source electrode and the drain electrode are doped with impurities or made into a conductor through plasma treatment. At this time, the semiconductor layer to be used as the auxiliary driving current wiring (AVD) is also doped with impurities or subjected to plasma treatment to form a conductor.

Conductive semiconductor layers, in particular oxide semiconductor layers, have a much higher transparency than metals. Accordingly, most of the light emitted from the organic light emitting diode OLE is transmitted even if it overlaps the light emitting area. The driving current line VDD runs in the vertical direction of the substrate SUB, while the auxiliary driving current line AVD runs in the horizontal direction of the substrate SUB. Further, the driving current wiring VDD is arranged in the layer where the source-drain element is formed, and the auxiliary driving current wiring AVD is arranged in the semiconductor layer. The driving current wiring VDD and the auxiliary driving current wiring AVD are connected to each other through the auxiliary wiring contact hole AVH passing through the insulating layer stacked therebetween.

In particular, it is preferable that a plurality of auxiliary wiring contact holes AVH are disposed over a region where the auxiliary driving current wiring AVD and the driving current wiring VDD overlap. This is to increase the number of contact holes to minimize contact resistance generated in the contact holes themselves.

A cross-sectional structure of an organic light emitting diode display according to a third embodiment will be described with further reference to FIG. 7 . The structures of the thin film transistors ST and DT and the organic light emitting diode OLE are the same as those of the first embodiment, and thus a redundant description will be omitted. The arrangement structure and connection structure of the auxiliary driving current wiring AVD, which are characteristics of the third embodiment, will be mainly described. 7 is a cross-sectional view showing the structure of the organic light emitting diode display according to the third embodiment, taken along the cut line III-III' of FIG. 6 .

A buffer layer BUF is applied over the entire surface of the substrate SUB. A semiconductor layer is formed on the buffer layer BUF. The semiconductor layer includes a switching semiconductor layer SA, a driving semiconductor layer DA, and an auxiliary driving current wiring AVD. A gate insulating film GI is coated on the semiconductor layer. A gate element is formed on the gate insulating layer GI. In particular, the switching gate electrode SG overlaps the central region of the switching semiconductor layer SA, and the driving gate electrode DG is defined as a channel region overlapping the central region of the driving semiconductor layer DA. In the semiconductor layer, both sides of the channel region may be defined as a source region and a drain region connected to the source electrode and the drain electrode, respectively. The source region and the drain region are doped with impurities or made conductive through plasma treatment.

The auxiliary driving current wiring AVD is a wiring formed through the same process as the source region and the drain region. In particular, it is preferable to have a wide width corresponding to the organic light emitting diode OLE and to be disposed in the horizontal direction of the substrate SUB.

An intermediate insulating film (ILD) is deposited over the gate element. A source-drain element is formed on the intermediate insulating layer ILD. The source-drain element includes a data line DL and a driving current line VDD. The driving current line VDD is connected to the horizontal driving current line VDDh. For example, an auxiliary wiring contact hole AVH is formed through the intermediate insulating layer ILD and the gate insulating layer GI to expose a part of the auxiliary driving current wiring AVD. The driving current line VDD is connected to the auxiliary driving current line AVD through the auxiliary line contact hole AVH.

A planarization film OC is deposited over the source-drain element. An anode electrode ANO is formed on the planarization layer OC. A bank BA is formed on the anode electrode ANO. On the bank BA, the organic light emitting layer OL and the cathode electrode CAT are sequentially stacked on the entire surface of the substrate SUB. An organic light emitting diode OLE in which an anode electrode ANO, an organic light emitting layer OL, and a cathode electrode CAT are stacked is formed in the opening region of the bank BA.

<Fourth embodiment>

Hereinafter, a fourth embodiment of the present invention will be described with reference to FIG. 8 . 8 is a plan view showing the structure of an organic light emitting diode display according to a fourth embodiment of the present invention.

The fourth embodiment is a case in which the auxiliary driving current wiring according to the second embodiment and the auxiliary driving current wiring according to the third embodiment are provided together. Since the auxiliary driving current wiring according to the second embodiment and the auxiliary driving current wiring according to the third embodiment are formed on different layers using different materials, the line resistance of the driving current wiring VDD can be reduced by providing both of them at the same time. You can keep it even lower.

When viewed from a plan view, the organic light emitting diode display device according to the fourth embodiment corresponds to a case in which the second embodiment and the third embodiment are combined with each other. That is, the first auxiliary driving current line AVD1 and the second auxiliary driving current line AVD2 are provided together. Due to the first auxiliary driving current line AVD1 and the second auxiliary driving current line AVD2 , the line resistance and/or the sheet resistance of the driving current line VDD may be significantly reduced. Therefore, even when the wiring width of the driving current wiring VDD is reduced, the resistance of the driving current wiring VDD does not increase. The first auxiliary driving current line AVD1 overlaps the data line DL and the second auxiliary drive current line AVD2 overlaps the organic light emitting diode OLE, so that the aperture ratio is not affected, so that a high aperture ratio can be achieved. can

For example, as shown in FIG. 8 , a first auxiliary driving current line AVD1 formed of a third metal layer under the data line DL is included. The first auxiliary driving current line AVD1 is disposed to be parallel to the data line DL in a lower layer of the data line DL. The driving current wiring VDD and the first auxiliary driving current wiring AVD1 are disposed in parallel to each other in different layers with a pixel area therebetween. The driving current line VDD and the first auxiliary driving current line AVD1 are connected to each other by a horizontal driving current line VDDh.

The driving current line VDD and the auxiliary driving current line AVD are connected to each other through the horizontal driving current line VDDh. That is, the driving current line VDD is connected to the horizontal driving current line VDDh through the horizontal driving line contact hole VH. The horizontal driving current line VDDh is connected to the auxiliary driving current line AVD through the auxiliary wiring contact hole ADH.

In addition, a second auxiliary driving current line AVD2 formed as a semiconductor layer under the organic light emitting diode OLE is included. When the semiconductor layer is patterned, the second auxiliary driving current wiring AVD2 is formed to overlap the opening region with the same material and to have a shape disposed in the horizontal direction of the substrate SUB. In particular, in the process of forming the semiconductor layer, both sides in contact with the source electrode and the drain electrode are doped with impurities or made into a conductor through plasma treatment. At this time, the semiconductor layer to be used as the second auxiliary driving current wiring AVD2 is also doped with impurities or subjected to plasma treatment to form a conductor.

Conductive semiconductor layers, in particular oxide semiconductor layers, have a much higher transparency than metals. Accordingly, most of the light emitted from the organic light emitting diode OLE is transmitted even if it overlaps the light emitting area. The driving current line VDD runs in the vertical direction of the substrate SUB, while the second auxiliary driving current line AVD2 runs in the horizontal direction of the substrate SUB. In addition, the driving current wiring VDD is arranged in the layer where the source-drain element is formed, and the second auxiliary driving current wiring AVD2 is arranged in the semiconductor layer. The driving current line VDD and the second auxiliary driving current line AVD2 are connected to each other through a second auxiliary line contact hole AVH passing through the insulating layer stacked therebetween.

In particular, it is preferable that a plurality of second auxiliary wiring contact holes AVH2 are disposed over a region where the second auxiliary driving current wiring AVD2 and the driving current wiring VDD overlap each other. This is to increase the number of contact holes to minimize contact resistance generated in the contact holes themselves.

The cross-sectional structure of the organic light emitting diode display device according to the fourth embodiment is substantially the same as the structure in which FIG. 5 showing the second embodiment and FIG. 7 showing the third embodiment are combined. In addition, since the positions are different from each other, the structures representing the features are the same as those of FIGS. 5 and 7, respectively, and thus detailed descriptions thereof will be omitted.

Those skilled in the art from the above description will be able to see that various changes and modifications can be made without departing from the technical spirit of the present invention. Accordingly, the present invention should not be limited to the contents described in the detailed description, but should be defined by the claims.

DL: data wire SL: scan wire
VDD: drive current wiring VDDh: horizontal current wiring
REF: sensing wiring EL: sensing control wiring
REFh: Horizontal sensing wire AVD: Auxiliary drive current wire
ST: switching thin film transistor ET: sensing thin film transistor
DT: driving thin film transistor OLE: organic light emitting diode
AVD1: first auxiliary driving current wiring AVD2: second auxiliary driving current wiring
ADH: (1st) auxiliary wiring contact hole AVH: (2nd) auxiliary wiring contact hole

Claims (12)

delete a buffer layer laminated over the substrate;
a scan line running on the buffer layer in a first direction;
an intermediate insulating layer covering the scan wiring;
a driving current line and a data line extending in a second direction on the intermediate insulating layer;
an auxiliary driving current line disposed under the intermediate insulating layer and connected to the driving current line; and
a pixel area defined by an area surrounded by the scan line, the driving current line, and the data line, in which an organic light emitting diode is disposed;
The auxiliary driving current line overlaps the data line and runs in the second direction. 3. The method of claim 2,
and the auxiliary driving current line includes a metal material stacked between the substrate and the buffer layer. 4. The method of claim 3
a semiconductor layer disposed between the intermediate insulating layer and the buffer layer and overlapping a gate electrode branched from the scan wiring with a gate insulating layer interposed therebetween; and
Further comprising a horizontal driving current wiring disposed between the gate insulating film and the intermediate insulating film,
The driving current wiring is
connected to the horizontal driving current wiring through a horizontal driving wiring contact hole penetrating the intermediate insulating layer;
The horizontal driving current wiring is
An organic light emitting diode display connected to the auxiliary driving current line through an auxiliary line contact hole passing through the gate insulating layer and the buffer layer. a buffer layer laminated over the substrate;
a scan line running on the buffer layer in a first direction;
an intermediate insulating film covering the scan wiring;
a driving current line and a data line extending in a second direction on the intermediate insulating layer;
an auxiliary driving current line disposed under the intermediate insulating layer and connected to the driving current line; and
a pixel area defined by an area surrounded by the scan line, the driving current line, and the data line, in which an organic light emitting diode is disposed;
a semiconductor layer disposed between the intermediate insulating layer and the buffer layer and overlapping a gate electrode branching from the scan wiring with a gate insulating layer interposed therebetween;
and the auxiliary driving current line overlaps the organic light emitting diode. 6. The method of claim 5,
The auxiliary driving current line is spaced apart from the semiconductor layer by a predetermined distance in the same layer as the semiconductor layer. 6. The method of claim 5,
The driving current wiring is
An organic light emitting diode display connected to the auxiliary driving current line through an auxiliary line contact hole penetrating the intermediate insulating layer and the gate insulating layer. 6. The method of claim 5,
The semiconductor layer is
a source region including impurities in the semiconductor material and defined in one region;
a drain region including the impurity in the semiconductor material and defined in the other region; and
a channel region defined between the source region and the drain region made of the semiconductor material free of the impurity;
The auxiliary driving current wiring is
The organic light emitting diode display device including the impurity in the semiconductor material. a buffer layer laminated over the substrate;
a scan line running on the buffer layer in a first direction;
an intermediate insulating film covering the scan wiring;
a driving current line and a data line extending in a second direction on the intermediate insulating layer;
an auxiliary driving current line disposed under the intermediate insulating layer and connected to the driving current line; and
a pixel area defined by an area surrounded by the scan line, the driving current line, and the data line, in which an organic light emitting diode is disposed;
a semiconductor layer disposed between the intermediate insulating layer and the buffer layer and overlapping a gate electrode branching from the scan wiring with a gate insulating layer interposed therebetween;
The auxiliary driving current line may include a first auxiliary driving current line extending in the second direction while overlapping the data line; and
and a second auxiliary driving current line overlapping the organic light emitting diode. 10. The method of claim 9,
The first auxiliary driving current line includes a metal material stacked between the substrate and the buffer layer. 10. The method of claim 9,
The second auxiliary driving current line is spaced apart from the semiconductor layer by a predetermined distance in the same layer as the semiconductor layer. 10. The method of claim 9,
a horizontal driving current line disposed between the gate insulating layer and the intermediate insulating layer;
The driving current wiring is
connected to the horizontal driving current wiring through a horizontal driving wiring contact hole penetrating the intermediate insulating layer;
The horizontal driving current wiring is
connected to the first auxiliary driving current line through a first auxiliary line contact hole penetrating the gate insulating layer and the buffer layer; and
The driving current wiring is
An organic light emitting diode display connected to the second auxiliary driving current line through a second auxiliary line contact hole penetrating the intermediate insulating layer and the gate insulating layer.

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