KR102420997B1 - Display device - Google Patents

Abstract

The present application relates to a display device in which defects due to the spread of an alignment layer can be prevented. A display device according to an example of the present application includes a display area provided on a substrate, a non-display area surrounding the display area, a pad area provided in the non-display area, and a plurality of protruding lines extending in a zigzag form between the display area and the pad area. and a central link portion having a

Description

display device {DISPLAY DEVICE}

This application relates to a display device.

The liquid crystal display device may be manufactured through manufacturing processes such as a cell process, a polarizer attaching process, a circuit attaching process, a cell inspection process, a backlight assembling process, and a case assembling process. The cell process includes a thin film transistor array process, a color filter array process, a bonding process, a cutting process, and an inspection process.

Among the cell processes, each of the thin film transistor array process and the color filter array process is performed on each of the first and second mother substrates divided into a plurality of panel areas to shorten process time and improve production yield.

The liquid crystal display includes an alignment layer for initial alignment of the liquid crystal layer, and the alignment layer is formed on the uppermost side of the first and second mother substrates.

Recently, in order to maximize the efficiency of the mother substrate and to implement a narrow bezel, the gap between panel regions disposed on the mother substrate is designed to be very narrow. Accordingly, when the alignment layer is printed, a phenomenon in which the alignment layer is applied or spread to the adjacent panel area occurs due to an alignment error. In particular, as the alignment layer is applied or spread to the pad portion provided in the adjacent panel area, there is a problem in that unevenness occurs in the pad portion due to the alignment layer, and adhesion between the pad portion and the circuit film is defective.

An object of the present application is to provide a display device capable of preventing defects due to the spread of an alignment layer.

A display device according to an example of the present application includes a display area provided on a substrate, a non-display area surrounding the display area, a pad area provided in the non-display area, and a plurality of protruding lines extending in a zigzag form between the display area and the pad area. and a central link portion having a

A display device according to another example of the present application includes a first substrate including a display area and a non-display area surrounding the display area, and a second substrate bonded to the first substrate with a liquid crystal layer interposed therebetween, the first substrate The silver includes a pad area provided in the non-display area, an alignment layer formed on the display area, and a central link portion having a plurality of protruding lines extending in a zigzag shape to prevent the alignment layer from spreading between the display area and the pad area.

In the display device according to the present application, the alignment layer may be prevented from flowing toward the pad area, and thus, defects due to the spread of the alignment layer may be prevented.

1 is a view for explaining a display device according to the present application.
2 is a view for explaining a touch electrode of a display device according to the present application.
3 is a view for explaining a link line unit of a display device according to the present application.
FIG. 4 is a cross-sectional view taken along line I-I` shown in FIG. 3 .
5 to 7 are enlarged views of area A of FIG. 3 according to examples of the present application.

Advantages and features of the present application and methods of achieving them will become apparent with reference to the examples described below in detail in conjunction with the accompanying drawings. However, the present application is not limited to the examples disclosed below, but will be implemented in various different forms, and only these examples allow the disclosure of the present invention to be complete, and to those of ordinary skill in the art to which the present application belongs It is provided to fully indicate the scope of the invention, and the present application is only defined by the scope of the claims.

The shapes, sizes, proportions, angles, numbers, etc. disclosed in the drawings for explaining the examples of the present application are illustrative and the present invention is not limited to the illustrated matters. Like reference numerals refer to like elements throughout. In addition, in describing the present invention, if it is determined that a detailed description of a related known technology may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted.

When 'including', 'having', 'consisting', etc. mentioned in this specification are used, other parts may be added unless 'only' is used. When a component is expressed in the singular, the case in which the plural is included is included unless specifically stated otherwise.

In interpreting the components, it is interpreted as including an error range even if there is no separate explicit description.

In the case of a description of the positional relationship, for example, when the positional relationship of two parts is described as 'on', 'on', 'on', 'beside', etc., 'right' Alternatively, one or more other parts may be positioned between two parts unless 'directly' is used.

In the case of a description of a temporal relationship, for example, 'immediately' or 'directly' when a temporal relationship is described as 'after', 'following', 'after', 'before', etc. It may include cases that are not continuous unless this is used.

Although the first, second, etc. are used to describe various elements, these elements are not limited by these terms. These terms are only used to distinguish one component from another. Accordingly, the first component mentioned below may be the second component within the spirit of the present application.

The term “at least one” should be understood to include all possible combinations from one or more related items. For example, the meaning of "at least one of the first, second, and third items" means 2 of the first, second, and third items as well as each of the first, second, or third items. It may mean a combination of all items that can be presented from more than one.

Each feature of the various examples of the present application may be partially or wholly combined or combined with each other, technically various interlocking and driving are possible, and each example may be implemented independently of each other or may be implemented together in a related relationship. .

Hereinafter, an example of the present application will be described in detail with reference to the accompanying drawings.

1 is a view for explaining a display device according to the present application. Hereinafter, a case in which the display device according to the present application is a liquid crystal display device has been mainly described.

Referring to FIG. 1 , a display device according to the present application includes a display panel 100 , a pad area PA, a gate driving built-in circuit 150 , and a driving integrated circuit 300 .

The display panel 100 is a liquid crystal display panel that displays an image by driving liquid crystal molecules. The display panel 100 includes a first substrate 110 and a second substrate 130 that are bonded to each other with a liquid crystal layer interposed therebetween. The display panel 100 displays a predetermined image by using light irradiated from the backlight unit.

The first substrate 110 is a thin film transistor array substrate and includes a display area AA and a non-display area NDA. Glass material is mainly used for the first substrate 110, but a transparent plastic material that can be bent or bent may be used. For example, the first substrate 110 may be formed of a polyimide material.

The display area AA is defined as a portion other than an edge portion of the first substrate 110 . The display area AA may be defined as an area in which a pixel array displaying an image is provided. The display area AA includes a plurality of sub-pixels P formed in a pixel area provided by a plurality of gate lines GL and a plurality of data lines DL.

The plurality of gate lines GL are provided on the first substrate 110 , extend long along the first direction X of the first substrate 110 , and are spaced at regular intervals along the second direction Y of the first substrate 110 . are spaced apart The first direction X may be defined as a direction parallel to the longitudinal direction of the short side of the first substrate 110 , and the second direction Y may be defined as a direction parallel to the longitudinal direction of the long side of the first substrate 110 . have. For example, the first direction X may be parallel to the longitudinal direction of the gate line GL, and the second direction Y may be parallel to the longitudinal direction of the data line DL.

The plurality of data lines DL are provided on the first substrate 110 , extend long in the second direction Y of the first substrate 110 , and are spaced at regular intervals along the first direction X. are spaced apart

Each of the plurality of sub-pixels P may be defined as a region of a minimum unit that transmits actual light. At least three adjacent sub-pixels P may constitute one unit pixel for color display. For example, one unit pixel may include adjacent red sub-pixels, green sub-pixels, and blue sub-pixels, and may further include white sub-pixels to improve luminance.

Each of the plurality of sub-pixels P includes a thin film transistor TFT connected to an adjacent gate line GL and an adjacent data line DL, a plurality of pixel electrodes connected to the thin film transistor TFT, and a space between the plurality of pixel electrodes. and a provided common electrode. Each of the plurality of sub-pixels P displays an image according to a gate signal supplied from an adjacent gate line GL and a data voltage supplied from an adjacent data line DL.

The non-display area NDA defines an area other than the display area AA provided on the first substrate 110 . The non-display area NDA may be defined as an outer periphery of the display area AA. For example, the non-display area NDA may be defined as left, right, upper, and lower edge portions of the first substrate 110 surrounding the display area AA. Unlike the display area AA, the non-display area NDA does not display an image. The gate driving built-in circuit 150 , the pad region PA, and the driving integrated circuit 300 may be disposed in the non-display area NDA.

The second substrate 130 is a color filter array substrate and has a size smaller than that of the first substrate 110 . The second substrate 130 may be made of glass or plastic material, but may be made of the same material as the first substrate 110 . The second substrate 130 includes a black matrix, a color filter layer, and an overcoat layer.

The black matrix defines an opening area of each of the plurality of sub-pixels P of the first substrate 110 . The black matrix includes the non-display area NDA, the gate lines GL, the data lines DL, and the thin film transistor TFT of the first substrate 110 except for the plurality of opening areas overlapping each of the plurality of pixels. ) is provided on the second substrate 130 to overlap with each other. The black matrix prevents light leakage in areas other than the plurality of opening areas and serves to absorb external light.

The color filter layer is formed in each of the plurality of opening regions defined by the black matrix, and includes red, green, and blue color filters corresponding to colors set in each sub-pixel P.

The overcoat layer provides a flat surface on the black matrix and the color filter layer by covering the black matrix and the color filter layer.

The first substrate 110 and the second substrate 130 are bonded to each other with a liquid crystal layer interposed therebetween through a sealant. Accordingly, each of the plurality of sub-pixels P is provided in parallel with each other with the liquid crystal layer interposed therebetween, thereby forming the liquid crystal cell LC between the pixel electrode and the common electrode. The liquid crystal cell LC controls light transmission according to driving of liquid crystal molecules according to an electric field formed according to the data voltage supplied to the pixel electrode through the thin film transistor TFT and the common voltage supplied to the common electrode. Also, an alignment layer for setting a pre-tilt angle of the liquid crystal cell LC is formed between the first substrate 110 and the second substrate.

Each of the plurality of sub-pixels P includes a storage capacitor Cst provided in an overlapping region of the pixel electrode and the common electrode, and the storage capacitor Cst includes a data voltage supplied to the pixel electrode and a common voltage supplied to the common electrode. The difference voltage is stored, and when the thin film transistor TFT is turned off, the stored voltage is supplied to the pixel electrode until the thin film transistor TFT is turned on again.

The pad area PA includes a plurality of pads. Each pad may be connected to the external driving circuit film 200 to receive various signals, driving power and ground power supplied from the driving circuit film 200 . Each pad may transmit various signals, driving power, and ground power to the driving integrated circuit 300 .

The gate driving built-in circuit 150 is provided on the non-display area NDA of the first substrate 110 . The gate driving built-in circuit 150 is one-to-one connected to the plurality of gate lines GL. The gate driving built-in circuit 150 may be integrated on the first substrate 110 by the same process as that of the thin film transistor (TFT). The gate driving built-in circuit 150 generates a gate signal based on the gate control signal provided from the driving integrated circuit 300 and outputs the gate signal in a predetermined order, so that the sub-pixel P connected to each of the plurality of gate lines GL is displayed. The thin film transistor (TFT) is switched. The gate driving built-in circuit 150 may be formed of a shift register.

The driving integrated circuit 300 is provided on the non-display area NDA of the first substrate 110 . The driving integrated circuit 300 may be mounted on the chip mounting region of the first substrate 110 through a chip bonding process performed after the substrate bonding process. The driving integrated circuit 300 may be electrically connected to the pad area PA through a plurality of signal reception lines. The driving integrated circuit 300 may be connected to the gate driving embedded circuit 150 through a plurality of gate control signal lines.

The driving integrated circuit 300 receives driving power, ground power, timing synchronization signal, digital image data, and the like provided from an external host system from the pads provided on the pad area PA. The driving integrated circuit 300 generates a gate control signal according to the timing synchronization signal and provides it to the gate driving built-in circuit 150 through the gate control signal line 310 . The driving integrated circuit 300 converts digital image data into analog data voltages. The driving integrated circuit 300 provides data voltages to the plurality of data lines DL through the plurality of data link lines provided in the link line portion between the chip mounting area and the display area AA of the first substrate 110 . .

2 is a view for explaining a touch electrode TE of a display device according to the present application. Referring to FIG. 2 , the display device according to the present application includes a plurality of touch electrodes TE.

The touch electrode TE is provided on the display area AA. The touch electrode TE is connected to the driving integrated circuit 300 through touch link lines.

One touch electrode TE may have a size corresponding to a plurality of pixels. For example, one touch electrode TE includes 40 pixels in a first direction X parallel to the longitudinal direction of the gate lines G1 to Gn and a second direction parallel to the longitudinal direction of the data lines D1 to Dm. Y) may have a size corresponding to 12 pixels. In this case, one touch electrode TE may have a size corresponding to 480 pixel areas. However, the present invention is not limited thereto, and the size of one touch electrode TE may vary depending on the size, resolution, or touch resolution of the first substrate 110 .

The touch electrode TE is provided to overlap at least one pixel, and may be defined as a touch sensor for touch sensing. For example, the touch electrode TE may include a transparent conductive material such as indium tin oxide (ITO).

In the display mode, the touch electrode TE receives the common voltage Vcom from the touch link line TL connected to the driving integrated circuit 300 . In the touch mode, the touch electrode TE receives a touch driving signal from the touch link line TL. Accordingly, the touch electrode TE is used as a common electrode in the display mode.

3 is a view for explaining the link line unit 400 of the display device according to the present application. Referring to FIG. 3 , the link line part 400 of the display device according to the present application may include a central link part 500 disposed in the central part and edge link parts disposed on both sides of the central link part 500 . .

The central link part 500 has a plurality of protruding lines PL. The plurality of protrusion lines PL according to an example may be formed by an insulating layer covering the touch link line TL.

At least one protrusion line PL disposed on the central link part 500 among the plurality of protrusion lines PL according to the present application intersects a straight path between the display area AA and the pad area PA. The linear path between the display area AA and the pad area PA defines a linear path extending in a direction parallel to the second direction Y in the display area AA. For example, at least one of the plurality of protrusion lines PL extends in the second direction Y while being bent a plurality of times. At least one protrusion line PL has a zigzag pattern. For example, among the plurality of protrusion lines PL, the protrusion line PL disposed at the central portion may have a zigzag pattern.

A protrusion line PL disposed at an edge of the link line part 400 among the plurality of protrusion lines PL extends in a direction not parallel to the first direction X or the second direction Y. For example, among the plurality of protrusion lines PL, the protrusion lines PL disposed adjacent to both sides of the display area AA may extend in a diagonal direction relative to the first direction X or the second direction Y. have.

A length of the driving integrated circuit 300 in the first direction X is shorter than a length of the display area AA in the first direction X. Accordingly, the protrusion lines PL disposed adjacent to both sides of the display area AA extend in a diagonal direction relative to the first direction X or the second direction Y to be connected to the driving integrated circuit 300 . do. The inclination angle at which the protruding lines PL disposed adjacent to both sides of the display area AA extend in an oblique direction to be connected to the driving integrated circuit 300 is the difference between the display area AA and the driving integrated circuit 300 . It may be set according to a relationship of a length ratio in the first direction X and an arrangement relationship with an internal circuit of the panel 100 .

The protrusion line PL disposed on the central link part 500 is bent a plurality of times and extends in the second direction Y in the second direction. When the protrusion line PL disposed on the central link part 500 is bent a plurality of times and extends in the second direction, the length of the protrusion line PL disposed on the edge link part and the length of the protrusion line PL disposed on the central link part 500 A difference in lengths of the protrusion lines PL may be reduced. The protruding line PL disposed on the edge link part extends not parallel to the second direction Y, and the protruding line PL disposed on the central link part 500 is parallel to the second direction Y. is extended When the protrusion line PL disposed on the central link part 500 extends in a direction parallel to the second direction Y between the display area AA and the pad area PA, the protrusion disposed on the edge link part The length of the line PL is longer than the length of the protruding line PL disposed on the central link part 500 .

Since the plurality of protruding lines PL are all formed of the same material and the same thickness, the resistance of the protruding line PL disposed on the edge link portion is greater than the resistance of the protruding line PL disposed on the central link portion 500 . do. When the resistance between the protrusion lines PL varies according to the arrangement position, the intensity of the signals supplied through the protrusion lines PL varies. In this case, a deviation occurs in the luminance of an image displayed for each area of the display area AA, or a deviation occurs in touch sensitivity, which is a recognition degree according to a user's touch, for each area of the display area AA.

In the present application, the protrusion line PL disposed on the central link part 500 is bent a plurality of times and extends in the second direction Y. In this case, the length of the protrusion line PL disposed on the central link part 500 increases, so that the length of the protrusion line PL disposed on the edge link part and the protrusion line PL disposed on the central link part 500 increase. ) to reduce the difference in length. Accordingly, according to the present application, the variation in the resistance of the protruding line PL according to the arrangement position may be reduced, thereby reducing the variation in the intensity of signals supplied through the protruding line PL.

Each of the plurality of protrusion lines PL according to an example includes at least one protrusion protruding toward the adjacent protrusion line PL. The protrusion may protrude in the first direction (X). The protrusion may include a protrusion or a protrusion facing the adjacent protrusion line PL.

A protrusion of each of the plurality of protrusion lines according to an example intersects a straight path. Each protrusion may pass the straight path at least one time or more. Each protrusion may overlap a straight path.

The plurality of protrusion lines PL according to the present application have protrusions. The line in which the protrusion is formed may prevent the layer constituting the display area AA from flowing in the second direction Y. The plurality of protrusion lines PL according to the present application may use the protrusion to prevent a layer having fluidity among layers constituting the display area AA from spreading to the driving integrated circuit 300 or the pad area PA. .

For example, an alignment layer is formed on the display area AA. In this case, the alignment layer is formed by curing polyimide having fluidity. In a fluid state, a phenomenon in which the alignment layer spreads not only to the display area AA but also to the integrated driving circuit 300 and the pad area PA may occur. When the alignment layer spreads to the integrated driving circuit 300 and the pad area PA, a defect occurs in the area where the alignment layer is spread.

In one example of the present application, the alignment layer is formed by including a central link part 500 having a plurality of protruding lines PL extending in a zigzag shape to prevent the alignment layer from spreading between the display area AA and the pad area PA. It is possible to prevent a phenomenon of spreading to the integrated driving circuit 300 and the pad area PA, and a defect caused by this. That is, at least one of the plurality of protrusion lines PL intersects a straight path between the display area AA and the pad area PA. The protrusion line PL intersecting the straight path between the display area AA and the pad area PA causes the alignment layer to spread from the display area AA to the integrated driving circuit 300 and the pad area PA along the straight path. It can serve as a barrier to prevent it from happening.

FIG. 4 is a cross-sectional view taken along line I-I` shown in FIG. 3 . A display device according to an example of the present application includes a base layer 210 , a transistor array layer (TFT), a buffer layer 240 , a planarization layer 250 , an insulating layer 260 , a pixel electrode 270 , and a touch link line ( 271 and 272 , a common electrode 280 , and an alignment layer 285 .

The base layer 210 forms a lower portion of the first substrate 110 . The base layer 210 may be formed of glass or plastic. The base layer 210 serves to support the transistor array layer TFT formed in the display area AA. The base layer 210 serves to support the touch link line 272 and the insulating layer 260 formed on the central link part 500 .

The transistor array layer TFT is formed on the buffer layer BUF. The transistor array layer TFT is provided on the display area AA. The transistor array layer TFT forms thin film transistors constituting the sub-pixel P. The transistor array layer TFT includes a gate layer 220 , a gate insulating layer 230 , an active layer 231 , a source electrode layer 232 , a drain electrode layer 233 , and a buffer layer 240 .

The gate layer 220 is disposed on the base layer 210 . The gate layer 220 disposed on the display area AA forms a gate electrode of the thin film transistor TFT.

The gate insulating layer 230 covers an upper portion of the gate layer 220 . The gate insulating layer 230 is entirely formed on the display area AA and the central link part 500 . The gate insulating layer 230 entirely covers the upper portion of the base layer 210 and the upper portion of the gate layer 220 . The gate insulating layer 130 may be formed of a material having excellent electrical insulating properties. The gate insulating layer 130 prevents the gate layer 120 from being electrically shorted with the layers thereon.

The active layer 231 is disposed on the gate insulating layer 230 . The active layer 231 is disposed on an area in which the thin film transistor is formed in the display area AA. The active layer 231 may be formed of a semiconductor material. For example, the active layer 231 may be formed using a semiconductor material such as polysilicon (poly-Si), amorphous silicon (a-Si), or polycrystalline low-temperature polysilicon (LTPS).

The source electrode layer 232 is disposed on a portion of the upper portion of the active layer 231 . The source electrode layer 232 functions as a source electrode of the thin film transistor.

The drain electrode layer 233 is disposed on the upper portion of the active layer 231 except for the region where the source electrode layer 232 is disposed. The drain electrode layer 233 is spaced apart from the source electrode layer 232 . The drain electrode layer 233 functions as a drain electrode of the thin film transistor.

The buffer layer 240 is disposed on the gate insulating layer 230 .

The planarization layer 250 covers the transistor array layer TFT. The planarization layer 250 is disposed on the buffer layer 240 . The planarization layer 250 may be formed in the display area AA and the central link part 500 . For example, the planarization layer 250 may cover the entire display area AA. The planarization layer 250 is formed of a high molecular organic compound such as photo acryl.

The planarization layer 250 reduces the step difference of the upper surface of the planarization layer 250 . An upper surface of the planarization layer 250 according to an example may be formed to be flat with respect to a bottom surface of the display device. The planarization layer 250 may remove a step difference between layers provided thereon.

The insulating layer 260 is disposed on the planarization layer 250 . The insulating layer 260 may be formed using an inorganic oxide or an inorganic nitride. For example, the insulating layer 260 may be formed using SiO2. The insulating layer 260 functions as a passivation layer to prevent corrosion of the lower layer.

The pixel electrode 270 is disposed on the planarization layer 250 of the display area AA. The pixel electrode 270 is connected to the drain electrode layer 233 of the thin film transistor through a contact hole. The pixel electrode 270 supplies a driving voltage to each of the pixels P. The pixel electrode 270 may be formed of a transparent conductive layer.

The common electrode 280 is disposed on the pixel electrode 270 of the display area AA. The common electrode 280 supplies a common voltage to the plurality of pixels P. The common electrode 280 may function as a touch electrode in the touch mode. In this case, the connection electrode 271 may function as a touch link line. The common electrode 280 may be connected between the plurality of pixels P through the connection electrode 271 .

The insulating layer 260 disposed on the display area AA is disposed between the pixel electrode 270 and the common electrode 280 . The insulating layer 260 on the display area AA prevents a short circuit between the pixel electrode 270 and the common electrode 280 .

The touch link lines 271 and 272 are formed on the planarization layer 250 . The touch link line 271 formed in the display area AA may supply a touch driving signal to the common electrode 280 in the touch mode. The touch link line 272 formed in the central link unit 500 may transmit a touch driving signal to the touch link line 271 formed in the display area AA.

The insulating layer 260 is formed on the touch link lines 271 and 272 . The insulating layer 260 surrounds the plurality of touch link lines 271 and 272 .

The alignment layer 285 is formed on the insulating layer 260 . The alignment layer 285 may be formed of polyimide. The alignment layer 285 may have fluidity. The alignment layer 285 sets a pretilt angle of the liquid crystal layer provided between the first and second substrates 110 and 130 .

Each of the plurality of protruding lines PL according to an example of the present application includes a plurality of touch link lines 272 and an insulating layer 260 . Each of the protruding lines PL may serve to transmit a touch driving signal. At the same time, the protrusion line PL may block the touch link line 272 from being electrically affected no matter what layer is formed thereon. Accordingly, the protrusion line PL may be used to prevent the material having fluidity from spreading.

For example, the insulating layer 260 is provided on the planarization layer 250 to cover the plurality of touch link lines 272 . Accordingly, the insulating layer 260 may protect the touch link line 272 so that the touch link line 272 is not damaged even when the alignment layer is spread over the plurality of touch link lines 272 .

The touch link lines 272 and the insulating layer 260 constituting the protrusion line PL include a dam, a barrier rib, and a barrier in the central link part 500 provided between the display area AA and the pad area PA. Or it is arranged as an obstacle (barrier) structure.

In one example, the protrusion line PL is formed in a zigzag structure so that the protrusion line PL serves as a dam to prevent the alignment layer 285 from being formed up to the driving integrated circuit 300 and the pad area PA. do. Accordingly, it is possible to prevent a problem that the polyimide solution constituting the alignment layer 285 penetrates into the driving integrated circuit 300 and the pad area PA and causes stains without using a separate mask.

In more detail, when the protrusion line PL is disposed in the structure of a dam, a partition wall, or an obstacle in the central link part 500 provided between the pad areas PA, it is disposed on the upper portion of the display area AA. When the alignment layer 285 is formed, the speed of spreading to the area in which the driving integrated circuit 300 and the pad area PA are provided may be reduced. The alignment layer 285 provided in the display area AA spreads in the second direction Y. The alignment layer 285 meets the dam including the plurality of protrusion lines PL before reaching the driving integrated circuit 300 and the pad area PA. The dam formed of the plurality of protruding lines PL suppresses the flow of the alignment layer 285 . Accordingly, the alignment layer 285 does not penetrate to the driving integrated circuit 300 and the pad area PA.

The display device according to another example of the present application may be a display device that purely performs an image display function without a planarization layer and a touch link line. In such a display device, the gate line GL provided on the display area AA, the gate insulating layer 230 provided on the display area AA and the pad area PA and covering the gate line GL, and the gate insulating layer ( A data line 234 provided on the 230 may be further included. The gate line GL is formed on the same layer as the gate layer 220 using the same material, and the data line 234 is formed on the same layer as the source electrode layer 232 and the drain electrode layer 233 using the same material. do.

In this case, the plurality of data lines 234 may be provided on the gate insulating layer 230 , and the insulating layer 260 may be provided on the gate insulating layer 230 to cover the data lines 234 . In this case, the data line 234 and the insulating layer 260 form the uppermost layer. Accordingly, in a display device that purely performs an image display function without a planarization layer and a touch link line, it is possible to prevent the alignment layer from spreading by disposing the data lines 234 in a zigzag shape.

5 to 7 are enlarged views of area A of FIG. 3 according to examples of the present application. The plurality of protrusion lines PL according to examples of the present application extend between the display area AA and the pad area PA in a zigzag shape. The plurality of protrusion lines PL extend between the display area AA and the pad area PA while changing directions a plurality of times.

Each of the plurality of protruding lines PL1 , PL2 , and PL3 according to an example has a first length parallel to the straight path and a plurality of first line patterns arranged in a zigzag form along the second direction Y parallel to the straight path and a plurality of first pieces arranged in a zigzag shape along the first direction X while having a second length parallel to the first direction X intersecting the second direction Y and adjacent in the second direction Y. and a plurality of second line patterns connected to the line patterns.

The first line pattern is a straight line pattern formed in the second direction (Y). The second line pattern is a straight line pattern formed in the first direction (X) and connecting the first line pattern. The first line pattern and the second line pattern are combined to form each of the plurality of protruding lines PL1 , PL2 , and PL3 . The first line pattern and the second line pattern constituting the protrusion lines PL1 , PL2 , and PL3 are disposed at right angles. Accordingly, at least one protrusion line PL1 , PL2 , PL3 of the plurality of protrusion lines PL1 , PL2 , and PL3 of the present application is disposed while being bent at a right angle.

The first line pattern is formed in the second direction Y to connect the display area AA and the driving integrated circuit 300 . The second line pattern is formed in the first direction (X), and serves as a dam to connect the display area (AA) and the driving integrated circuit 300 and block the alignment layer 285 from penetrating in the second direction (Y). carry out

In order for the plurality of protruding lines PL1 , PL2 , and PL3 to serve as a dam to prevent the spreading of the alignment layer 285 in the second direction Y, the plurality of protruding lines PL1 , PL2 , PL3 is It is necessary to create a structure formed without gaps based on the direction (Y). When the plurality of protrusion lines PL1 , PL2 , and PL3 are not disposed on a straight path between the display area AA and the pad area PA, the alignment layer 285 may penetrate into the pad area PA.

The plurality of protruding lines PL1 , PL2 and PL3 according to examples of the present application are formed in the first direction (X) of the plurality of protruding lines PL1 , PL2 and PL3 adjacent to each other as shown in FIGS. 5 to 7 . The second line pattern is disposed without gaps when viewed in the second direction Y. In this case, the plurality of protrusion lines PL1 , PL2 , and PL3 on a straight path that is an imaginary straight line formed in the second direction Y in the central link part 500 between the display area AA and the pad area PA This is always placed.

When the plurality of protruding lines PL1 , PL2 , and PL3 are arranged without gaps when viewed from the second direction Y, it is certain that the alignment layer 285 penetrates into the pad area PA in the second direction Y. can be prevented

At least a portion of the second line pattern of the plurality of protrusion lines PL1 , PL2 , and PL3 adjacent to each other among the plurality of protrusion lines PL1 , PL2 , and PL3 may overlap at least in part based on the first direction X. . In one example, as shown in FIG. 5 , in order to overlap the protruding lines PL1 , PL2 , and PL3 with respect to the first direction X, the adjacent second line patterns move in the same direction among the first directions X. may be continuously extended. In this case, the protruding lines PL1 , PL2 , and PL3 may be formed to have a double protruding structure.

When the protruding lines PL1 , PL2 , and PL3 are formed in a double protruding structure, the adjacent second line patterns constituting the protruding lines PL1 , PL2 and PL3 are bent in one of the first directions X and then in the same direction is bent once more with Each of the double protruding structures of the protruding lines PL1 , PL2 , and PL3 is formed to overlap the straight path formed in the second direction Y a plurality of times.

As another example, as shown in FIG. 6 , each of the plurality of protrusion lines PL1 , PL2 , and PL3 may have a second line pattern formed in the same direction at least three times. In this case, each of the plurality of protrusion lines PL1 , PL2 , and PL3 may have more dams for preventing the alignment layer from spreading.

As another example, as shown in FIG. 7 , the second line pattern of the protruding lines PL1 , PL2 , PL3 adjacent to each other among the plurality of protruding lines PL1 , PL2 and PL3 overlaps at least partially in the second direction (Y). In this case, each of the protruding lines PL1 , PL2 , and PL3 may be formed in a non-identical structure. At least one protrusion line PL2 of the plurality of protrusion lines PL1 , PL2 , and PL3 has a shorter first line pattern and a longer second line pattern than a bent portion of the adjacent protruding lines PL1 and PL3 . can

The protrusion line PL2 between the protrusion lines PL1 and PL3 among the plurality of protrusion lines PL1 , PL2 and PL3 is the protrusion lines PL1 and PL3 having a first line pattern and a second line pattern on both sides of the protrusion line PL1 , PL3 . ) has an overlapping structure (OL) in the second direction (Y). To this end, the protrusion line PL2 between the protrusion lines PL1 and PL3 among the plurality of protrusion lines PL1 , PL2 , PL3 needs to have at least some of the protrusions inserted into the protrusions of the protrusion lines PL1 and PL3 . do.

In order to implement a structure in which at least some of the protrusions are inserted into the protrusions of the protrusion lines PL1 and PL3, the at least one protrusion line PL2 may have a shorter length of the first line pattern than the adjacent protrusion lines PL1 and PL3. can When the length of the first line pattern is short, at least a portion of the protrusion of the at least one protrusion line PL2 may be inserted into the protrusion of the protrusion lines PL1 and PL3 . In addition, in order to have an overlapping structure OL in the second direction Y, at least one protrusion line PL2 may have a second line pattern longer than the adjacent protrusion lines PL1 and PL3.

The display device according to the present application may prevent the alignment layer from flowing. Accordingly, the present application may prevent a problem in which the alignment layer spreads between the display area and the driving integrated circuit.

Those skilled in the art through the above-described content will be able to see that various changes and modifications are possible without departing from the technical spirit of the present invention. Accordingly, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

100: substrate 110: first substrate
130: second substrate 150: gate driving built-in circuit
AA: display area NDA: non-display area
PA: pad area P: pixel
GL: gate line DL: data line
PL: protrusion line 200: drive circuit film
300: driving integrated circuit 400: bent portion

Claims (8)

a display area provided on the substrate;
a non-display area surrounding the display area;
a pad area provided in the non-display area;
a planarization layer formed on the display area;
a plurality of touch link lines formed on the planarization layer and connecting the display area and the pad area;
an insulating layer formed on the planarization layer and covering the plurality of touch link lines; and
a central link part having a plurality of protruding lines extending in a zigzag form between the display area and the pad area;
Each of the plurality of protruding lines includes the plurality of touch link lines and the insulating layer,
at least one of the plurality of protrusion lines intersects a straight path between the display area and the pad area. The method of claim 1,
Each of the plurality of protrusion lines includes at least one protrusion protruding toward an adjacent protrusion line,
and a protrusion of each of the plurality of protrusion lines intersects the straight path. The method of claim 1,
Each of the plurality of protruding lines,
a plurality of first line patterns having a first length parallel to the linear path and arranged in a zigzag form in a second direction parallel to the linear path;
A plurality of second lines having a second length parallel to a first direction intersecting the second direction, arranged in a zigzag shape along the first direction, and connected to the plurality of first line patterns adjacent in the second direction A display device comprising a pattern. The method of claim 1,
and a plurality of touch electrodes provided in the display area. 5. The method of claim 4,
Further comprising a transistor array layer provided on the display area,
and the planarization layer covers the transistor array layer. 5. The method of claim 4,
the substrate;
a gate line provided on the display area;
a gate insulating layer provided on the display area and the pad area and covering the gate line; and
It further comprises a data line provided on the gate insulating layer,
the plurality of touch link lines are provided on the gate insulating layer together with the data lines;
the insulating layer is provided on the gate insulating layer to cover the data line;
and the data line intersects a straight path between the display area and the pad area. a first substrate including a display area and a non-display area surrounding the display area;
and a second substrate bonded to the first substrate with a liquid crystal layer interposed therebetween,
The first substrate is
a pad area provided in the non-display area;
a planarization layer formed on the display area;
a plurality of touch link lines formed on the planarization layer and connecting the display area and the pad area;
an insulating layer formed on the planarization layer and covering the plurality of touch link lines;
an alignment layer formed on the insulating layer; and
and a central link part having a plurality of protruding lines extending in a zigzag shape to prevent the alignment layer from spreading between the display area and the pad area;
Each of the plurality of protrusion lines includes the plurality of touch link lines and the insulating layer. 8. The method of claim 7,
at least one of the plurality of protrusion lines intersects a straight path between the display area and the pad area.

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