KR20190061328A - Display device - Google Patents

Abstract

The present application relates to a display device capable of preventing a defect caused by the spreading of an alignment film. According to one embodiment of the present application, the display device comprises: a display region provided on the substrate; a non-display region surrounding the display region; a pad region provided in the non-display region; and a central link part having a plurality of protruding lines extending in a zigzag form between the display region and the pad region. At least one of the plurality of protruding lines intersects a linear path between the display region and the pad region.

Description

Display device {DISPLAY DEVICE}

The present application relates to a display device.

The liquid crystal display device can be manufactured through a manufacturing process such as a cell process, a polarizer attaching process, a circuit attaching process, a cell inspecting process, a backlight assembling process, and a case assembling process. The cell process includes a thin film transistor array process, a color filter array process, a laminating process, a cutting process, and an inspection process.

In the cell process, the thin film transistor array process and the color filter array process are respectively performed on each of the first and second mother substrate divided into a plurality of panel regions for shortening the process time and improving the production yield.

The liquid crystal display device includes an alignment film for initial alignment of the liquid crystal layer, wherein the alignment film is formed on the uppermost side of the first and second mother substrate.

In recent years, in order to maximize the efficiency of the mother board and to realize a narrow bezel, the interval between the panel regions disposed on the mother board has been designed to be very narrow. As a result, when the alignment film is printed, a phenomenon that the alignment film spreads or spreads to the adjacent panel region due to the alignment error occurs. Particularly, as the alignment film spreads or spreads to a pad portion provided in an adjacent panel region, a defective alignment due to the alignment film is generated in the pad portion, and there is a problem that adhesion failure occurs between the pad portion and the circuit film.

The present application aims to provide a display device in which defects due to the spreading of the alignment film can be prevented.

A display device according to an example of the present application includes a display region provided on a substrate, a non-display region surrounding the display region, a pad region provided in the non-display region, a plurality of protruding lines extending in a staggered manner between the display region and the pad region, Wherein at least one of the plurality of protruding lines intersects a linear path between the display area and the pad area.

A display device according to another example of the present application includes a first substrate including a display region and a non-display region surrounding the display region, a second substrate bonded to the first substrate with a liquid crystal layer sandwiched therebetween, Includes a center link portion having a pad region provided in a non-display region, an alignment film formed on the display region, and a plurality of protruding lines extending in a staggered shape so as to prevent the orientation film from spreading between the display region and the pad region.

The display device according to the present application can prevent the alignment film from flowing toward the pad area, thereby preventing defects due to the spreading of the alignment film.

1 is a view for explaining a display device according to the present application.
2 is a view for explaining a touch electrode of a display device according to the present application.
3 is a view for explaining a link line portion of a display device according to the present application.
Fig. 4 is a cross-sectional view of the line I-I 'shown in Fig. 3;
5 to 7 are enlarged views of region A in Fig. 3 according to the examples of the present application.

Brief Description of the Drawings The advantages and features of the present application, and how to accomplish them, will become apparent upon reference to the following detailed description, taken in conjunction with the accompanying drawings. The present application, however, is not intended to be limited to the examples set forth herein below, but is capable of being embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these examples are provided so that this disclosure will be thorough and complete and will fully convey the concept of the invention to those skilled in the art. And is intended to provide a thorough understanding of the scope of the invention, which is defined by the scope of the claims.

The shapes, sizes, ratios, angles, numbers, and the like described in the drawings for describing the example of the present application are illustrative, and thus the present invention is not limited thereto. Like reference numerals refer to like elements throughout the specification. In the following description, well-known functions or constructions are not described in detail since they would obscure the invention in unnecessary detail.

Where the terms "comprises," "having," "consisting of," and the like are used in this specification, other portions may be added as long as "only" is not used. Unless the context clearly dictates otherwise, including the plural unless the context clearly dictates otherwise.

In interpreting the constituent elements, it is construed to include the error range even if there is no separate description.

In the case of a description of the positional relationship, for example, if the positional relationship between two parts is described as 'on', 'on top', 'under', and 'next to' Or " direct " is not used, one or more other portions may be located between the two portions.

In the case of a description of a temporal relationship, for example, if the temporal relationship is described by 'after', 'after', 'after', 'before', etc., May not be continuous unless they are not used.

The first, second, etc. are used to describe various components, but these components are not limited by these terms. These terms are used only to distinguish one component from another. Accordingly, the first component mentioned below may be the second component within the scope of the present application.

It should be understood that the term " at least one " includes all possible combinations from one or more related items. For example, the meaning of " at least one of the first item, the second item and the third item " means not only the first item, the second item or the third item, but also the second item and the second item among the first item, May refer to any combination of items that may be presented from more than one.

Each of the features of the various embodiments of the present application may be combined or combined with each other partially or entirely, technically various interlocking and driving are possible, and the examples may be independently performed with respect to each other, .

Hereinafter, an example of the present application will be described in detail with reference to the accompanying drawings.

1 is a view for explaining a display device according to the present application. Hereinafter, the case where the display device according to the present application is a liquid crystal display has been mainly described.

1, the display device according to the present application includes a display panel 100, a pad region PA, a gate driving integrated circuit 150, and a driving integrated circuit 300. [

The display panel 100 is a liquid crystal display panel that displays images by driving liquid crystal molecules. The display panel 100 includes a first substrate 110 and a second substrate 130 which are adhered to each other with a liquid crystal layer interposed therebetween. The display panel 100 displays a predetermined image using light emitted from the backlight unit.

The first substrate 110 is a thin film transistor array substrate, and includes a display region AA and a non-display region NDA. The first substrate 110 is mainly made of glass, but a transparent plastic material that can be bent or rolled can be used. For example, the first substrate 110 may be formed of a polyimide material.

The display area AA is defined as a remaining portion except the edge portion of the first substrate 110. The display area AA can be defined as an area where a pixel array for displaying an image is provided. The display area AA includes a plurality of sub-pixels P formed in a pixel region provided by a plurality of gate lines GL and a plurality of data lines DL.

The plurality of gate lines GL are provided on the first substrate 110 and extend along the first direction X of the first substrate 110 and extend at regular intervals along the second direction Y It is separated. The first direction X may be defined as a direction parallel to the longitudinal direction of the short side of the first substrate 110 and the second direction Y may be defined as a direction parallel to the longitudinal direction of the long side of the first substrate 110 have. In one example, the first direction X may be a direction parallel to the longitudinal direction of the gate line GL, and the second direction Y may be a direction parallel to the longitudinal direction of the data line DL.

The plurality of data lines DL are provided on the first substrate 110 and extend along the second direction Y of the first substrate 110 and extend at regular intervals along the first direction X It is separated.

Each of the plurality of sub-pixels P may be defined as a minimum unit area through which the actual light is transmitted. At least three adjacent sub-pixels P may constitute one unit pixel for color display. For example, one unit pixel may include adjacent red sub-pixels, green sub-pixels, and blue sub-pixels, and may further include white sub-pixels for improving brightness.

Each of the plurality of sub pixels P includes a thin film transistor TFT connected to the adjacent gate line GL and a data line DL adjacent thereto, a plurality of pixel electrodes connected to the thin film transistor TFT, And a common electrode provided. Each of the plurality of sub-pixels P displays an image according to a data voltage supplied from a data line DL adjacent to a gate signal supplied from an adjacent gate line GL.

 The non-display area NDA defines an area other than the display area AA provided on the first substrate 110. [ The non-display area NDA can be defined around the periphery of the display area AA. For example, the non-display area NDA may be defined as the left, right, top, and bottom edge portions of the first substrate 110 surrounding the display area AA. In the non-display area NDA, no image is displayed unlike the display area AA. In the non-display area NDA, the gate drive integrated circuit 150, the pad area PA, and the drive integrated circuit 300 may be disposed.

The second substrate 130 is a color filter array substrate having a size smaller than that of the first substrate 110. The second substrate 130 may be made of the same material as that of the first substrate 110, and may be made of glass or plastic. The second substrate 130 includes a black matrix, a color filter layer, and an overcoat layer.

The black matrix defines the opening regions of each of the plurality of sub-pixels P of the first substrate 110. [ The black matrix includes a non-display area NDA, gate lines GL, data lines DL, and thin film transistors TFT (not shown) of the first substrate 110 except for a plurality of opening areas overlapping each of the plurality of pixels. The first substrate 130 and the second substrate 130 are stacked on one another. The black matrix serves to prevent light leakage in the remaining regions except the plurality of aperture regions and to absorb external light.

The color filter layer is formed in each of the plurality of aperture regions defined by the black matrix and includes red, green, and blue color filters, respectively, corresponding to the colors set for the respective sub-pixels P.

The overcoat layer covers the black matrix and the color filter layer to provide a flat surface on the black matrix and the color filter layer.

The first substrate 110 and the second substrate 130 are adhered to each other with a liquid crystal layer interposed therebetween through a sealant. Accordingly, each of the plurality of sub-pixels P is arranged in parallel with each other with the liquid crystal layer interposed therebetween, so that the liquid crystal cell LC is formed between the pixel electrode and the common electrode. The liquid crystal cell LC controls light transmission according to driving of liquid crystal molecules according to an electric field formed according to a data voltage supplied to the pixel electrode through the thin film transistor TFT and a common voltage supplied to the common electrode. An alignment layer for setting a pre-tilt angle of the liquid crystal cell LC is formed between the first substrate 110 and the second substrate.

Each of the plurality of subpixels P includes a storage capacitor Cst provided in an overlapping region of the pixel electrode and the common electrode and the storage capacitor Cst is connected to the data voltage supplied to the pixel electrode and the common voltage supplied to the common electrode And when the thin film transistor TFT is turned off, supplies the stored voltage to the pixel electrode until the thin film transistor TFT is turned on again.

The pad region PA includes a plurality of pads. Each of the pads may be connected to an external driving circuit film 200 to receive various signals supplied from the driving circuit film 200, a driving power source, and a ground power source. Each pad can transmit various signals, driving power, and ground power to the driving integrated circuit 300.

The gate drive built-in circuit 150 is provided on the non-display area NDA of the first substrate 110. The gate drive integrated circuit 150 is connected to the plurality of gate lines GL one to one. The gate drive built-in circuit 150 can be integrated on the first substrate 110 by the same process as the thin film transistor (TFT). The gate driving integrated circuit 150 generates a gate signal based on a gate control signal provided from the driving integrated circuit 300 and outputs the generated gate signal in a predetermined order so that the number of the sub pixels P connected to each of the plurality of gate lines GL Thereby switching the thin film transistor (TFT). The gate drive built-in circuit 150 may be a shift register.

The driving integrated circuit 300 is provided on the non-display area NDA of the first substrate 110. [ The driving integrated circuit 300 may be mounted on a chip mounting region of the first substrate 110 through a chip bonding process performed after the substrate bonding process. The driving integrated circuit 300 may be electrically connected to the pad region PA through a plurality of signal receiving lines. The driving integrated circuit 300 may be connected to the gate driving integrated circuit 150 through a plurality of gate control signal lines.

The driving integrated circuit 300 receives driving power, ground power, timing synchronization signal, and digital image data provided from an external host system from pads provided on the pad area PA. The driving integrated circuit 300 generates a gate control signal in accordance with the timing synchronization signal and provides it to the gate driving integrated circuit 150 through the gate control signal line 310. The driving integrated circuit 300 converts the digital image data into an analog data voltage. The driving integrated circuit 300 provides a data voltage to the plurality of data lines DL through a plurality of data link lines provided in a link line portion between the chip mounting region of the first substrate 110 and the display region AA .

2 is a view for explaining a touch electrode TE of a display device according to the present application. Referring to FIG. 2, the display device according to the present application includes a plurality of touch electrodes TE.

The touch electrode TE is provided on the display area AA. The touch electrode TE is connected to the driving integrated circuit 300 through the touch link lines.

One touch electrode TE may have a size corresponding to a plurality of pixels. One touch electrode TE may be arranged in a second direction parallel to the longitudinal direction of the 40 pixels and the data lines D1 to Dm in the first direction X parallel to the longitudinal direction of the gate lines G1 to Gn Y) corresponding to 12 pixels. In this case, one touch electrode TE may have a size corresponding to 480 pixel regions. However, the present invention is not limited to this, and the size of one touch electrode TE may vary depending on the size, resolution, or touch resolution of the first substrate 110.

The touch electrode TE is provided to overlap with at least one pixel and may be defined as a touch sensor for touch sensing. For example, the touch electrode TE may include a transparent conductive material such as ITO (Indium Tin Oxide).

In the display mode, the touch electrode TE is supplied with the common voltage Vcom from the touch link line TL connected to the driving integrated circuit 300. In the touch mode, the touch electrode TE receives a touch driving signal from the touch link line TL. Accordingly, the touch electrode TE is used as a common electrode in the display mode.

3 is a view for explaining the link line unit 400 of the display device according to the present application. 3, the link line portion 400 of the display device according to the present application may include a center link portion 500 disposed at the center portion and an edge link portion disposed at both sides of the center link portion 500 .

The central link portion 500 has a plurality of protruding lines PL. A plurality of protruding lines PL according to an example may be formed by an insulating layer covering the touch link line TL.

At least one projecting line PL disposed in the center link portion 500 among the plurality of projecting lines PL according to the present application intersects with the linear path between the display region AA and the pad region PA. A linear path between the display area AA and the pad area PA defines a linear path extending in a direction parallel to the second direction Y in the display area AA. For example, at least one of the plurality of protruding lines PL extends in the second direction Y while being bent a plurality of times. At least one protruding line PL has a zigzag pattern. For example, the protruding line PL disposed at the center of the plurality of protruding lines PL may have a zigzag pattern.

The protruding line PL disposed at the edge of the link line portion 400 among the plurality of protruding lines PL extends in a direction not parallel to the first direction X or the second direction Y. [ The protruding line PL disposed adjacent to both sides of the display area AA among the plurality of protruding lines PL may extend in the diagonal direction with respect to the first direction X or the second direction Y have.

The length of the driving integrated circuit 300 in the first direction X is shorter than the length of the display area AA in the first direction X. [ The protruding lines PL disposed adjacent to both sides of the display area AA extend in the diagonal direction relative to the first direction X or the second direction Y in order to be connected to the drive integrated circuit 300 do. The oblique angles extending in the oblique direction for connecting the protruding lines PL arranged adjacent to both sides of the display area AA to the driving integrated circuit 300 are set to be equal to each other in the display area AA and the driving integrated circuit 300 The length ratio relationship in the first direction X and the arrangement relationship with the inner circuit of the panel 100, and the like.

The projecting line PL disposed on the central link portion 500 is bent in a plurality of turns and extends in the second direction Y in the second direction. When the protruding line PL disposed in the central link unit 500 extends in the second direction while being bent a plurality of times, the length of the protruded line PL disposed in the edge link unit and the length of the protruded line PL disposed in the center link unit 500 It is possible to reduce the difference in the lengths of the projecting lines PL. The protruded line PL disposed in the edge link portion extends not parallel to the second direction Y and the arranged protruded line PL disposed in the central link portion 500 is parallel to the second direction Y . When the projecting line PL disposed in the central link portion 500 is extended in the direction parallel to the second direction Y between the display area AA and the pad area PA, The length of the line PL is longer than the length of the protruding line PL disposed in the central link portion 500.

Since the plurality of protruding lines PL are all formed of the same material and the same thickness, the resistance of the protruding line PL disposed at the edge link portion is larger than the resistance of the protruding line PL disposed at the center link portion 500 do. When a deviation occurs in the resistance between the projecting lines PL depending on the arrangement position, a deviation occurs in the strength of signals supplied through the projecting line PL. In this case, there arises a problem that the brightness of an image displayed for each region of the display area AA varies or a deviation occurs in the touch sensitivity, which is a degree of recognition according to a user's touch, in each region of the display region AA.

In the present application, the projecting line PL disposed in the central link portion 500 is bent in a plurality of turns and extends in the second direction Y. In this case, the length of the protruding line PL disposed in the central link portion 500 increases, and the length of the protruding line PL disposed in the edge link portion and the length of the protruding line PL disposed in the central link portion 500 ). Accordingly, the present application can reduce the variation of the resistance of the protruding line PL depending on the arrangement position, and can reduce the variation in the intensity of the signals supplied through the protruding line PL.

Each of the plurality of protruding lines PL according to an example includes at least one protruding portion protruding toward the adjacent protruding line PL. The projection may protrude in the first direction (X). The protrusions may include protrusions or protrusions facing the adjacent protrusion lines PL.

The projection of each of the plurality of projecting lines according to an example intersects with the straight path. Each protrusion may go at least once in a straight path. Each protrusion may overlap the straight path.

A plurality of protruding lines PL according to the present application are formed with protrusions. The line in which the protruding portion is formed can prevent the layer constituting the display area AA from flowing in the second direction (Y). A plurality of protruding lines PL according to the present application can prevent protruding portions from spreading the fluidizable layer among the layers constituting the display area AA to the driving integrated circuit 300 or the pad area PA .

For example, an alignment film is formed on the display area AA. At this time, the alignment film is formed by curing polyimide having fluidity. There may occur a phenomenon that the alignment film spreads not only in the display area AA but also in the integrated driving circuit 300 and the pad area PA in a state of fluidity. In the case where the alignment film spreads to the integrated driving circuit 300 and the pad area PA, defects occur in the region where the alignment film spreads.

One example of the present application includes a central link portion 500 having a plurality of protruding lines PL extending in a staggered shape so as to prevent the spread of the alignment film between the display area AA and the pad area PA, It is possible to prevent the phenomenon from spreading to the integrated driving circuit 300 and the pad area PA and thereby causing a defective stain. That is, at least one of the plurality of protruding lines PL intersects with the linear path between the display area AA and the pad area PA. The protruding line PL which intersects with the linear path between the display area AA and the pad area PA is a line extending from the display area AA along the linear path to the integrated driving circuit 300 and the pad area PA It is possible to perform the function of the partition wall.

Fig. 4 is a cross-sectional view of the line I-I 'shown in Fig. 3; A display device according to an exemplary embodiment of the present invention includes a base layer 210, a transistor array layer (TFT), a buffer layer 240, a planarization layer 250, an insulating layer 260, a pixel electrode 270, 271, and 272, a common electrode 280, and an alignment film 285.

The base layer 210 forms the bottom of the first substrate 110. The base layer 210 may be formed of glass or plastic. The base layer 210 plays a role of supporting a transistor array layer (TFT) formed in the display area AA. The base layer 210 supports the touch link line 272 and the insulating layer 260 formed on the central link unit 500.

A transistor array layer (TFT) is formed on top of the buffer layer BUF. A transistor array layer (TFT) is provided on the display area AA. The transistor array layer (TFT) constitutes the thin film transistors constituting the sub-pixel (P). The transistor array layer (TFT) includes a gate layer 220, a gate insulating layer 230, an active layer 231, a source electrode layer 232, a drain electrode layer 233, and a buffer layer 240.

The gate layer 220 is disposed on top of the base layer 210. The gate layer 220 disposed on the upper portion of the display area AA forms the gate electrode of the thin film transistor TFT.

The gate insulating layer 230 covers the top of the gate layer 220. The gate insulating layer 230 is formed entirely on the display area AA and the central link part 500. [ The gate insulating layer 230 covers the top of the base layer 210 and the top of the gate layer 220 as a whole. The gate insulating layer 130 may be formed of a material having excellent electrical insulation properties. The gate insulating layer 130 prevents the gate layer 120 from being electrically short-circuited with the upper layers.

The active layer 231 is disposed on top of the gate insulating layer 230. The active layer 231 is disposed on a region of the display region AA where the thin film transistor is formed. The active layer 231 may be formed of a semiconductor material. As an example, the active layer 231 may be formed using a semiconductor material such as poly-Si, amorphous silicon (a-Si), or polycrystalline low temperature polysilicon (LTPS).

The source electrode layer 232 is disposed in a part of the upper part of the active layer 231. The source electrode layer 232 functions as a source electrode of the thin film transistor.

The drain electrode layer 233 is disposed on a region of the upper portion of the active layer 231 excluding the region where the source electrode layer 232 is disposed. And the drain electrode layer 233 are spaced apart from the source electrode layer 232. The drain electrode layer 233 functions as a drain electrode of the thin film transistor.

The buffer layer 240 is disposed on the gate insulating layer 230.

The planarization layer 250 covers the transistor array layer (TFT). The planarization layer 250 is disposed on top of the buffer layer 240. The planarizing layer 250 may be formed on the display area AA and the central link part 500. As an example, the planarization layer 250 may cover the entire display area AA. The planarization layer 250 is formed of a polymer organic compound such as Photo Acryl.

The planarization layer 250 reduces the level difference of the top surface of the planarization layer 250. The upper surface of the planarization layer 250 according to an exemplary embodiment may be formed flat on the basis of the bottom surface of the display device. The planarization layer 250 may remove the step of the upper layers.

An insulating layer 260 is disposed on top of the planarization layer 250. The insulating layer 260 can be formed using an inorganic oxide or an inorganic nitride. For example, the insulating layer 260 may be formed using SiO2. The insulating layer 260 functions as a passivation layer for preventing corrosion of the lower layer.

The pixel electrode 270 is disposed on the planarization layer 250 of the display area AA. The pixel electrode 270 is connected to the drain electrode layer 233 of the thin film transistor through the contact hole. The pixel electrode 270 supplies a driving voltage to each of the pixels P. [ The pixel electrode 270 may be formed of a transparent conductive layer.

The common electrode 280 is disposed on the pixel electrode 270 of the display area AA. The common electrode 280 supplies a common voltage to the plurality of pixels P. [ The common electrode 280 may function as a touch electrode in the touch mode. In this case, the connection electrode 271 can function as a touch link line. The common electrode 280 may be connected between the plurality of pixels P through the connection electrode 271.

The insulating layer 260 disposed on the display area AA is disposed between the pixel electrode 270 and the common electrode 280. [ The insulating layer 260 on the display area AA prevents the short circuit between the pixel electrode 270 and the common electrode 280. [

The touch link lines 271 and 272 are formed on the planarization layer 250. The touch link line 271 formed in the display area AA can supply a touch driving signal to the common electrode 280 in the touch mode. The touch link line 272 formed on the central link unit 500 can transmit the touch driving signal to the touch link line 271 formed in the display area AA.

An insulating layer 260 is formed on top of the touch link lines 271 and 272. The insulating layer 260 surrounds the plurality of touch link lines 271 and 272.

An orientation film 285 is formed on the top of the insulating layer 260. The alignment film 285 may be formed of polyimide. The alignment film 285 may have fluidity. The alignment film 285 sets the pretilt angle of the liquid crystal layer provided between the first and second substrates 110 and 130.

Each of the plurality of protruding lines PL according to an example of the present application includes a plurality of touch link lines 272 and an insulating layer 260. Each of the protruding lines PL may serve to transmit a touch driving signal. At the same time, the protruding line PL can block the touch link line 272 from being electrically affected, no matter what layer is formed on the upper part. Therefore, it is possible to utilize the protruding line PL to prevent the spread of the fluid material.

In one example, an insulating layer 260 is provided on the planarization layer 250 to cover the plurality of touch link lines 272. Accordingly, the insulating layer 260 can protect the touch link line 272 so that the touch link line 272 is not damaged even if an alignment film spreads on the plurality of touch link lines 272.

The touch link lines 272 and the insulating layer 260 constituting the protruding line PL are formed at the central link part 500 provided between the display area AA and the pad area PA, Or a barrier structure.

The projecting line PL is formed in a zigzag structure so that the projecting line PL serves as a dam preventing the alignment film 285 from being formed in the drive integrated circuit 300 and the pad area PA do. Thus, it is possible to prevent the problem that the polyimide solution constituting the alignment film 285 penetrates into the driving integrated circuit 300 and the pad area PA without causing any unevenness, without using a separate mask.

More specifically, when the projecting lines PL are arranged in a dam structure, a partition wall, or a barrier structure in the central link part 500 provided between the pad areas PA, The speed at which the driving integrated circuit 300 and the pad area PA are formed can be reduced when the alignment film 285 is formed. The alignment film 285 provided in the display area AA spreads in the second direction Y. [ The alignment film 285 is brought into contact with the dam composed of a plurality of protruding lines PL until reaching the driving integrated circuit 300 and the pad area PA. The dam consisting of a plurality of protruding lines PL suppresses the flow of the alignment film 285. Accordingly, the alignment film 285 can not penetrate the driving integrated circuit 300 and the pad area PA.

The display device according to another example of the present application may be a display device that does not have a planarizing film and a touch link line and performs only an image display function purely. Such a display device includes a gate line GL provided on the display area AA, a gate insulating film 230 provided on the display area AA and the pad area PA and covering the gate line GL, 230, and a data line 234 provided on the data lines 230 and 230. The gate line GL is formed using the same material in the same layer as the gate layer 220 and the data line 234 is formed in the same layer as the source electrode layer 232 and the drain electrode layer 233 using the same material do.

A plurality of data lines 234 may be provided on the gate insulating layer 230 and an insulating layer 260 may be provided on the gate insulating layer 230 to cover the data lines 234. In this case, In this case, the data line 234 and the insulating layer 260 form the uppermost layer. Therefore, in a display device having no flattening film and touch link line and performing purely an image display function, the data lines 234 can be arranged in a zigzag shape to prevent the orientation film from spreading.

5 to 7 are enlarged views of region A in Fig. 3 according to the examples of the present application. A plurality of protruding lines PL according to the examples of the present application extend in a zigzag form between the display area AA and the pad area PA. A plurality of protruding lines PL extend between the display area AA and the pad area PA while changing directions a plurality of times.

Each of the plurality of protruding lines PL1, PL2 and PL3 according to an example has a plurality of first line patterns arranged in a zigzag pattern along a second direction Y parallel to the linear path, And a plurality of second (Y) first electrodes arranged in a zigzag manner along the first direction (X) and having a second length parallel to the first direction (X) intersecting the second direction (Y) And a plurality of second line patterns connected to the line pattern.

The first line pattern is a straight line pattern formed in the second direction (Y). The second line pattern is a straight line pattern formed in the first direction X and connecting the first line pattern. The first line pattern and the second line pattern are combined to form each of the plurality of protruding lines PL1, PL2, PL3. The first line pattern and the second line pattern constituting the protruding lines PL1, PL2, PL3 are arranged at right angles. Accordingly, at least one of the plurality of protruding lines PL1, PL2, and PL3 of the present application is disposed while being bent at a right angle.

The first line pattern is formed in the second direction Y to connect the display area AA and the drive integrated circuit 300. [ The second line pattern is formed in the first direction X and serves to connect the display area AA and the drive integrated circuit 300 and to prevent the orientation film 285 from penetrating in the second direction Y .

A plurality of protruding lines PL1, PL2 and PL3 are arranged in the second direction Y in order to perform the function of the dam preventing the spreading of the alignment film 285 in the second direction Y by the plurality of protruding lines PL1, PL2, The structure formed with no clearance based on the direction (Y) should be made. The alignment film 285 can penetrate into the pad area PA when a plurality of projecting lines PL1, PL2, PL3 are not disposed in a straight line between the display area AA and the pad area PA.

The plurality of protruding lines PL1, PL2, PL3 according to the examples of the present application are formed in a first direction X of a plurality of protruding lines PL1, PL2, PL3 adjacent to each other as shown in Figs. And the second line pattern is arranged without a gap when viewed in the second direction (Y). In this case, a plurality of protruding lines PL1, PL2, PL3 are formed on a straight line that is a virtual straight line formed in the second direction Y at the central link portion 500 between the display area AA and the pad area PA. Respectively.

It is ensured that the alignment film 285 penetrates into the pad area PA in the second direction Y when the plurality of projecting lines PL1, PL2 and PL3 are arranged without gaps when viewed in the second direction Y .

The second line pattern of the plurality of protruding lines PL1, PL2, PL3 adjacent to each other among the plurality of protruding lines PL1, PL2, PL3 may overlap at least part of the first line X with respect to the first direction X . 5, in order to overlap the protruding lines PL1, PL2 and PL3 with respect to the first direction X, the adjacent second line patterns are arranged in the same direction in the first direction X Can be continuously extended. In this case, the protruding lines PL1, PL2, PL3 may be formed as a double protruding structure.

When the protruding lines PL1, PL2 and PL3 are formed in a double protruding structure, the protruding lines PL1, PL2 and PL3 are bent in one of the adjacent second line patterns X1, One more time. Each of the protruding structures of the protruding lines PL1, PL2, and PL3 is formed to overlap the straight line formed in the second direction Y a plurality of times.

As another example, as shown in FIG. 6, each of the plurality of protruding lines PL1, PL2, and PL3 may have a second line pattern formed in the same direction at least three times. In this case, each of the plurality of protruding lines PL1, PL2, PL3 can have more dams preventing the spreading of the alignment film.

As another example, the second line pattern of the protruding lines PL1, PL2, PL3 adjacent to each other among the plurality of protruding lines PL1, PL2, PL3 may overlap at least some overlap OL in the second direction Y, The projecting lines PL1, PL2, and PL3 may be formed to have the same structure. At least one protruding line PL2 of the plurality of protruding lines PL1, PL2 and PL3 is shorter than the bent portion of the adjacent protruding lines PL1 and PL3 in length and the length of the second line pattern is longer .

The protruding lines PL2 between the protruding lines PL1 and PL3 of the plurality of protruding lines PL1, PL2 and PL3 are protruding lines PL1 and PL3 having the first line pattern and the second line pattern on both sides, (OL) between the first direction Y and the second direction Y, as shown in FIG. To this end, the protruding line PL2 between the protruding lines PL1, PL3 of the plurality of protruding lines PL1, PL2, PL3 must be at least partially inserted into the protruding portion of the protruding lines PL1, PL3 do.

At least one protruding line PL2 is formed such that the length of the first line pattern is shorter than that of the adjacent protruding lines PL1 and PL3 in order to implement a structure in which protrusions are at least partially inserted into protrusions of the protruding lines PL1 and PL3 . If the length of the first line pattern is short, protrusions of at least one protruding line PL2 may be at least partially inserted into protrusions of the protruding lines PL1 and PL3. Also, in order to have a structure of overlap OL based on the second direction Y, at least one protruding line PL2 may have a longer length of the second line pattern than the adjacent protruding lines PL1 and PL3.

The display device according to the present application can prevent the orientation film from flowing. Thus, the present application can prevent the problem that the alignment film spreads between the display area and the drive integrated circuit.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit of the invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

100: substrate 110: first substrate
130: second substrate 150: gate driving integrated circuit
AA: display area NDA: non-display area
PA: pad area P: pixel
GL: gate line DL: data line
PL: protruding line 200: driving circuit film
300: drive integrated circuit 400:

Claims (8)

A display region provided on the substrate;
A non-display area surrounding the display area;
A pad region provided in the non-display region;
And a central link portion having a plurality of protruding lines extending in a zigzag shape between the display region and the pad region,
Wherein at least one of the plurality of projecting lines intersects a linear path between the display region and the pad region. The method according to claim 1,
Wherein each of the plurality of projecting lines includes at least one projecting portion projecting toward an adjacent projecting line,
And protrusions of each of the plurality of protruding lines intersect with the straight path. The method according to claim 1,
Wherein each of the plurality of protruding lines includes:
A plurality of first line patterns arranged in a staggered pattern along a second direction parallel to the straight path and having a first length parallel to the straight path;
A plurality of second lines connected to the plurality of first line patterns arranged in a staggered manner along the first direction and having a second length in parallel with the first direction intersecting the second direction, Pattern. The method according to claim 1,
A plurality of touch electrodes provided in the display region;
Further comprising a plurality of touch link lines connecting the display area and the pad area,
Wherein each of the plurality of protruding lines includes an insulating layer surrounding the plurality of touch link lines and the plurality of touch link lines. 5. The method of claim 4,
A transistor array layer provided on the display region; And
And a planarization layer covering the transistor array layer,
Wherein the plurality of touch link lines are provided on the planarization layer,
Wherein the insulating layer is provided on the planarization layer so as to cover the plurality of touch link lines. 5. The method of claim 4,
The substrate comprising:
A gate line provided on the display region;
A gate insulating film provided on the display region and the pad region and covering the gate line; And
And a data line provided on the gate insulating film,
The plurality of touch link lines are provided on the gate insulating film together with the data lines,
The insulating layer is provided on the gate insulating film so as to cover the data line,
Wherein the data line crosses a straight line path between the display area and the pad area. A first substrate including a display region and a non-display region surrounding the display region;
And a second substrate bonded to the first substrate with a liquid crystal layer interposed therebetween,
Wherein the first substrate comprises:
A pad region provided in the non-display region;
An alignment film formed on the display region; And
And a central link portion having a plurality of projecting lines extending in a zigzag shape to prevent the spreading of the alignment film between the display region and the pad region. 8. The method of claim 7,
Wherein at least one of the plurality of projecting lines intersects a linear path between the display region and the pad region.

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