JP5429776B2 - LCD panel - Google Patents

Description

The present invention relates to a liquid crystal display panel, and in particular, a light shielding layer formed on a color filter substrate so as to overlap with a thin film transistor (TFT) in a plan view is not connected to other light shielding layers. The present invention relates to an isolated liquid crystal display panel.

Liquid crystal display panels are characterized by their light weight, thinness, and low power consumption compared to CRTs (cathode ray tubes), and are therefore used in many electronic devices for display purposes. The liquid crystal display panel displays an image by changing the direction of liquid crystal molecules aligned in a predetermined direction by an electric field and changing the amount of light transmitted through the liquid crystal layer. This includes a reflective type in which external light is incident on the liquid crystal layer, reflected by the reflector, then transmitted again through the liquid crystal layer, and a transmissive type in which incident light from the backlight device is transmitted through the liquid crystal layer. And a transflective type having both properties.

As a method for applying an electric field to a liquid crystal layer of a liquid crystal display panel, there are a vertical electric field method and a horizontal electric field method. A vertical electric field type liquid crystal display panel applies a substantially vertical electric field to liquid crystal molecules by a pair of electrodes arranged with a liquid crystal layer interposed therebetween. As this vertical electric field type liquid crystal display panel, TN (Twisted Nematic) mode, VA (Vertical Alignment)
A mode, an MVA (Multi-domain Vertical Alignment) mode, and the like are known.
A horizontal electric field type liquid crystal display panel is provided with a pair of electrodes insulated from each other on one inner surface side of a pair of substrates arranged with a liquid crystal layer sandwiched therebetween. In contrast, it is applied. This horizontal electric field type liquid crystal display panel includes an IPS (In-Plane Switching) mode in which a pair of electrodes do not overlap in a plan view, and an overlapping FFS (Fringe Fie).
ld Switching) mode is known. The liquid crystal display panel of the horizontal electric field type has an effect that a wide viewing angle can be obtained.

In addition, sub-pixels partitioned by scanning lines and signal lines are arranged in a matrix on one substrate of the liquid crystal display panel, and each sub-pixel is switched to change the electric field strength applied to the liquid crystal layer. A TFT as an element is formed. When this TFT is irradiated with light, a leak current flows, so that there is a problem that normal display cannot be performed. For this reason, conventionally, a light-shielding layer is formed on the other substrate of the liquid crystal display panel, for example, a color filter substrate, for preventing the TFT from being irradiated with external light. In addition, a light-shielding layer for hiding non-display areas, a light-shielding layer for concealing display defects such as disordered orientation, and a light-shielding layer for preventing light leakage from adjacent subpixels are formed on the other substrate. The light shielding layer covering the TFT portion is formed integrally with these light shielding layers in the same process.

However, when the light shielding layer is provided in the display region, the area for forming the light shielding layer is large, so that there is a problem that the aperture ratio decreases accordingly. In addition, if a large number of light shielding layers are formed in the display area, the light shielding layer formed in the display area may be misaligned when bonding one substrate and the other substrate in the manufacturing process of the liquid crystal display panel. May protrude beyond the area that is originally desired to be shielded from light. In this case, the aperture ratio is further reduced. Therefore, as in the liquid crystal display panels disclosed in the following Patent Document 1 and Patent Document 2, a method of reducing the width of the light shielding layer or eliminating the light shielding layer of a specific portion is performed to improve the aperture ratio. It has become. At present, the technology has advanced to such an extent that even if the light blocking layer for preventing light leakage from adjacent subpixels formed between adjacent subpixels is removed, there is no problem with the specifications of the liquid crystal display panel. .
JP 2007-249100 A JP 2002-221726 A

However, when the light shielding layer for preventing light leakage from the adjacent sub-pixels is removed, the following new problems emerge. That is, when the light shielding layer for preventing light leakage from the adjacent sub-pixels is removed, the light shielding layer superimposed on the TFT in plan view is isolated in an island shape,
It will be in the state which is not connected with the light shielding layer for adjacent TFTs. As described above, when the light shielding layer superimposed on the TFT has an island shape isolated from each other, the island-shaped light shielding layer is charged by the electric field generated by the drive current flowing through the lead-out wiring in the non-display area, and the charged charge is transferred to the island. It becomes difficult to escape from the light shielding layer.

For this reason, in the liquid crystal display panel in which the light shielding layers superimposed on the TFTs are isolated from each other, the orientation of the liquid crystal molecules is disturbed and display defects (for example, black floating during white display) are likely to occur. This phenomenon occurs particularly in the case of a liquid crystal display panel of a horizontal electric field type such as an FFS mode in which no common electrode is present on the color filter substrate, or a liquid crystal display panel using a resin light-shielding layer in which charged charges are difficult to escape. easy. Conventionally, in the liquid crystal display panel having such a light-shielding layer formed in an island shape, the above-described problem could not be solved, and therefore, in at least one of the scanning line direction and the signal line direction between adjacent sub-pixels. A light shielding layer was formed and electrically connected to each other.

The present invention has been made to solve such problems of the prior art, and is formed between adjacent sub-pixels by taking an antistatic measure for island-shaped light shielding layers isolated from each other. An object of the present invention is to obtain a liquid crystal display panel having an improved aperture ratio so that the light shielding layer for preventing light leakage can be removed.

In order to achieve the above object, a liquid crystal display panel of the present invention includes a first substrate and a second substrate that are disposed to face each other with a liquid crystal layer interposed therebetween, and the first substrate has a display area and a non-display area. A formed insulating film having a through hole is provided, and the display region of the insulating film includes a plurality of signal lines and scanning lines formed in a matrix in a state of being insulated from each other, the signal line, and the signal line a thin film transistor formed in each sub-pixel which is defined by the scan lines are formed, said plurality of lead-out lines in the non-display region of the insulating film is formed, the thin film transistor in plan view on the second substrate a liquid crystal display panel where the light-shielding layer is formed at a position overlapping with the light-shielding layer of the second substrate is formed on the isolated islands to each other, said first substrate in the non-display area The pull in plan view Conductive shield layer connected to the ground potential at a position overlapping with the wiring to which is formed, with an electrostatic protection circuit in the non-display area of the first substrate, the electrostatic protection circuit is the ground potential The shield layer is electrically connected to the ground wire through the through hole. The ground wire is electrically connected to the ground wire .

In the liquid crystal display panel of the present invention, the light shielding layer of the second substrate is formed in an island shape that is isolated from each other. However, in the non-display area of the first substrate, a conductive material is provided at a position overlapping the lead wiring in a plan view. A shield layer is formed. Thereby, it is possible to suppress charging of the light shielding layer that is isolated and formed in an island shape in the vicinity of the lead wiring by the driving voltage of the lead wiring in the non-display area. Therefore, according to the liquid crystal display panel of the present invention, the aperture ratio is increased because the light-shielding layer of the second substrate is formed in an island shape isolated from each other, and in addition, the vicinity of the lead wiring in the non-display area A liquid crystal display panel in which the orientation of the liquid crystal molecules is disturbed and display defects are suppressed is obtained.

Although the shield layer can provide a certain shielding effect even in the floating state, according to the liquid crystal display panel of the present invention, since the shield layer is connected to the ground potential (earth potential), the potential of the shield layer is This stabilizes the shielding effect. The ground potential is a potential at which any liquid crystal display panel exists as a reference potential of a driver circuit for driving the liquid crystal display panel.

In the periphery of the liquid crystal display panel, wiring maintained at a ground potential electrically connected to the electrostatic protection circuit is formed, and the wiring maintained at the ground potential drives the liquid crystal display panel. Connected to the driver circuit for In the liquid crystal display panel of the present invention, the shield layer is electrically connected to the wiring maintained at the ground potential that is electrically connected to the electrostatic protection circuit. Will be connected to. Note that the electrical connection between the shield layer and the wiring maintained at the ground potential can be easily performed by forming contact holes in various insulating films on the wiring maintained at the ground potential. Therefore, according to the liquid crystal display panel of the present invention,
The electrical connection between the shield layer and the wiring maintained at the ground potential is facilitated, and the electrical resistance between the shield layer and the wiring maintained at the ground potential is reduced. It stabilizes and the shield effect appears well.

In the liquid crystal display panel of the present invention, the shield layer is preferably connected to a common wiring.

Common wiring is disposed in the periphery of the liquid crystal display panel. The common wiring is applied with a voltage serving as a reference for the voltage applied to the pair of electrodes of the liquid crystal display panel. for that reason,
In the liquid crystal display panel of the present invention, since the shield layer is electrically connected to the common wiring, the shield layer is connected to the common wiring at a short distance. Note that the electrical connection between the shield layer and the common wiring can be easily made by forming contact holes in various insulating films on the common wiring. Therefore, according to the liquid crystal display panel of the present invention, the electrical connection between the shield layer and the common wiring is facilitated, and the electrical resistance between the shield layer and the common wiring is reduced. Follows the potential of the common wiring well, and the shielding effect appears well.

Preferably, the first substrate has at least one electrode for driving the liquid crystal layer, and the shield layer is formed in the same layer as the electrode.

On the first substrate, a pixel electrode is formed in the case of a vertical electric field type liquid crystal display panel, and a pixel electrode and a common electrode are formed in the case of a horizontal electric field type liquid crystal display panel. Therefore, according to the liquid crystal display panel of the present invention, the shield layer is the same as the pixel electrode or the common electrode regardless of whether it is a vertical electric field type liquid crystal display panel or a horizontal electric field type liquid crystal display panel. Since the material can be formed in the same process, the number of manufacturing steps is not increased particularly for forming the shield layer.

The first substrate preferably includes a pair of electrodes for driving the liquid crystal layer.

In a horizontal electric field liquid crystal display panel, a pair of electrodes including a pixel electrode and a common electrode are formed on a first substrate. Therefore, the liquid crystal display panel of the present invention has an IPS mode or FFS.
The liquid crystal display panel operates in a horizontal electric field mode such as a mode. In addition, since the horizontal electric field type liquid crystal display panel is not formed with an electrode on the second substrate, the vertical electric field type liquid crystal display panel is more easily affected by the routing wiring than the vertical electric field type liquid crystal display panel. Therefore, according to the liquid crystal display panel of the present invention, the effect of the present invention due to the formation of the shield layer is particularly remarkable.

The best mode for carrying out the present invention will be described below with reference to the embodiments and drawings. However, the embodiments shown below are not intended to limit the present invention to those described herein. The present invention can be equally applied to various modifications without departing from the technical idea shown in the claims. In each drawing used for the description in this specification, each layer and each member are displayed in different scales so that each layer and each member can be recognized on the drawing. However, it is not necessarily displayed in proportion to the actual dimensions.

FIG. 1 is a schematic plan view showing an array substrate of the liquid crystal display panel of the embodiment. 2 is the same as FIG.
It is an enlarged view of II part. 3 is a cross-sectional view taken along line III-III in FIG. 4 is a cross-sectional view taken along line IV-IV in FIG. FIG. 5 is a cross-sectional view taken along line VV in FIG. FIG. 6 is a cross-sectional view corresponding to FIG. 3 of the first modification. FIG. 7 is a cross-sectional view corresponding to FIG. 3 of the second modification.

The liquid crystal display panel 10A of the present embodiment is an FFS mode horizontal electric field liquid crystal display panel. The configuration of the main part of the liquid crystal display panel 10A will be described with reference to FIGS. As shown in FIG. 1, the liquid crystal display panel 10A has a display area 30 in which an image is displayed at the center. First, the display area 30 will be described. As shown in FIGS. 2 to 4, the liquid crystal display panel 10.
A is configured such that the liquid crystal layer LC is sandwiched between the array substrate AR and the color filter substrate CF. The array substrate AR is based on a first transparent substrate 11 made of transparent insulating glass, quartz, plastic, or the like. On the first transparent substrate 11, as shown in FIG.
On the side facing C, a scanning line 12 made of a metal such as aluminum or molybdenum is extended in the X-axis direction (row direction) in FIG. A gate electrode G extends from the scanning line 12 upward in FIG.

A transparent gate insulating film 13 made of silicon nitride, silicon oxide or the like is laminated so as to cover the scanning line 12 and the gate electrode G. A semiconductor layer 14 made of amorphous silicon, polycrystalline silicon, or the like is formed on the gate insulating film 13 overlapping the gate electrode G in plan view. A plurality of signal lines 15 made of a metal such as aluminum or molybdenum are arranged on the gate insulating film 13 in the Y-axis direction (column direction) in FIG. A source electrode S extends from the signal line 15, and the source electrode S is in partial contact with the surface of the semiconductor layer 14.

Further, a drain electrode D simultaneously formed of the same material as that of the signal line 15 and the source electrode S is provided on the gate insulating film 13, and the drain electrode D is disposed in proximity to the source electrode S and the semiconductor layer 14. Partially touching. A region surrounded by the scanning lines 12 and the signal lines 15 corresponds to one sub-pixel region. For example, the three primary colors of light are R (red), G (green), and B (
Since one pixel is composed of three sub-pixels SP (blue), and one pixel is substantially square, one sub-pixel SP that divides the pixel into three equals a rectangle whose scanning line 12 is short and signal line 15 is long. It becomes. The gate electrode G, the gate insulating film 13, the semiconductor layer 14, the source electrode S, and the drain electrode D constitute a TFT serving as a switching element, and this TFT is formed in each subpixel SP.

Further, a transparent passivation film 16 made of, for example, silicon nitride or silicon oxide is laminated so as to cover the exposed portions of the signal line 15, the TFT, and the gate insulating film 13. Then, an interlayer film (flattening resin layer) 17 made of a transparent resin material such as a photoresist is laminated so as to cover the passivation film 16. A lower electrode 18 made of a transparent conductive material such as ITO (Indium Thin Oxide) or IZO (Indium Zinc Oxide) is formed so as to cover the interlayer film 17. A first contact hole 19 penetrating the interlayer film 17 and the passivation film 16 and reaching the drain electrode D is formed, and the lower electrode 18 and the drain electrode D are electrically connected through the first contact hole 19. The Therefore, in the liquid crystal display panel 10A of this embodiment, the lower electrode 18 operates as a pixel electrode.

A transparent interelectrode insulating film 20 made of, for example, silicon nitride or silicon oxide is laminated so as to cover the lower electrode 18. An upper electrode 21 made of a transparent conductive material such as ITO or IZO is formed so as to cover the interelectrode insulating film 20. As shown in FIG. 2, the upper electrode 21 has a plurality of slit-like openings (hereinafter simply referred to as “slits”) 22. The upper electrode 21 is electrically connected to the common wiring 39 through the second contact hole 43 at the periphery of the display region 30. Therefore, the liquid crystal display panel 10 of this embodiment
In A, the upper electrode 21 operates as a common electrode.

The slit 22 has, for example, an oval shape, and its longitudinal direction is inclined to the right by about 5 degrees with respect to the direction in which the scanning line 17 extends, and the slit 22 is inclined to the right by about 5 degrees. Is formed. Thus, by providing the area | region where the extension direction of a slit differs, since VT (voltage-transmittance) characteristic becomes different in each side, the difference of the color by a viewing angle can be reduced. An alignment film 23 made of, for example, polyimide is laminated so as to cover the upper electrode 21. The alignment film 23 is subjected to a liquid crystal direction alignment process (rubbing process) in parallel with the extending direction of the signal lines 15. In the liquid crystal display panel 10 </ b> A, the orientation of the liquid crystal molecules in the liquid crystal layer LC is changed by the electric field between the lower electrode 18 and the upper electrode 21 at a position corresponding to the slit 22.

The color filter substrate CF is based on a second transparent substrate 24 made of transparent insulating glass, quartz, plastic or the like. The second transparent substrate 24 is formed with a light shielding layer 25 made of an opaque resin material and a color filter layer 26 that transmits different colors of light (for example, R, G, B) for each subpixel SP. As shown in FIG. 2, the light shielding layer 25 is formed so as to overlap the TFT in plan view. In the liquid crystal display panel 10A of this embodiment, the light shielding layer 2
5 is not formed along the boundary between adjacent sub-pixels SP, and the light shielding layer 25 is formed in an island shape without being connected to the adjacent light shielding layer 25. The material of the light shielding layer 25 is
An opaque metal such as chromium may be used, but in this embodiment, a resin light-shielding layer having a peel strength higher than that of the metal is used.

A color filter layer 26 is formed in a region of the subpixel SP where the light shielding layer 25 is not formed. An overcoat layer 27 made of a transparent resin material such as a photoresist is laminated so as to cover the light shielding layer 25 and the color filter layer 26. The overcoat layer 27 flattens the level difference caused by the color filter layers 26 of different colors, and the light shielding layer 25.
Further, it is formed to block impurities flowing out from the color filter layer 26 from entering the liquid crystal layer LC. An alignment film 28 made of polyimide, for example, is formed so as to cover the overcoat layer 27. The alignment film 28 is subjected to a liquid crystal alignment process in the opposite direction to that of the alignment film 23 formed on the array substrate AR.

The array substrate AR and the color filter substrate CF thus formed are opposed to each other, and a sealant (not shown) is applied to the periphery of both substrates so that both substrates are bonded together, and liquid crystal is filled between both substrates. Thus, the liquid crystal display panel 10A according to the present embodiment is obtained. A spacer (not shown) for holding the liquid crystal layer CL at a predetermined thickness is formed on the color filter substrate CF.

With the above configuration, when a TFT is turned on and a voltage is applied between the lower electrode 18 and the upper electrode 21, an electric field is generated between the electrodes 18 and 21, and the alignment of the liquid crystal molecules in the liquid crystal layer LC is Change. As a result, the light transmittance of the liquid crystal layer LC changes and an image is displayed. Lower electrode 18
In addition, an auxiliary capacitance is formed by the upper electrode 21 and the interelectrode insulating film 20, and when the TFT is turned off, the electric field between the electrodes 18 and 21 can be held for a predetermined time.

As shown in FIG. 1, in a non-display area 31 on one short side of the array substrate 12, a first terminal area 32 to which a driver IC is bump-bonded and a second terminal area to which a flexible printed board is bump-bonded 33 is formed. Driver I arranged in the first terminal region 32
C drives the scanning lines 12 and the signal lines 15 of the liquid crystal display panel, and the second terminal region 33 is connected to an external control board via a flexible printed board (not shown).

The non-display area 31 includes peripheral circuit areas 34 adjacent to the left and right sides and the upper side of the display area 30.
Is formed. In the peripheral circuit region 34, the source routing wiring portion 35 for routing the signal line 15 formed below the display region 30 in FIG. 1 to the first terminal region 32 and the scanning line 12 from both the left and right sides of the display region 30. A gate routing wiring portion 36 that leads to the first terminal region 32 and a common wiring 39 that leads the upper electrode 21 from the upper side of the display region 30 and both the left and right sides to the first terminal region 32 are formed.

As shown in FIGS. 2 to 4, for example, three columns of dummy subpixels DSP, an electrostatic protection circuit 42, a second contact hole 43, and a third contact hole 44 are formed on the peripheral circuit region 34 side of the display region 30. Yes. For example, the dummy sub-pixel DSP partially simulates the same configuration as the sub-pixel SP, or forms an electrostatic protection circuit 42 to form protection means from static electricity that has entered from the outside. Is provided. An electrostatic protection wiring 45 which is a routing wiring of the electrostatic protection circuit 42 is formed on the gate insulating film 13 of the non-display area 31 in the same direction as the signal line 15 extending. It is connected.

As shown in FIG. 4, the common wiring 39 is formed on the gate insulating film 13 here, and is electrically connected via the upper electrode 21 formed on the interelectrode insulating film 20 and the second contact hole 43. It is connected to the. The gate lead-out wiring portion 36 is formed of two layers of a gate wiring portion 38 formed on the first transparent substrate 11 and a source wiring portion 37 formed on the gate insulating film 13. Note that the gate wiring portion 38 means a wiring portion formed simultaneously with the gate electrode G of the TFT, and the source wiring portion means a wiring portion formed simultaneously with the source electrode S of the TFT. Wiring or signal line 1 connected to
The wiring connected to 5 is not meant. Therefore, the above-described common wiring 39 is
Since it is formed on the gate insulating film 13, it corresponds to the source wiring portion 37.

As shown in FIGS. 1 to 4, a shield layer 46 made of a transparent conductive material such as ITO or IZO is formed on the interelectrode insulating film 20 so as to overlap the source routing wiring portion 35 and the gate routing wiring portion 36 in plan view. Is formed. The shield layer 46 is formed of the gate insulating film 1.
3 is electrically connected to the static electricity protection wiring 45 formed on the third contact hole 44. Therefore, the shield layer 46 is connected to the ground potential.

As described above, in the liquid crystal display panel 10A of the present embodiment, the shield layer 46 is formed so as to overlap the source lead wiring portion 35 and the gate lead wiring portion 36 in a plan view, and the shield layer 46 has a ground potential. Therefore, even if a drive current flows through these routing wirings 35 and 36 and an electric field is generated, the shading layer 25 formed in an island shape on the color filter substrate CF is less likely to be charged. Further, since the shield layer 46 is particularly connected to the ground potential, the potential of the shield layer 46 is stable.
Good antistatic effect can be obtained.

Further, since the shield layer 46 is connected to the ground potential by being electrically connected to the electrostatic protection wiring 45 of the electrostatic protection circuit 42 conventionally used via the third contact hole 44, the shield layer 46. Can be easily connected to the ground potential. Moreover, since the electrostatic protection wiring 45 is made of the same metal material as that of the source wiring portion 37, the electric resistance is small, and the shield layer 46 is connected to the ground potential at a short distance. Therefore, in the liquid crystal display panel 10A of the present embodiment, since the electrical resistance between the shield layer 46 and the electrostatic protection wiring 45 maintained at the ground potential is reduced, the shield layer 4
The potential of 6 is further stabilized, and the shielding effect appears well. In addition, since the shield layer 46 is formed in the same layer as the upper electrode 21 that drives the liquid crystal layer, the shield layer 46 can be formed in the same process as the upper electrode 21, particularly increasing the number of manufacturing steps. The shield layer 46 can be formed without this.

In order to form the shield layer 46 without increasing the number of manufacturing steps, the shield layer 46
May be formed in the same layer as the other electrodes, for example, the shield layer 46 is formed in the same layer as the lower electrode 18 as in the liquid crystal display panel 10B of the first modification shown in FIG. May be. Even if the shield layer 46 is not formed on the same layer as the other electrodes, charging of the light shielding layer 25 formed in an island shape can be suppressed, but this is not preferable because the number of manufacturing steps increases. .

Further, the shielding effect is produced even when the shield layer 46 is connected in a floating state or other than the ground potential. However, when the shield layer 46 is in a floating state, the potential of the shield layer 46 becomes indefinite, and it is preferable to be electrically connected to other potential portions. For example, the shield layer 46 may be connected to the common wiring 39 as in the liquid crystal display panel 10B of the first modification shown in FIG.

Further, like the liquid crystal display panel 10C of the second modified example shown in FIG.
Alternatively, the shield wiring 47 may be formed in the same layer, and the shield layer 46 may be connected to a predetermined potential via the shield wiring 47. With this configuration, the shield wiring 47
Is formed in the same layer as the first terminal region 32 for the driver IC and the second terminal region 33 for the flexible printed circuit formed by the gate wiring portion 38, so that the first terminal region 32 and the second terminal region can be easily formed. The shield wiring 47 can be routed to the terminal region 33.

The liquid crystal display panel 10B according to the first modification and the liquid crystal display panel 10C according to the second embodiment are substantially the same as the liquid crystal display panel 10A according to the embodiment except for the portions described above. Therefore, in FIG.6 and FIG.7, the same referential mark is attached | subjected to the component same as liquid crystal display panel 10A of embodiment shown to FIGS. 1-5, and the detailed description is abbreviate | omitted.

It is a schematic plan view which shows the array substrate of the liquid crystal display panel of embodiment. It is the elements on larger scale of FIG. 1B. It is sectional drawing of the III-III line of FIG. It is sectional drawing of the IV-IV line of FIG. It is sectional drawing of the VV line of FIG. It is sectional drawing corresponding to FIG. 3 of a 1st modification. It is sectional drawing corresponding to FIG. 3 of a 2nd modification.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10A-10C ... Liquid crystal display panel 11 ... 1st transparent substrate 12 ... Scanning line 13 ... Gate insulating film 14 ... Semiconductor layer 15 ... Signal line 16 ... Passivation film 17 ... Interlayer film (flattening resin layer) 18 ... Lower electrode 19 ... First contact hole 20 ... interelectrode insulating film 21
... Upper electrode 22 ... Slit 23 ... Alignment film 24 ... Second transparent substrate 25 ... Light shielding layer 26 ...
Color filter layer 27 ... Overcoat layer 28 ... Second alignment film 30 ... Display area 3
DESCRIPTION OF SYMBOLS 1 ... Non-display area 32 ... 1st terminal area 33 ... 2nd terminal area 34 ... Peripheral circuit area 35
... source routing wiring portion 36 ... gate routing wiring portion 37 ... source wiring portion 3
8 ... Gate wiring part 39 ... Common wiring 41 ... Common connection part 42 ... Static protection circuit
43 ... Second contact hole 44 ... Third contact hole 45 ... Static protection wiring (ground wiring) 46 ... Shield layer 47 ... Shield wiring LC ... Liquid crystal layer AR ... Array substrate CF ... Color filter substrate

Claims (4)

A first substrate and a second substrate disposed opposite to each other with a liquid crystal layer interposed therebetween;
The first substrate is provided with an insulating film having a through hole in which a display region and a non-display region are formed,
In the display region of the insulating film, a plurality of signal lines and scanning lines formed in a matrix in a state of being insulated from each other, and a thin film formed for each sub-pixel partitioned by the signal lines and the scanning lines A transistor is formed,
A plurality of routing wirings are formed in the non-display area of the insulating film ,
The second substrate is a liquid crystal display panel in which a light shielding layer is formed at a position overlapping with the thin film transistor in a plan view,
Wherein the light shielding layer of the second substrate is formed in an island shape isolated from each other,
Wherein the said non-display region of the first substrate and a conductive shield layer connected to the ground potential at a position overlapping the lead-out lines in plan view is formed,
The non-display area of the first substrate includes an electrostatic protection circuit, the electrostatic protection circuit has a ground wire electrically connected to the ground potential, and the shield layer has the through hole on the ground wire. Electrically connected through
A liquid crystal display panel characterized by that.   The liquid crystal display panel according to claim 1, wherein the shield layer is connected to a common wiring.   The liquid crystal according to claim 1, wherein the first substrate has at least one electrode for driving the liquid crystal layer, and the shield layer is formed in the same layer as the electrode. Display panel.   The liquid crystal display panel according to claim 3, wherein the first substrate has a pair of electrodes for driving the liquid crystal layer.

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