KR102391477B1 - Driving device and method for display panel and flat display device using the same - Google Patents

Abstract

The present invention relates to an apparatus and method for driving a display panel and a flat panel display using the same.
The present invention relates to a display panel driving device in which wiring for signal transmission is reduced by reducing the type of signal transmitted between a control circuit unit and a gate circuit unit, and a process for reducing and restoring the signal type to be applied to the driving device. A method of driving a display panel is provided. In addition, the present invention can provide a flat panel display in which the display area can be relatively expanded due to the further reduction of the bezel through the application of the display panel driving apparatus and method as described above.

Description

Display panel driving device and method, and flat panel display device using the same

The present invention relates to an apparatus and method for driving a display panel and a flat panel display using the same, and more particularly, to reduce a bezel by reducing line on glass (LOG) wiring between a control circuit unit and a gate circuit unit. To a display panel driving apparatus and method, and to a flat panel display device constructed using the same.

As the information society develops, the demand for a display device for displaying an image is increasing in various forms, and in recent years, a liquid crystal display (LCD) or an organic light emitting diode (OLED) display device is increasing. Various flat display devices such as

As a part of improving image quality or image display efficiency of the flat panel display, many techniques for relatively expanding the image display area by reducing the bezel have been proposed.

Accordingly, only a minimum wiring space exists in the bezel of the flat panel display to transmit signals between the control circuit unit, the data circuit unit, and the gate circuit unit and signals from them to the display panel, thereby reducing the additional bezel. It is evaluated that the design to extend the display area through the display has reached a certain limit.

Therefore, there are many difficulties in developing a new design technique for allowing the display area to be relatively enlarged by reducing the bezel.

An object of the present invention is to provide a driving device that enables the configuration of a display panel having a relatively reduced bezel by reducing the LOG wiring formed on the bezel by reducing the type of signal transmitted from the control circuit unit to the gate circuit unit. The purpose.

Another object of the present invention is to provide a method of driving a display panel including a process of reducing and restoring a signal type transmitted from a control circuit unit of the driving device to a gate circuit unit, which is applied to implement such a display panel driving device. do.

Another object of the present invention is to provide a flat panel display device designed to have a relatively reduced bezel and an expanded display area according to the display panel driving apparatus and method as described above.

As described above, in the flat panel display device, the technology for reducing the bezel is evaluated to have reached a certain limit, and thus, there is a problem in that it is difficult to relatively enlarge the display area through the additional reduction of the bezel.

Accordingly, in the display panel driving apparatus of the present invention to solve this problem, some signals transmitted from the control circuit unit to the gate circuit unit are combined and transmitted through a single LOG line, and the gate circuit unit receives the signal received from the single LOG line. It has a configuration that allows the combined signal to be separated and used again.

To this end, the present invention provides a signal synthesis circuit for synthesizing signals such as voltage gate high (VGH), voltage gate low (VGL) and gate start pulse (GSP) into a single signal in a control circuit unit of a display panel driving device. A signal separation circuit may be provided in the gate circuit unit to separate the synthesized signal corresponding thereto.

And, by providing such a configuration, in the present invention, it is possible to partially reduce the LOG wiring used for signal transmission, so a flat panel display in which the bezel is reduced and the display area is relatively enlarged, which is designed in consideration of the wiring space. It has advantages such as being able to provide the device.

According to the present invention as described above, it is possible to reduce the number of signals transmitted between the control circuit unit and the gate circuit unit of the display panel driving apparatus.

Accordingly, it is possible to reduce the number of LOG wirings used for signal transmission, and there is an effect that it is possible to further reduce the bezel that is designed in consideration of the wiring space.

Accordingly, there are various effects such as improvement of image quality and improvement of image display efficiency by providing a flat panel display with a relatively enlarged display area due to the reduction of the bezel.

1 is an explanatory diagram schematically illustrating a configuration of a flat panel display according to the related art.
FIG. 2 is an explanatory diagram showing the control circuit unit of FIG. 1 .
FIG. 3 is an explanatory diagram showing the configuration of the gate driving device of FIG. 1 .
4 is a timing diagram of various control signals applied to a display panel driving apparatus.
5 is an explanatory diagram illustrating a configuration of a display panel driving apparatus according to an exemplary embodiment.
Fig. 6 is an explanatory diagram showing the configuration of the gate circuit section of Fig. 5;
7 is a flowchart illustrating a method of driving a display panel according to an exemplary embodiment.

The above-described objects, features and advantages will be described below in detail with reference to the accompanying drawings, and accordingly, those of ordinary skill in the art to which the present invention pertains will be able to easily implement the technical idea of the present invention. In describing the present invention, if it is determined that a detailed description of a known technology related to the present invention may unnecessarily obscure the gist of the present invention, the detailed description will be omitted.

Hereinafter, preferred embodiments according to the present invention will be described in detail with reference to the accompanying drawings. In the drawings, the same reference numerals are used to indicate the same or similar components.

1 to 3 are explanatory diagrams illustrating the configuration of a flat panel display device according to the related art, a control circuit unit and a gate driving device provided therein.

First, referring to FIG. 1 , a flat panel display according to the related art includes a display panel 100 including a display area 110 and a non-display area 120 , a control circuit unit (Control PCB) 130 , and a data circuit unit ( It can be seen that the data PCB 140 and the gate circuit part (Gate PCB, 150) are included.

A data line and a gate line are formed to cross each other in the display area 110 of the display panel 100 , and a pixel area is defined by the intersection. In the case of a liquid crystal display device, each pixel region may include a liquid crystal cell, a thin film transistor (TFT), a storage capacitor, etc., and in the case of an organic light emitting diode display device, including a switch transistor, a driving transistor, etc. A plurality of transistors, a storage capacitor, an organic light emitting diode device, and the like may be provided.

The display panel 100 receives a data signal for a pixel from the data driving element 145 included in the data circuit unit 140 through each data line, and each pixel receives information corresponding to the data signal. By displaying, it functions so that image information can be displayed through the display area 110 .

Here, the gate circuit unit 150 supplies a gate signal to each gate line through the gate driving device 160 , and in synchronization with the supply of the gate signal, the data circuit unit 140 supplies the data signal to each pixel. will perform

In addition, the control circuit unit 130 supplies a power signal and a control signal to the data circuit unit 140 and the gate circuit unit 150 . Referring to FIG. 1 , it will be confirmed that the power signal and the control signal transmitted from the control circuit unit 130 to the gate circuit unit 150 are supplied through the line on glass (LOG) wiring 125 formed in the non-display area 120 , etc. can

FIG. 2 is an explanatory diagram illustrating the control circuit unit of FIG. 1 , and in particular, a diagram for explaining a function of supplying a power signal and a control signal related to the gate circuit unit 150 .

That is, the control circuit unit 130 includes a timing controller 132 for supplying various control signals to the data circuit unit 140 and the gate circuit unit 150 and a power device (Power IC) 134 for supplying power signals. ), etc., can be confirmed.

Here, as a control signal transmitted from the timing controller 132 to the gate circuit unit 150 , there are a Gate Output Enable (GOE), a Gate Shift Clock (GSC), and a Gate Start Pulse (GSP) signal, and the power device 134 . As shown in the figure, there are voltage gate high (VGH) and voltage gate low (VGL) signals as power signals transmitted from the to the gate circuit unit 150 .

The configuration of the gate driving device 160 provided in the gate circuit unit 150 for generating a gate signal using these signals is shown in more detail in FIG. 3 .

Referring to FIG. 3 , the GOE, GSP, and GSC signals transmitted from the timing controller 132 are transferred to a shift register 164 in a state in which timing control for each signal is performed through the gate control unit 162 . supply can be verified.

The shift register 164 includes a plurality of flip-flops and the like, generates sequential shift signals with respect to the GSP signal using the GSC signal, performs a logical operation with the GOE signal, and outputs the same.

The sequential output signal of the shift register 164 is supplied to a level shifter 166, which shifts each output signal to an appropriate voltage level using the VGH and VGL signals, and then buffers ( 168), the buffer 168 buffers each output signal in consideration of the load of the gate line, and then outputs a gate signal through the gate line.

Gate signals output from the buffer 168 through n gate lines are denoted as GO1 to GO(n), respectively. In addition, a timing diagram for each of the signals is shown in FIG. 4 .

That is, as can be confirmed through FIGS. 2 and 3 , the control signals (GOE, GSP, and GSC signals) and power signals (VGH and VGL signals) transferred from the control circuit unit 130 to the gate circuit unit 150 drive the gate. It is impossible to omit any one of the elements 160 because they are essential signals that are absolutely necessary to generate the gate signal.

Accordingly, as shown in FIG. 1 , further reduction of the LOG wiring 125 of at least five lines from the control circuit unit 130 formed in the non-display area 120 of the display panel 100 to the gate circuit unit 150 is practically It is impossible, and it can be seen that there are many difficulties in further reducing the bezel design optimized for the current wiring structure and the like and further expanding the display area 110 to correspond thereto.

5 is an explanatory diagram illustrating a configuration of a display panel driving apparatus according to an exemplary embodiment.

Referring to FIG. 5 , it can be seen that the display panel driving apparatus according to the exemplary embodiment includes a control circuit unit 510 and a gate circuit unit 520 , and wirings therebetween.

For reference, although it has been described above that the display panel driving apparatus additionally includes a data circuit unit in addition to the control circuit unit 510 and the gate circuit unit 520 , in the embodiment of the present invention, in consideration of convenience of explanation, etc., the data circuit unit The illustration of the drawings and the related description thereof will be omitted.

The control circuit unit 510 includes a timing controller 512 , a power device 514 , a signal synthesis circuit 516 , and the like.

The timing controller 512 outputs various control signals for the gate circuit unit 520 or the data circuit unit. As shown in the figure, in relation to the gate circuit unit 520 , a gate output enable (GOE), a gate start pulse (GSP) ) and GSC (Gate Shift Clock) signals can be output.

The power device 514 may supply a power signal to the gate circuit unit 520 or the data circuit unit, and may provide voltage gate high (VGH) and voltage gate low (VGL) signals to the gate circuit unit 520 .

The signal synthesis circuit 516 receives the GSP signal from the timing controller 512 and the VGH and VGL signals from the power device 514 and outputs a synthesized signal corresponding thereto. Hereinafter, in the present specification, a synthesized signal of the VGH, VGL, and GSP signals generated through the signal synthesis circuit 516 will be referred to as a 'Gate Pulse Signal'.

That is, in the display panel driving apparatus according to the exemplary embodiment of the present invention as shown in FIG. 5 , when a signal is transmitted from the control circuit unit 510 to the gate circuit unit 520 , the GOE and GSP output from the timing controller 512 . And instead of transmitting all five signals of the GSC signal and the VGH and VGL signals output from the power element 514 through each signal line, three signals of the GOE, GSC and gate pulse signal are transmitted through each signal line. may be configured to transmit via

In other words, in order to transmit all of the GOE, GSP and GSC signals and the VGH and VGL signals through respective signal lines, at least 5 line on glass (LOG) wirings had to be formed in the non-display area 550 such as the bezel. , according to the display panel driving apparatus according to the embodiment of the present invention as shown in FIG. 5 , it may be sufficient to form at least three LOG wirings for transmitting GOE, GSC signals, and gate pulse signals.

Accordingly, it is possible to further reduce the wiring space of the non-display area 550 in designing the display panel, and consequently, it is possible to expand the display area of the display panel, thereby providing improved image quality. It can provide advantages such as

Here, the signal synthesis circuit 516 provided in the control circuit unit 510 of the display panel driving apparatus according to the embodiment of the present invention may be configured using a level shift IC.

That is, by using the level shift element as the signal synthesis circuit 516, the GSP signal can be synthesized into a single signal shifted to the level of the VGH or VGL signal, and VGH, VGL, and GSP three signals through a single signal line Simultaneous transmission may be possible.

However, at this time, the signal synthesis circuit 516 applied to the embodiment of the present invention is not necessarily limited to only the level shift element, and if it is possible to synthesize three signals so that they can be separated in a circular manner later, any conventional method is used. It goes without saying that the signal synthesis circuit 516 may be configured according to the method.

The gate circuit unit 520 may include a gate driving device (Gate Driving IC) 530 and a signal separation circuit 540 , and a gate signal using the GOE and GSC signals and the gate pulse signal transmitted from the timing controller 512 . functions such as creating

In detail, the gate pulse signal transmitted from the signal synthesis circuit 516 may be transferred to the signal separation circuit 540 and then separated into VGH, VGL, and GSP signals again.

In addition, the gate driving device 530 generates a separation signal for the GOE and GSC signals transmitted from the timing controller 512 and the gate pulse signal transmitted from the signal separation circuit 540 , that is, VGH, VGL, and GSP signals. A gate signal may be output to correspond to the input.

Therefore, it can be easily confirmed that the signal transmitted to the gate driving device 530 includes five signals: GOE, GSP, GSC, VGH, and VGL, as a result, as described above with reference to FIGS. 1 to 3 . there is.

In other words, in the display panel driving apparatus of the present invention, some signals of the control signal and the power signal for the gate circuit unit 520 output from the control circuit unit 510 are synthesized through the signal synthesis circuit 516. is transmitted, and after the gate circuit unit 520 receives a control signal including the synthesized signal, it may be configured to use each signal through a separation process for some synthesized signals.

Here, it is natural that the signal separation circuit 540 may be configured to have a signal decoding method corresponding to the signal synthesis method of the signal synthesis circuit 516 included in the control circuit unit 510 .

Hereinafter, the configuration and operation of the gate circuit unit 520 will be described in more detail through separate drawings.

Fig. 6 is an explanatory diagram showing the configuration of the gate circuit section of Fig. 5;

Referring to FIG. 6 , a gate circuit unit 520 applied to a display panel driving apparatus according to an embodiment of the present invention includes a gate driving element 530 and a signal separation circuit 540 , and the gate driving element 530 . Again, it can be confirmed that it is configurable to include a shift register 534 , a level shifter 536 , and a buffer 538 .

The GOE and GSC signals transmitted from the timing controller 512 of the control circuit unit 510 are transmitted to the gate control unit 532 , and the gate pulse signal transmitted from the signal synthesis circuit 516 is transmitted to the signal separation circuit 540 . .

The signal separation circuit 540 may receive the gate pulse signal and separate it into VGH, VGL, and GSP signals, and transmit the GSP signal among them to the gate control unit 532 .

The gate controller 532 transfers the GOE, GSC, and GSP signals to the shift register 534 after performing timing control and the like.

That is, the GSP signal transmitted to the gate control unit 532 through the signal synthesis process through the signal synthesis circuit 516 and the signal separation process through the signal separation circuit 540, and the gate control unit ( A timing mismatch may occur between the GOE and GSC signals transferred to 532 , and the gate control unit 532 may perform a function of adjusting driving timing between them. In this case, it is natural that the driving timing of the VGH and VGL signals may be considered together in the process of timing control through the gate controller 532 .

The shift register 534 includes a plurality of flip-flops and the like, generates a sequential shift signal with respect to the GSP signal using the GSC signal, and logically operates the generated sequential shift signal with the GOE signal. function to output. A sequential shift signal output from the shift register 534 is supplied to a level shifter 536 .

Next, the level shifter 536 shifts the sequential output signal of the shift register 534 to a voltage level suitable for driving the display panel using the VGH and VGL signals, and then outputs it to the buffer 538 , and the buffer 538 . buffers each output signal in consideration of the load on the gate line, and then sequentially outputs it through the gate line. An output signal of the buffer 538 is a gate signal.

In the figure, gate signals output from the buffer 538 through n gate lines are denoted as GO1 to GO(n), respectively. In addition, the timing diagram for each of the above-described signals is shown in FIG. 4 as described above.

That is, in the display panel driving apparatus according to an embodiment of the present invention as described with reference to FIGS. 5 and 6 , some signals transmitted from the control circuit unit 510 to the gate circuit unit 520 are synthesized and transmitted, and the transmission is completed. After completion, it is possible to provide a configuration to separate and use the synthesized signal.

Accordingly, the number of line on glass (LOG) wires used in the signal transmission process can be reduced, and accordingly, a display panel and a flat panel display in which a display area and a non-display area are designed to correspond to the reduced number of LOG wires. It has the advantage that it is possible to provide, etc.

7 is a flowchart illustrating a method of driving a display panel according to an exemplary embodiment.

Referring to FIG. 7 , in the method of driving a display panel according to an embodiment of the present invention, power signals such as VGH and VGL signals are output from the power device of the control circuit unit ( S710 ), and GOE, GSP, and GSC signals are output from the timing controller. It can be confirmed that the start of the step (S720) of outputting a control signal, such as. For reference, the above signals represent at least some signals transmitted to the gate circuit unit among the signals provided from the control circuit unit, and this does not mean that the control circuit unit is configured to provide only the above signals.

As such, among the signals output from the control circuit unit, the VGH, VGL, and GSP signals are synthesized into a gate pulse signal, which is a single composite signal, through a separately provided signal synthesis circuit ( S730 ). It has been described above that a level shift device (Level Shift IC), etc. can be applied to the signal synthesis circuit as described above in the embodiment of the present invention.

After that, when the GOE, GSC signal and the gate pulse signal are transmitted to the gate circuit unit through each signal line (S740), first, the signal separation circuit of the gate circuit unit separates the gate pulse signal into VGH, VGL and GSP signals again. A process ( S750 ) may be performed.

Then, the VGH, VGL, and GSP signals separated through the above process (S750) and the GOE and GSC signals directly transferred to the gate circuit unit through the previous process (S740) are transferred to the gate driving device (S760), and the corresponding gate signal As an output (S770) is made.

In this process, in order to match the driving timing between the GOE and GSC signals transmitted directly to the gate driving element, and the GSP signals transmitted through the signal synthesis circuit and signal separation circuit, etc., the signal control operation of the gate control unit, etc. It has been previously described that this can be done.

According to the method of driving a display panel according to an exemplary embodiment of the present invention as described above, some of the signals transmitted between the control circuit unit and the gate circuit unit are composed of a composite signal, so that the signal wiring according to the decrease in the type of transmission signal is It can provide advantages such as reduction possible.

Accordingly, a reduced design of the bezel may be possible to correspond to the reduced wiring area, and as a result, it is possible to provide advantages such as being able to provide a flat panel display with an enlarged display area.

For those of ordinary skill in the art to which the present invention pertains, various substitutions, modifications and changes are possible within the scope of the present invention without departing from the technical spirit of the present invention. is not limited by

510: control circuit unit
512: timing controller
514: power element
516: signal synthesis circuit
520: gate circuit unit
530: gate driving device
532: gate control
534: shift register
536: level shifter
538: buffer
540: signal separation circuit

Claims (10)

Includes Gate Pulse Signal, which is a composite signal of VGH (Voltage Gate High), VGL (Voltage Gate Low), and GSP (Gate Start Pulse) signals, GOE (Gate Output Enable), and GSC (Gate Shift Clock) signals a control circuit unit (Control PCB) for outputting a plurality of signals;
a signal line for transmitting the gate pulse signal and the GOE and GSC signals, respectively;
a gate circuit unit (Gate PCB) receiving the GOE, GSC and gate pulse signals through the signal line and outputting a gate signal corresponding thereto;
The control circuit unit may include: a signal synthesis circuit for synthesizing the GSP signal with the VGH signal and the VGL signal as a single signal shifted to the level of the VGH signal or the VGL signal, and outputting the signal as the gate pulse signal; and a timing controller outputting the GOE signal and the GSC signal to the gate circuit unit and outputting the GSP signal to the signal synthesis circuit.
The method of claim 1,
The control circuit unit,
a power device for outputting a DC voltage signal including VGH and VGL signals (Power IC);
A display panel driving device comprising a.
The method of claim 1,
and the signal synthesis circuit includes a level shift IC.
4. The method of claim 1 or 3,
The gate circuit unit,
a signal separation circuit that receives the gate pulse signal through the signal line and separates each of the VGH, VGL, and GSP signals; and
Display including; a gate driving device that receives GOE and GSC signals transmitted through the signal line and VGH, VGL and GSP signals transmitted from the signal separation circuit and generates a corresponding gate signal; panel drive.
(a) outputting a DC voltage signal including VGH and VGL from the power device and outputting a control signal including GOE, GSP and GSC signals from a timing controller;
(b) a signal synthesis circuit receiving the VGH, VGL and GSP signals and outputting a corresponding gate pulse signal;
(c) transmitting the GOE, GSC, and gate pulse signals to a gate circuit unit through respective signal lines; and
(d) the gate circuit unit receiving the GOE, GSC and gate pulse signals and outputting a gate signal corresponding thereto;
In step (a), the timing controller outputs the GOE signal and the GSC signal to the gate circuit unit and outputs the GSP signal to the signal synthesis circuit,
In step (b), the signal synthesizing circuit synthesizes the VGH signal and the VGL signal as a single signal shifted to the level of the VGH signal or the VGL signal, and outputs the signal as the gate pulse signal. How to drive.
6. The method of claim 5,
The step (d) is,
(e) separating the gate pulse signal transmitted through the signal line into the VGH, VGL and GSP signals, respectively, by a signal separation circuit; and
(f) receiving, by the gate driving device, the GOE and GSC signals transmitted through the signal line and the VGH, VGL and GSP signals transmitted from the signal separation circuit, and outputting a corresponding gate signal; How to drive a display panel.
A flat panel display comprising: a display panel for displaying an image; and a driving device for supplying a driving signal to the display panel, the flat panel display comprising:
The driving device is
a gate circuit unit supplying a gate signal to the display panel through a gate line;
a data circuit unit supplying a data signal to the display panel through a data line to correspond to the gate signal; and
a control circuit unit for supplying a control signal to the gate circuit unit and the data circuit unit;
The control circuit unit,
a power device for outputting a DC voltage signal including VGH and VGL signals;
a timing controller for generating control signals including GOE, GSP and GSC signals; and
A signal synthesis circuit for outputting a gate pulse signal by synthesizing the GSP signal with the VGH signal and the VGL signal as a single signal shifted to the level of the VGH signal or the VGL signal; and
and the timing controller outputs the GOE signal and the GSC signal to the gate circuit unit and outputs the GSP signal to the signal synthesis circuit.
8. The method of claim 7,
The gate circuit unit,
a signal separation circuit that receives the gate pulse signal and separates each of the VGH, VGL and GSP signals; and
and a gate driving device receiving the GOE and GSC signals transmitted from the timing controller and VGH, VGL and GSP signals transmitted from the signal separation circuit and generating the gate signal corresponding thereto.
9. The method according to claim 7 or 8,
The display panel is
a display area in which an image is displayed; and
a non-display area positioned at a periphery of the display area; and
The GOE, GSC, and gate pulse signals transmitted from the control circuit unit to the gate circuit unit are transmitted through line on glass (LOG) wirings formed in the non-display area.
10. The method of claim 9,
and the signal synthesis circuit includes a level shift IC.

Images