KR102328612B1 - 호스트와 컨트롤러 간에 파티셔닝된 변환 계층 - Google Patents

호스트와 컨트롤러 간에 파티셔닝된 변환 계층 Download PDF

Info

Publication number
KR102328612B1
KR102328612B1 KR1020140105759A KR20140105759A KR102328612B1 KR 102328612 B1 KR102328612 B1 KR 102328612B1 KR 1020140105759 A KR1020140105759 A KR 1020140105759A KR 20140105759 A KR20140105759 A KR 20140105759A KR 102328612 B1 KR102328612 B1 KR 102328612B1
Authority
KR
South Korea
Prior art keywords
data
volatile memory
host
memory
read
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
KR1020140105759A
Other languages
English (en)
Korean (ko)
Other versions
KR20150020136A (ko
Inventor
얼 티 코헨
수미트 푸리
Original Assignee
엘에스아이 코포레이션
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US14/060,799 external-priority patent/US9329991B2/en
Application filed by 엘에스아이 코포레이션 filed Critical 엘에스아이 코포레이션
Publication of KR20150020136A publication Critical patent/KR20150020136A/ko
Application granted granted Critical
Publication of KR102328612B1 publication Critical patent/KR102328612B1/ko
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1076—Parity data used in redundant arrays of independent storages, e.g. in RAID systems
    • G06F11/108—Parity data distribution in semiconductor storages, e.g. in SSD
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/04—Addressing variable-length words or parts of words
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0608—Saving storage space on storage systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0638—Organizing or formatting or addressing of data
    • G06F3/064—Management of blocks
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/0292—User address space allocation, e.g. contiguous or non contiguous base addressing using tables or multilevel address translation means
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1016—Performance improvement
    • G06F2212/1024—Latency reduction
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/40—Specific encoding of data in memory or cache
    • G06F2212/401—Compressed data
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7201—Logical to physical mapping or translation of blocks or pages
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7208—Multiple device management, e.g. distributing data over multiple flash devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Quality & Reliability (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Memory System (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
KR1020140105759A 2013-08-16 2014-08-14 호스트와 컨트롤러 간에 파티셔닝된 변환 계층 Active KR102328612B1 (ko)

Applications Claiming Priority (10)

Application Number Priority Date Filing Date Title
US201361866672P 2013-08-16 2013-08-16
US61/866,672 2013-08-16
US201361873357P 2013-09-03 2013-09-03
US61/873,357 2013-09-03
US201361888681P 2013-10-09 2013-10-09
US61/888,681 2013-10-09
US201361893383P 2013-10-21 2013-10-21
US61/893,383 2013-10-21
US14/060,799 2013-10-23
US14/060,799 US9329991B2 (en) 2013-01-22 2013-10-23 Translation layer partitioned between host and controller

Publications (2)

Publication Number Publication Date
KR20150020136A KR20150020136A (ko) 2015-02-25
KR102328612B1 true KR102328612B1 (ko) 2021-11-17

Family

ID=51662491

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020140105759A Active KR102328612B1 (ko) 2013-08-16 2014-08-14 호스트와 컨트롤러 간에 파티셔닝된 변환 계층

Country Status (6)

Country Link
JP (1) JP6443794B2 (enExample)
KR (1) KR102328612B1 (enExample)
CN (1) CN104679446B (enExample)
DE (1) DE102014111670A1 (enExample)
GB (1) GB2519211A (enExample)
TW (1) TWI637262B (enExample)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016139749A1 (ja) * 2015-03-03 2016-09-09 株式会社日立製作所 計算機システム、及び、記憶制御方法
CN106101096B (zh) * 2016-06-10 2022-06-28 北京数盾信息科技有限公司 一种基于接口总线分离的高速加密模组
US10236909B2 (en) * 2017-03-31 2019-03-19 Sandisk Technologies Llc Bit-order modification for different memory areas of a storage device
US10534718B2 (en) 2017-07-31 2020-01-14 Micron Technology, Inc. Variable-size table for address translation
US10354732B2 (en) * 2017-08-30 2019-07-16 Micron Technology, Inc. NAND temperature data management
JP6785205B2 (ja) * 2017-09-21 2020-11-18 キオクシア株式会社 メモリシステムおよび制御方法
JP6785204B2 (ja) 2017-09-21 2020-11-18 キオクシア株式会社 メモリシステムおよび制御方法
FR3072476A1 (fr) * 2017-10-13 2019-04-19 Proton World International N.V. Unite logique de memoire pour memoire flash
JP6982468B2 (ja) * 2017-10-27 2021-12-17 キオクシア株式会社 メモリシステムおよび制御方法
CN107861752A (zh) * 2017-11-29 2018-03-30 英业达科技有限公司 服务器系统
US10878859B2 (en) 2017-12-20 2020-12-29 Micron Technology, Inc. Utilizing write stream attributes in storage write commands
CN108319429B (zh) * 2018-01-10 2021-02-19 北京思特奇信息技术股份有限公司 一种加快文件读取的方法及计算机设备
JP6960877B2 (ja) 2018-03-22 2021-11-05 キオクシア株式会社 メモリシステム
US11803325B2 (en) 2018-03-27 2023-10-31 Micron Technology, Inc. Specifying media type in write commands
CN109471596B (zh) * 2018-10-31 2022-03-18 北京小米移动软件有限公司 数据写入方法、装置、设备及存储介质
US11048413B2 (en) * 2019-06-12 2021-06-29 Samsung Electronics Co., Ltd. Method for reducing read ports and accelerating decompression in memory systems
US11188459B2 (en) * 2019-12-23 2021-11-30 Micron Technology, Inc. Data block switching at a memory sub-system
KR102267477B1 (ko) 2020-02-20 2021-06-22 삼성전자주식회사 스토리지 장치 및 이의 동작 방법
US11481115B2 (en) * 2020-08-17 2022-10-25 Western Digital Technologies, Inc. Host-managed hardware compression with zoned namespaces
GB2603459B (en) * 2021-01-22 2023-05-10 Advanced Risc Mach Ltd Data processing systems
CN113419678B (zh) * 2021-06-18 2024-09-06 上海盈方微电子有限公司 一种用于嵌入式系统的存储管理方法
US12388655B2 (en) 2023-07-28 2025-08-12 Arm Limited Data processing systems

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090222596A1 (en) * 2007-12-06 2009-09-03 David Flynn Apparatus, system, and method for coordinating storage requests in a multi-processor/multi-thread environment

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB9113469D0 (en) * 1991-06-21 1991-08-07 Anamartic Ltd Data storage management systems
US5943692A (en) * 1997-04-30 1999-08-24 International Business Machines Corporation Mobile client computer system with flash memory management utilizing a virtual address map and variable length data
JP3766188B2 (ja) * 1997-08-22 2006-04-12 沖電気工業株式会社 論理フォーマット変換方法およびデータ保存媒体
JP2000076117A (ja) * 1998-08-31 2000-03-14 Kano Densan Hongkong Yugenkoshi 電子機器及びその制御方法及び記憶媒体
JP2001101071A (ja) * 1999-09-29 2001-04-13 Victor Co Of Japan Ltd フラッシュ型メモリを用いたデータ記憶装置及びフラッシュ型メモリのデータ管理方法
KR100706242B1 (ko) * 2005-02-07 2007-04-11 삼성전자주식회사 메모리 시스템 및 그것의 런 단위 어드레스 매핑 테이블 구성 방법
TW200832440A (en) * 2007-01-25 2008-08-01 Genesys Logic Inc Flash memory translation layer system
JP5257444B2 (ja) * 2008-03-05 2013-08-07 日本電気株式会社 メタサーバ、及び、ファイル管理システム
US7933303B2 (en) 2009-06-17 2011-04-26 Sumitomo Electric Industries, Ltd. Group-III nitride semiconductor laser device, and method for fabricating group-III nitride semiconductor laser device
US9058047B2 (en) 2010-08-26 2015-06-16 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US9105305B2 (en) * 2010-12-01 2015-08-11 Seagate Technology Llc Dynamic higher-level redundancy mode management with independent silicon elements
JP2014507717A (ja) * 2011-01-18 2014-03-27 エルエスアイ コーポレーション より高いレベルの冗長な情報の計算
US8880839B2 (en) * 2011-04-14 2014-11-04 International Business Machines Corporation Writing adjacent tracks to a stride, based on a comparison of a destaging of tracks to a defragmentation of the stride

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090222596A1 (en) * 2007-12-06 2009-09-03 David Flynn Apparatus, system, and method for coordinating storage requests in a multi-processor/multi-thread environment

Also Published As

Publication number Publication date
TW201518944A (zh) 2015-05-16
GB201414515D0 (en) 2014-10-01
CN104679446A (zh) 2015-06-03
JP2015036982A (ja) 2015-02-23
TWI637262B (zh) 2018-10-01
GB2519211A (en) 2015-04-15
DE102014111670A1 (de) 2015-02-19
CN104679446B (zh) 2017-10-03
JP6443794B2 (ja) 2018-12-26
KR20150020136A (ko) 2015-02-25

Similar Documents

Publication Publication Date Title
KR102328612B1 (ko) 호스트와 컨트롤러 간에 파티셔닝된 변환 계층
US9329991B2 (en) Translation layer partitioned between host and controller
US11449252B2 (en) Method of writing and reading data in an NVM using Lpage identification headers
US10346312B2 (en) Variable-size flash translation layer
KR102155191B1 (ko) 비휘발성 메모리에 대한 기록들의 관리 및 그 기록들의 영역 선택
KR102307382B1 (ko) 가변 크기 플래시 변환 계층
US9448738B2 (en) Compression and formatting of data for data storage systems
US9122587B2 (en) Self recovery in a solid state drive
US8230317B2 (en) Data protection method for variable length records by utilizing high performance block storage metadata
WO2012148812A2 (en) Encrypted transport solid-state disk controller
US9141477B2 (en) Data protection for variable length records by utilizing high performance block storage metadata
GB2519629A (en) Variable-size flash translation layer

Legal Events

Date Code Title Description
PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 20140814

PG1501 Laying open of application
A201 Request for examination
PA0201 Request for examination

Patent event code: PA02012R01D

Patent event date: 20190710

Comment text: Request for Examination of Application

Patent event code: PA02011R01I

Patent event date: 20140814

Comment text: Patent Application

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

Comment text: Notification of reason for refusal

Patent event date: 20210331

Patent event code: PE09021S01D

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

Patent event code: PE07011S01D

Comment text: Decision to Grant Registration

Patent event date: 20211029

GRNT Written decision to grant
PR0701 Registration of establishment

Comment text: Registration of Establishment

Patent event date: 20211115

Patent event code: PR07011E01D

PR1002 Payment of registration fee

Payment date: 20211115

End annual number: 3

Start annual number: 1

PG1601 Publication of registration