GB2519211A - Translation layer partitioned between host and controller - Google Patents

Translation layer partitioned between host and controller Download PDF

Info

Publication number
GB2519211A
GB2519211A GB1414515.5A GB201414515A GB2519211A GB 2519211 A GB2519211 A GB 2519211A GB 201414515 A GB201414515 A GB 201414515A GB 2519211 A GB2519211 A GB 2519211A
Authority
GB
United Kingdom
Prior art keywords
nonvolatile memory
data
host
read
write data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB1414515.5A
Other languages
English (en)
Other versions
GB201414515D0 (en
Inventor
Earl T Cohen
Sumit Puri
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
LSI Corp
Original Assignee
LSI Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US14/060,799 external-priority patent/US9329991B2/en
Application filed by LSI Corp filed Critical LSI Corp
Publication of GB201414515D0 publication Critical patent/GB201414515D0/en
Publication of GB2519211A publication Critical patent/GB2519211A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • G06F12/0238Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1076Parity data used in redundant arrays of independent storages, e.g. in RAID systems
    • G06F11/108Parity data distribution in semiconductor storages, e.g. in SSD
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/04Addressing variable-length words or parts of words
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0608Saving storage space on storage systems
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0638Organizing or formatting or addressing of data
    • G06F3/064Management of blocks
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0673Single storage device
    • G06F3/0679Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/0292User address space allocation, e.g. contiguous or non contiguous base addressing using tables or multilevel address translation means
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1016Performance improvement
    • G06F2212/1024Latency reduction
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/40Specific encoding of data in memory or cache
    • G06F2212/401Compressed data
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72Details relating to flash memory management
    • G06F2212/7201Logical to physical mapping or translation of blocks or pages
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72Details relating to flash memory management
    • G06F2212/7208Multiple device management, e.g. distributing data over multiple flash devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Quality & Reliability (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Memory System (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
GB1414515.5A 2013-08-16 2014-08-15 Translation layer partitioned between host and controller Withdrawn GB2519211A (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201361866672P 2013-08-16 2013-08-16
US201361873357P 2013-09-03 2013-09-03
US201361888681P 2013-10-09 2013-10-09
US201361893383P 2013-10-21 2013-10-21
US14/060,799 US9329991B2 (en) 2013-01-22 2013-10-23 Translation layer partitioned between host and controller

Publications (2)

Publication Number Publication Date
GB201414515D0 GB201414515D0 (en) 2014-10-01
GB2519211A true GB2519211A (en) 2015-04-15

Family

ID=51662491

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1414515.5A Withdrawn GB2519211A (en) 2013-08-16 2014-08-15 Translation layer partitioned between host and controller

Country Status (6)

Country Link
JP (1) JP6443794B2 (enExample)
KR (1) KR102328612B1 (enExample)
CN (1) CN104679446B (enExample)
DE (1) DE102014111670A1 (enExample)
GB (1) GB2519211A (enExample)
TW (1) TWI637262B (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022157510A1 (en) * 2021-01-22 2022-07-28 Arm Limited Data processing systems
US12388655B2 (en) 2023-07-28 2025-08-12 Arm Limited Data processing systems

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016139749A1 (ja) * 2015-03-03 2016-09-09 株式会社日立製作所 計算機システム、及び、記憶制御方法
CN106101096B (zh) * 2016-06-10 2022-06-28 北京数盾信息科技有限公司 一种基于接口总线分离的高速加密模组
US10236909B2 (en) * 2017-03-31 2019-03-19 Sandisk Technologies Llc Bit-order modification for different memory areas of a storage device
US10534718B2 (en) 2017-07-31 2020-01-14 Micron Technology, Inc. Variable-size table for address translation
US10354732B2 (en) * 2017-08-30 2019-07-16 Micron Technology, Inc. NAND temperature data management
JP6785205B2 (ja) * 2017-09-21 2020-11-18 キオクシア株式会社 メモリシステムおよび制御方法
JP6785204B2 (ja) 2017-09-21 2020-11-18 キオクシア株式会社 メモリシステムおよび制御方法
FR3072476A1 (fr) * 2017-10-13 2019-04-19 Proton World International N.V. Unite logique de memoire pour memoire flash
JP6982468B2 (ja) * 2017-10-27 2021-12-17 キオクシア株式会社 メモリシステムおよび制御方法
CN107861752A (zh) * 2017-11-29 2018-03-30 英业达科技有限公司 服务器系统
US10878859B2 (en) 2017-12-20 2020-12-29 Micron Technology, Inc. Utilizing write stream attributes in storage write commands
CN108319429B (zh) * 2018-01-10 2021-02-19 北京思特奇信息技术股份有限公司 一种加快文件读取的方法及计算机设备
JP6960877B2 (ja) 2018-03-22 2021-11-05 キオクシア株式会社 メモリシステム
US11803325B2 (en) 2018-03-27 2023-10-31 Micron Technology, Inc. Specifying media type in write commands
CN109471596B (zh) * 2018-10-31 2022-03-18 北京小米移动软件有限公司 数据写入方法、装置、设备及存储介质
US11048413B2 (en) * 2019-06-12 2021-06-29 Samsung Electronics Co., Ltd. Method for reducing read ports and accelerating decompression in memory systems
US11188459B2 (en) * 2019-12-23 2021-11-30 Micron Technology, Inc. Data block switching at a memory sub-system
KR102267477B1 (ko) 2020-02-20 2021-06-22 삼성전자주식회사 스토리지 장치 및 이의 동작 방법
US11481115B2 (en) * 2020-08-17 2022-10-25 Western Digital Technologies, Inc. Host-managed hardware compression with zoned namespaces
CN113419678B (zh) * 2021-06-18 2024-09-06 上海盈方微电子有限公司 一种用于嵌入式系统的存储管理方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1993000635A1 (en) * 1991-06-21 1993-01-07 Anamartic Limited Data storage management systems
US5943692A (en) * 1997-04-30 1999-08-24 International Business Machines Corporation Mobile client computer system with flash memory management utilizing a virtual address map and variable length data
US20120265934A1 (en) * 2011-04-14 2012-10-18 International Business Machines Corporation Writing adjacent tracks to a stride, based on a comparison of a destaging of tracks to a defragmentation of the stride

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3766188B2 (ja) * 1997-08-22 2006-04-12 沖電気工業株式会社 論理フォーマット変換方法およびデータ保存媒体
JP2000076117A (ja) * 1998-08-31 2000-03-14 Kano Densan Hongkong Yugenkoshi 電子機器及びその制御方法及び記憶媒体
JP2001101071A (ja) * 1999-09-29 2001-04-13 Victor Co Of Japan Ltd フラッシュ型メモリを用いたデータ記憶装置及びフラッシュ型メモリのデータ管理方法
KR100706242B1 (ko) * 2005-02-07 2007-04-11 삼성전자주식회사 메모리 시스템 및 그것의 런 단위 어드레스 매핑 테이블 구성 방법
TW200832440A (en) * 2007-01-25 2008-08-01 Genesys Logic Inc Flash memory translation layer system
US7836226B2 (en) * 2007-12-06 2010-11-16 Fusion-Io, Inc. Apparatus, system, and method for coordinating storage requests in a multi-processor/multi-thread environment
JP5257444B2 (ja) * 2008-03-05 2013-08-07 日本電気株式会社 メタサーバ、及び、ファイル管理システム
US7933303B2 (en) 2009-06-17 2011-04-26 Sumitomo Electric Industries, Ltd. Group-III nitride semiconductor laser device, and method for fabricating group-III nitride semiconductor laser device
US9058047B2 (en) 2010-08-26 2015-06-16 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US9105305B2 (en) * 2010-12-01 2015-08-11 Seagate Technology Llc Dynamic higher-level redundancy mode management with independent silicon elements
JP2014507717A (ja) * 2011-01-18 2014-03-27 エルエスアイ コーポレーション より高いレベルの冗長な情報の計算

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1993000635A1 (en) * 1991-06-21 1993-01-07 Anamartic Limited Data storage management systems
US5943692A (en) * 1997-04-30 1999-08-24 International Business Machines Corporation Mobile client computer system with flash memory management utilizing a virtual address map and variable length data
US20120265934A1 (en) * 2011-04-14 2012-10-18 International Business Machines Corporation Writing adjacent tracks to a stride, based on a comparison of a destaging of tracks to a defragmentation of the stride

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022157510A1 (en) * 2021-01-22 2022-07-28 Arm Limited Data processing systems
GB2603459A (en) * 2021-01-22 2022-08-10 Advanced Risc Mach Ltd Data processing systems
GB2603459B (en) * 2021-01-22 2023-05-10 Advanced Risc Mach Ltd Data processing systems
US12388655B2 (en) 2023-07-28 2025-08-12 Arm Limited Data processing systems

Also Published As

Publication number Publication date
TW201518944A (zh) 2015-05-16
GB201414515D0 (en) 2014-10-01
CN104679446A (zh) 2015-06-03
JP2015036982A (ja) 2015-02-23
TWI637262B (zh) 2018-10-01
DE102014111670A1 (de) 2015-02-19
CN104679446B (zh) 2017-10-03
KR102328612B1 (ko) 2021-11-17
JP6443794B2 (ja) 2018-12-26
KR20150020136A (ko) 2015-02-25

Similar Documents

Publication Publication Date Title
US9329991B2 (en) Translation layer partitioned between host and controller
KR102328612B1 (ko) 호스트와 컨트롤러 간에 파티셔닝된 변환 계층
US10346312B2 (en) Variable-size flash translation layer
US11449252B2 (en) Method of writing and reading data in an NVM using Lpage identification headers
KR102155191B1 (ko) 비휘발성 메모리에 대한 기록들의 관리 및 그 기록들의 영역 선택
TWI609263B (zh) 可變大小快閃轉變層
KR101522848B1 (ko) 비휘발성 스토리지에 대한 셀프-저널링 및 계층적 일치성
TWI584125B (zh) 輸入/輸出裝置及計算主機相互運作
US9760502B2 (en) Encrypted transport solid-state disk controller
US9213633B2 (en) Flash translation layer with lower write amplification
US9122587B2 (en) Self recovery in a solid state drive
GB2519629A (en) Variable-size flash translation layer

Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)