KR102325905B9 - 실리콘 질화막 식각 조성물 및 이를 이용한 식각방법 - Google Patents

실리콘 질화막 식각 조성물 및 이를 이용한 식각방법

Info

Publication number
KR102325905B9
KR102325905B9 KR1020210093905A KR20210093905A KR102325905B9 KR 102325905 B9 KR102325905 B9 KR 102325905B9 KR 1020210093905 A KR1020210093905 A KR 1020210093905A KR 20210093905 A KR20210093905 A KR 20210093905A KR 102325905 B9 KR102325905 B9 KR 102325905B9
Authority
KR
South Korea
Prior art keywords
etching
same
silicon nitride
nitride layer
composition
Prior art date
Application number
KR1020210093905A
Other languages
English (en)
Other versions
KR102325905B1 (ko
Inventor
임상우
김태현
Original Assignee
연세대학교 산학협력단
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 연세대학교 산학협력단 filed Critical 연세대학교 산학협력단
Application granted granted Critical
Publication of KR102325905B1 publication Critical patent/KR102325905B1/ko
Publication of KR102325905B9 publication Critical patent/KR102325905B9/ko

Links

KR1020210093905A 2021-03-22 2021-07-19 실리콘 질화막 식각 조성물 및 이를 이용한 식각방법 KR102325905B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR20210036435 2021-03-22
KR1020210036435 2021-03-22

Publications (2)

Publication Number Publication Date
KR102325905B1 KR102325905B1 (ko) 2021-11-12
KR102325905B9 true KR102325905B9 (ko) 2022-04-11

Family

ID=78497382

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020210093905A KR102325905B1 (ko) 2021-03-22 2021-07-19 실리콘 질화막 식각 조성물 및 이를 이용한 식각방법

Country Status (1)

Country Link
KR (1) KR102325905B1 (ko)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20240032509A (ko) 2022-09-02 2024-03-12 주식회사 테스 기판 처리 방법

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102079042B1 (ko) * 2016-07-04 2020-02-20 오씨아이 주식회사 실리콘 기판 식각 용액
KR102240654B1 (ko) * 2017-03-28 2021-04-15 주식회사 이엔에프테크놀로지 실리콘 질화막 식각 조성물
KR101769349B1 (ko) 2017-04-06 2017-08-18 (주)제이씨아이 실리콘 질화막 식각용 조성물.
US11186771B2 (en) * 2017-06-05 2021-11-30 Versum Materials Us, Llc Etching solution for selectively removing silicon nitride during manufacture of a semiconductor device
KR20190051656A (ko) * 2017-11-07 2019-05-15 삼성전자주식회사 식각 조성물, 실리콘 질화막의 식각 방법, 및 반도체 소자의 제조 방법
JP7096800B2 (ja) * 2018-08-31 2022-07-06 花王株式会社 エッチング液

Also Published As

Publication number Publication date
KR102325905B1 (ko) 2021-11-12

Similar Documents

Publication Publication Date Title
SG11202103910PA (en) Silicon nitride etching composition and method
SG116648A1 (en) Surface protecting film for semiconductor wafer and method of protecting semiconductor wafer using the same.
EP3879011A4 (en) SIC SEMICONDUCTOR SUBSTRATE, METHOD AND DEVICE FOR MAKING IT
TW200631078A (en) A method of making a semiconductor structure for high power semiconductor devices
EP4189728A4 (en) COMPOSITIONS AND METHODS FOR SELECTIVE ETCHING OF SILICON NITRIDE LAYERS
SG10202000680TA (en) Etchant composition for silicon nitride layer
SG11202110021PA (en) Silicon nitride etching liquid composition
EP3828318A4 (en) SIC WAFER AND SIC WAFER MANUFACTURING METHOD
EP3389083A4 (en) WET ETCHING COMPOSITION FOR SUBSTRATE HAVING SiN LAYER AND Si LAYER AND WET ETCHING METHOD USING SAME
EP3979315A4 (en) HEAT-DISSIPATIVE SUBSTRATE FOR SEMICONDUCTORS AND METHOD FOR ITS MANUFACTURE
EP3970184A4 (en) METHOD FOR MEASUREMENT OF MISALIGNMENT IN TOPOGRAPHIC SEMICONDUCTOR DEVICE WAFER FABRICATION
EP3936644A4 (en) METHOD FOR MANUFACTURING AN EPITAXIAL SUBSTRATE IN SIC AND DEVICE FOR MANUFACTURING THEREOF
EP4032700A4 (en) METHOD FOR MANUFACTURING SILICON NITRIDE SUBSTRATE
EP3813127A4 (en) SEMICONDUCTOR METAL-OXIDE FIELD-EFFECT TRANSISTOR IN SILICON CARBIDE AND ITS MANUFACTURING PROCESS
EP4048751A4 (en) COMPOSITION AND POLISHING METHOD HAVING HIGH SELECTIVITY FOR SILICON NITRIDE AND POLYSILICON RATHER THAN FOR SILICON OXIDE
EP3723116A4 (en) SEMICONDUCTOR DEVICE HAVING A HIGHLY STABLE BOND LAYER AND METHOD OF MANUFACTURING FOR A DEVICE
KR102325905B9 (ko) 실리콘 질화막 식각 조성물 및 이를 이용한 식각방법
MY189253A (en) Semiconductor wafer comprising a monocrystalline group-iiia nitride layer
EP3761345A4 (en) COMPOSITION WITH SUPPRESSED ALUMINUM DAMAGE AND PROCESS FOR MANUFACTURING A SEMICONDUCTOR SUBSTRATE THEREFORE
EP3994002A4 (en) MULTI-ZONE SILICON NITRIDE WAFER HEATER ASSEMBLY HAVING A CORROSION PROTECTIVE LAYER, AND METHODS OF MAKING AND USING THE SAME
EP3944288A4 (en) SEMICONDUCTOR WAFER AND SEMICONDUCTOR DEVICE FABRICATION METHOD
EP3759732A4 (en) INTEGRATION OF GRAPHS AND BORNITRIDE HETEROSTRUCTURE DEVICE OVER A SEMICONDUCTOR LAYER
IL290312A (en) Etching method for silicon nitride and manufacturing method for semiconductor element
EP4098783A4 (en) BUFFER LAYER ON A SILICON CARBIDE SUBSTRATE AND METHOD OF FORMING A BUFFER LAYER
SG11202109342PA (en) Device and method for manufacturing group iii nitride substrate

Legal Events

Date Code Title Description
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
G170 Re-publication after modification of scope of protection [patent]