KR102296686B1 - Organic light emitting display device - Google Patents

Abstract

In the present invention, an antistatic circuit is disposed between the dummy gate line and the driving voltage supply line of the dummy pixel disposed in the dummy region of the display panel to maximize the gap between the dummy gate line and the driving voltage supply line, thereby allowing the dummy gate line and the driving voltage supply line. Even when static electricity is accumulated in the voltage supply line, it is possible to prevent the metal layers of the dummy gate line and the driving voltage supply line from being damaged when the organic light emitting display device is manufactured due to a short circuit between the dummy gate line and the driving voltage supply line.

Description

Organic light emitting display device {ORGANIC LIGHT EMITTING DISPLAY DEVICE}

The present invention relates to an organic light emitting display device, and more particularly, to an organic light emitting display device capable of preventing defects caused by static electricity.

Recently, various flat panel display devices capable of reducing weight and volume, which are disadvantages of a cathode ray tube, have been developed. Such flat panel display devices include a liquid crystal display device, a field emission display device, a plasma display panel, and an organic light emitting display device.

Among these flat panel display devices, the plasma display has been attracting attention as the most advantageous display device for a light, thin, and large screen because of its simple structure and manufacturing process, but it has disadvantages of low luminous efficiency and luminance and high power consumption. On the other hand, since the love display device uses a semiconductor process, it is difficult to make a large screen, and the power consumption is large due to the backlight unit. In addition, the liquid crystal display device has a characteristic of a large amount of light loss and a narrow viewing angle due to optical elements such as a polarizing filter, a prism sheet, and a diffusion plate.

On the other hand, the organic light emitting display device is divided into an inorganic electroluminescent display device and an organic light emitting display device according to the material of the light emitting layer. . The inorganic electroluminescent display device consumes more power than the organic electroluminescent display device and cannot obtain high luminance, and cannot emit various colors of R (Red), G (Green), and B (Blue). On the other hand, organic light emitting display devices are being actively studied because they are driven at a low DC voltage of several tens of volts, have a fast response speed, can obtain high brightness, and can emit various colors of R, G, and B. .

In general, an organic light emitting display device is a display device that electrically excites a fluorescent organic compound to emit light, and N×M organic light emitting diodes (OLEDs) arranged in a matrix are voltage driven (Voltage Programming) or current driven (Current) Programming) to express images.

A method of driving an organic light emitting display device includes a passive matrix method and an active matrix method using a thin film transistor. In the passive matrix method, the anode and the cathode are formed to be orthogonal to each other and a line is selected for driving, whereas in the active matrix method, the thin film transistor is connected to the pixel electrode and driven according to the voltage maintained by the capacitor connected to the gate electrode of the thin film transistor. .

In the active matrix organic light emitting display device as described above, static electricity having a very high magnitude may be generated due to a potential difference between a scan line and a data line during a manufacturing process. Accordingly, the organic light emitting display device includes the static electricity protection circuit to protect the pixel circuits from static electricity as described above.

1 is an equivalent circuit diagram of one pixel of a conventional organic light emitting display device.

As shown in FIG. 1 , the device of the conventional organic light emitting display device includes an organic light emitting unit (OLED), a data line (D) and a gate line (G) that cross each other to define a pixel, a switch TFT (ST), and a driving device. A TFT (DT) and a storage capacitor (Cst) are provided.

Although not shown in the drawing, the pixels of the above structure are arranged in a matrix in the display area by the data lines D and the gate lines G, and the data lines D and the gates are arranged in a dummy area outside the display area. A data driver and a gate driver for respectively applying a signal to the line G are disposed.

The switch TFT (ST) is turned on in response to the scan signal applied from the gate line (G) to apply the data voltage from the data line (D) to the gate electrode of the driving TFT (DT). The driving TFT (DT) controls the amount of current flowing through the organic light emitting diode (OLED) according to the voltage difference (Vgs) between its gate potential (Vg) and the source potential (Vs). The storage capacitor Cst maintains the gate potential of the driving TFT DT constant for one frame. The organic light emitting diode OLED has the structure shown in FIG. 1 and is connected between the drain electrode of the driving TFT DT and the ground GND.

However, the following problems occur in the organic light emitting display device having the above structure.

In general, static electricity is generated in a display device during the process or use of the display device. When such static electricity flows into the organic light emitting unit, a large voltage is applied to the cathode of the organic light emitting unit. ) to prevent the organic light emitting unit (OLED) from emitting light or from emitting light of a desired luminance. In addition, there is a problem in that the light emitting layer of the organic light emitting unit (OLED) is damaged due to an electric shock by an unexpectedly large voltage.

An object of the present invention is to provide an organic light emitting display device capable of preventing defects in signal wiring due to generation of static electricity and accumulation of static electricity.

In order to achieve the above object, an organic light emitting display device according to the present invention includes a display panel including a display area and a dummy area; a plurality of gate lines and data lines defining a plurality of pixels formed in the display area; a dummy gate line defining a plurality of dummy pixels formed in the dummy region together with the data line; a thin film transistor and an organic light emitting unit respectively formed in the pixel and the dummy pixel; a plurality of driving voltage lines for applying a current to the data line; a driving voltage supply line formed in the dummy region to which a plurality of driving voltage lines are connected; and an antistatic circuit formed in the dummy region to remove static electricity, and an antistatic circuit is disposed between the dummy gate line and the driving voltage line.

In the dummy area under the display panel, a dummy gate line, an antistatic circuit, and a driving voltage supply line are sequentially arranged from the side of the display area, and in this case, an interval between the dummy gate line and the driving voltage supply line is formed to be 290 μm or more.

A dummy gate line, an antistatic circuit, and a driving voltage supply line are sequentially disposed in the dummy region at the top of the display panel from the side of the display region. In this case, a gap between the dummy gate line and the driving voltage supply line is formed to be 440 μm or more.

In the present invention, by forming the dummy pixel in the dummy area, static electricity generated in the dummy area is prevented from flowing into the pixels in the display area, and static electricity generated in the display panel can be effectively removed by providing an antistatic circuit in the dummy area. do.

In addition, in the present invention, an antistatic circuit is provided between the dummy gate line and the driving voltage supply line formed in the dummy region to maximize the gap between the dummy gate line and the driving voltage supply line, so that static electricity is transferred to the dummy gate line and the driving voltage supply line. It is possible to prevent the metal layer from being damaged when the organic light emitting display device is manufactured due to the short circuit of the dummy gate line and the driving voltage supply line.

1 is an equivalent circuit diagram of one pixel of a conventional organic light emitting display device.
2 is an equivalent circuit diagram of an organic light emitting display device according to the present invention.
3A and 3B are partial plan views illustrating structures of lower and upper ends of an organic light emitting display panel according to the present invention;
4A and 4B are partial plan views illustrating different structures of lower and upper portions of an organic light emitting display panel;

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

2 is an equivalent circuit diagram of an organic light emitting display device according to the present invention. In fact, in the organic light emitting display device, a plurality of pixels are arranged in a matrix such as N×M, but only pixels in two adjacent columns are shown in the drawings for convenience of explanation.

As shown in FIG. 2 , the organic light emitting display device according to the present invention includes a plurality of pixels and is disposed in an active pixel area in which a plurality of pixels in which an actual image is realized and upper and lower ends of the active pixel area are formed. and a dummy pixel region in which dummy pixels are formed.

Both the active pixel area and the dummy pixel area are formed in the organic light emitting display panel. The active pixel area is formed in the display area of the display panel and the dummy pixel area is formed in the dummy area outside the display area. At this time, since the dummy pixel samples a compensation voltage for compensating for the threshold voltage deviation of the driving TFT provided in the active pixel and supplies it to the active pixel, it is possible to minimize the decrease in luminance due to the deviation of the threshold voltage, thereby preventing deterioration of image quality. be able to do Also, the dummy pixel may block static electricity from flowing into the active pixel area.

The active pixel is defined by a plurality of gate lines G1...Gn and data lines D1, D2...Dm, and the dummy pixel is a dummy gate line DG and data lines D1, D2... Dm).

A reference voltage supply line VREF to which the reference voltage Vref is supplied and a writing signal supply line WR to which the writing signal wr is supplied are formed in the dummy region of the display panel. At this time, although not shown in the drawings, the reference voltage Vref is generated from the reference voltage source.

A plurality of gate lines G1, G2..Gn are formed in the active pixel region to apply a scan signal to the active pixel, the data lines D1, D2...Dm to which the pixel voltage is supplied, and a high potential driving voltage The driving voltage lines PL1, PL2...PLm to which Vdd is supplied, and a ground GND are formed.

At this time, the driving voltage lines PL1 , PL2 ... PLm are connected to the driving voltage first and second supply lines 104a and 104b respectively formed in the dummy pixel regions at the lower and upper ends of the display panel to provide a driving voltage from the outside. (Vdd) is supplied.

In the drawing, the lower and upper ends of one driving voltage line PL1, PL2...PLm are connected to the first and second supply lines 104a and 104b, respectively, so that the driving voltage lines PL1, PL2...PLm are connected to each other. Although the driving voltage is applied through the lower and upper ends, some of the plurality of driving voltage lines PL1, PL2...PLm, for example, the odd-numbered driving voltage lines PL1, PL3... are connected to the first supply line ( 104a) and the remaining parts, for example, even-numbered driving voltage lines PL2, PL4... are connected to the second supply line 104b, and a plurality of driving voltage lines PL1, PL2... A driving voltage may be applied through

The reference voltage Vref may be determined as a voltage level between the ground GND and the driving voltage Vdd.

Switch TFTs ST1..STn, driving TFTs DT1...DTn, and storage capacitors Cst1...Cstn are formed in each of the plurality of active pixels. The gate electrode of the switch TFT (ST1..STn) is connected to the gate lines (G1, G2...Gn), the source electrode is connected to the data lines (D1, D2...Dm), and the drain electrode is connected to the driving TFT (DT1). ...DTn) is connected to the gate electrode. In addition, the source electrodes of the driving TFTs DT1...DTn are connected to the driving voltage line PL, and the drain electrodes are connected to the organic light emitting units OLED1, OLED2...OLEDn.

The switch TFTs ST1..STn are turned on in response to a scan signal applied from the gate lines G1, G2...Gn, thereby driving the data voltages from the data lines D1, D2...Dm. By applying to the gate electrodes of (DT1, DT2...DTn), the driving TFTs (DT1, DT2...DTn) are driven, and as the driving TFTs (DT1, DT2...DTn) are driven, the driving voltage line ( A current is applied to the organic light emitting units OLED1, OLED2...OLEDn through PL) to emit light. In this case, since the R, G, and B pixels are repeatedly formed in the active pixel, red (R), green (G), and blue (B) light is emitted through the organic light emitting units OLED1, OLED2...OLEDn. radiated

The storage capacitors Cst1...Cstn maintain the gate potentials of the driving TFTs DT1, DT2...DTn constant for one frame, so that red (R), green (G), and blue (B) during one frame. ) to output color light.

A first dummy switch TFT DST1 , a second dummy switch TFT DST2 , a dummy driving TFT DDT, and a dummy storage capacitor DCst are formed in each of the plurality of dummy pixels. The gate electrode of the first dummy switch TFT (DST1) is connected to the dummy gate line (DG), the source electrode is connected to the data lines (D1, D2...Dm), and the drain electrode is the gate electrode of the dummy driving TFT (DDT). is connected to In addition, the source electrode of the dummy driving TFT DDT is connected to the driving voltage line PL, and the drain electrode is connected to the dummy organic light emitting unit DOLED.

The first dummy switch TFT (DST1) is turned on in response to a scan signal applied from the dummy gate line (DG), thereby transferring the data voltages from the data lines (D1, D2...Dm) to that of the dummy driving TFT (DDT). When applied to the gate electrode, the dummy driving TFT DDT is driven, and a current is applied to the dummy organic light emitting unit DOLED through the driving voltage line PL to emit light.

The gate electrode of the second dummy switch TFT (DST2) is connected to the writing signal supply line (WR), the source electrode is connected to the reference voltage supply line (VREF), and the drain electrode is the source electrode of the first dummy switch TFT (DST1). connected to and switched in response to the writing signal wr from the writing signal supply line WR.

In addition, a plurality of antistatic circuits (ESD) are formed in the dummy area of the display panel to discharge static electricity generated on the display panel through the power line Vss to the outside, thereby preventing damage to the pattern of the display panel due to static electricity. there will be

3A and 3B are partially enlarged views respectively illustrating lower and upper dummy regions of the display panel of the organic light emitting display device of the present invention shown in FIG. 2 .

As shown in FIG. 3A , a first dummy gate line 101a , a first antistatic circuit 106a , and a first driving voltage supply line 104a are disposed in a dummy area under the display panel. A plurality of first antistatic circuits 106a are disposed in the dummy area and are connected to an external ground through a power line Vss to discharge static electricity generated in the display panel to the outside.

The first dummy gate line 101a, the first antistatic circuit 106a, and the first driving voltage supply line 104a are formed of a metal having good conductivity, such as Al or an Al alloy, and a substrate or insulating layer of the display panel. may be formed above. The first dummy gate line 101a may be made of the same metal as the gate electrode of the dummy driving TFT in the active pixel region and formed by the same process, and the driving voltage line is connected to the source electrode and the drain electrode of the dummy driving TFT in the pixel region. It can be formed by the same process from the same metal.

As shown in the drawing, in the lower panel area of the organic light emitting display device having this structure, the first dummy gate line 101a is disposed under the dummy area, and the first driving voltage line 104a is disposed under the dummy area. A first antistatic circuit 106a is disposed below the first dummy gate line 101a and between the first dummy gate line 101a and the first driving voltage supply line 104a.

Since the dummy pixel in which the pixel electrode is formed is formed on the first dummy gate line 101a, the first antistatic circuit 106a is disposed adjacent to the lower portion of the first dummy gate line 101a.

As shown in FIG. 3B , a second driving voltage supply line 104b , a second antistatic circuit 106a , and a second dummy gate line 101b are disposed in the dummy area at the upper end of the display panel. A plurality of second antistatic circuits 106b are disposed in the dummy region, and are connected to an external ground through a power line Vss to discharge static electricity generated in the display panel to the outside.

As shown in the figure, at the upper end of the panel region of the organic light emitting display device having this structure, a second driving voltage supply line 104b is formed on the upper portion of the dummy region, and the second dummy gate line 101b is formed on the lower portion of the dummy region. and a second antistatic circuit 106b is disposed between the second dummy gate line 101b and the second driving voltage supply line 104b.

Since the dummy pixel in which the pixel electrode is formed is formed on the second dummy gate line 101b, the second dummy gate line 101b is provided below the second antistatic circuit 106b at a predetermined interval (in accordance with the size of the dummy pixel). corresponding spacing).

3A and 3B, in the present invention, a first dummy gate line 101a, a first antistatic circuit 106a, and a first driving voltage supply line 104a are sequentially arranged in a dummy area under the display panel. A second driving voltage supply line 104b, a second antistatic circuit 106a, and a second dummy gate line 101b are disposed in the dummy area at the upper end of the display panel, because the first dummy gate line 101a ) and the first driving voltage supply line 104a and between the second driving voltage supply line 104b and the second dummy gate line 101b are maximized so that the electric charge is charged during the manufacturing process of the organic light emitting display device. This is to prevent defects from occurring due to static electricity, and this will be described in more detail.

a first dummy gate line 101a , a first antistatic circuit 106a , a first driving voltage supply line 104a , a second driving voltage supply line 104b respectively disposed in the dummy regions of the lower and upper portions of the display panel; The second antistatic circuit 106a and the second dummy gate line 101b may be disposed in various shapes.

For example, as shown in FIG. 4A , the first dummy gate line 101a, the first driving voltage supply line 104a, and the first antistatic circuit 106a are arranged in the order of the dummy area under the display panel. In this case, the first dummy gate line 101a and the first driving voltage supply line 104a are disposed adjacent to each other with an interval a2 of about 50 μm or less.

When manufacturing an organic light emitting display device, electric charges due to static electricity are accumulated during the process in the first dummy gate line 101a and the first driving voltage supply line 104a made of a metal layer having good conductivity. Since an electric shock such as a short circuit is generated between the first dummy gate line 101a and the first driving voltage supply line 104a, when the first dummy gate line 101a and the first driving voltage supply line 104a are formed As a cause of damage to the metal layer, problems such as disconnection of the first dummy gate line 101a and the first driving voltage supply line 104a occur.

Furthermore, in recent years, as large-area, high-resolution, and thin-bezel organic light emitting display devices are manufactured, the area of the dummy region is further reduced while more metal layers must be formed in the dummy region, so that the first dummy gate line 101a and The gap between the first driving voltage supply lines 104a is further narrowed, so that damage to the metal layer due to charge accumulation becomes more severe.

In addition, as shown in FIG. 4B , when the second antistatic circuit 106b, the second driving voltage supply line 104b, and the second dummy gate line 101b are sequentially disposed in the dummy area at the top of the display panel , since the dummy pixel DP is disposed between the second driving voltage supply line 104b and the second dummy gate line 101b, the second driving voltage supply line 104b and the second dummy gate line 101b are approximately They are disposed adjacent to each other with an interval b2 of 200 μm or less. This gap b2 is, of course, larger than the gap a2 between the first dummy gate line 101a and the first driving voltage supply line 104a disposed in the upper dummy region, but the first dummy gate line 101a and Like the first driving voltage supply line 104a, the second driving voltage supply line 104b and the second dummy gate line 101b also cause damage to the metal layer due to charge accumulation during the manufacturing process.

However, in the present invention, as shown in FIG. 3A , the first dummy gate line 101a, the first antistatic circuit 106a, and the first driving voltage supply line 104a are sequentially arranged in the dummy area under the display panel. Since the first antistatic circuit 106a is disposed between the first dummy gate line 101a and the first driving voltage supply line 104a, the first dummy gate line 101a and the first driving voltage are supplied. The spacing a1 between the lines 104a is increased by the first antistatic circuit 106a, so that the spacing a1 becomes 290 mu m or more. Therefore, even when static electricity is charged in the first dummy gate line 101a and the first driving voltage supply line 104a, the gap a1 between the first dummy gate line 101a and the first driving voltage supply line 104a is Since the distance is sufficiently far from each other, a defect due to an electrical short circuit or the like does not occur between the first dummy gate line 101a and the first driving voltage supply line 104a.

Also, in the dummy region at the top of the display panel shown in FIG. 3B , the second driving voltage supply line 104b, the second antistatic circuit 106a, and the second dummy gate line 101b are sequentially multiplied. A second antistatic circuit 106a is disposed between the driving voltage supply line 104b and the second dummy gate line 101b.

Accordingly, the gap b1 between the second driving voltage supply line 104b and the second dummy gate line 101b is increased by the second antistatic circuit 106a to be 440 μm or more, and as a result, the second Even when static electricity is charged in the driving voltage supply line 104b and the second dummy gate line 101b, the distance b1 between the second driving voltage supply line 104b and the second dummy gate line 101b is sufficiently far. , a defect due to an electrical short circuit between the second driving voltage supply line 104b and the second dummy gate line 101b does not occur.

As described above, in the present invention, the dummy gate line and the driving voltage line are arranged so that the distance between the dummy gate line and the driving voltage line is maximized by arranging the dummy gate line, the driving voltage line, and the antistatic circuit arranged in the dummy region of the display panel. It is possible to prevent defects caused by static electricity accumulated in the line.

On the other hand, although the drawings and the above detailed description describe the structure of the present invention by characterizing it as a specific structure, the present invention is not limited to the liquid crystal display device having such a structure. In addition, although many matters are specifically described in the above description, this should be construed as an illustration of a preferred embodiment rather than limiting the scope of the invention. Therefore, the invention should not be defined by the described embodiments, but should be defined by the claims and equivalents to the claims.

101a, 101b: dummy gate lines 104a, 104b: driving voltage supply line
106a, 106b: anti-static circuit

Claims (7)

a display panel comprising a display area and a dummy area;
a plurality of gate lines and a plurality of data lines defining a plurality of pixels formed in the display area;
a dummy gate line defining a plurality of dummy pixels formed in the dummy region together with the plurality of data lines;
a thin film transistor and an organic light emitting unit respectively formed in the plurality of pixels and the plurality of dummy pixels;
a plurality of driving voltage lines for applying a current to the organic light emitting unit;
a driving voltage supply line formed in the dummy region and transmitting a driving voltage to the plurality of driving voltage lines; and
It is formed in the dummy area and consists of an antistatic circuit that removes static electricity,
the antistatic circuit is disposed between the dummy gate line and the driving voltage supply line;
a scan signal is sequentially applied to the dummy gate line and the plurality of gate lines;
and the antistatic circuit is separated from the dummy gate line. The organic electroluminescence light emitting device of claim 1 , wherein the dummy gate line, the antistatic circuit, and the driving voltage supply line are sequentially arranged from the display area side in a dummy area under the display panel among the dummy areas. display element. The organic light emitting display device according to claim 2, wherein an interval between the dummy gate line and the driving voltage supply line is 290 μm or more. The organic electroluminescence light emitting device of claim 1 , wherein the dummy gate line, the antistatic circuit, and the driving voltage supply line are sequentially arranged from the display area side in a dummy area at an upper end of the display panel among the dummy areas. display element. The organic light emitting display device of claim 4 , wherein the plurality of dummy pixels are disposed between the dummy gate line and the antistatic circuit. The organic light emitting display device according to claim 5, wherein a distance between the dummy gate line and the driving voltage supply line is 440 μm or more. The organic light emitting display device of claim 1 , wherein the plurality of dummy pixels samples a compensation voltage for compensating for a threshold voltage deviation of the thin film transistors of the plurality of pixels and supplies the sampling voltage to the plurality of pixels.

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