KR102179063B1 - SoC test apparatus calculating signal line length - Google Patents

Abstract

The present invention provides a system on chip (SoC) test device, which comprises a signal connection switching control unit and a signal line length calculation unit. The SoC test device can be utilized in an SoC test automatically calculating a physical signal line length for each of a hi-fix board, a probe interface board (PIB), a probe card, and the SoC connected to the SoC test device by using location information of generated reflection waves, so as to promote the speed and accuracy of the test.

Description

SoC test apparatus calculating signal line length

This document relates to a SoC test apparatus, and relates to a technology that increases test speed and accuracy by calculating signal line lengths of loads in an SoC test apparatus using reflected waves.

As the current SoC technology advances, it becomes important to test more accurately and quickly.

SoC (System on Chip) refers to a device with a system and a product that can be fully driven on a single chip. It is composed of a memory unit and a processing unit that controls and processes digital and analog signals, and system technology and semiconductor technologies are fused. It is the crystallization of integrated and integrated IT core technology. Types of SoC include Power Management Integrated Circuit (PMIC), Application Processor (AP), Display Driver Integrated Circuit (DDI), Power IC, and CMOS Image Sensor (CIS).

To test the SoC, connect the connecting loads such as Hi-Fix board, PIB (Probe Interface Board), and probe card sequentially between the SoC test device and the SoC, and connect these loads. It transmits a test signal to the SoC and receives performance information. In the SoC test apparatus, transmission of a test signal is performed through a driver and reception of a test signal is performed through a comparator. In this case, each time the type of SoC (DUT, Device Under Test) is different, the specification of the Hi-Fix board, PIB (Probe Interface Board), or probe card also changes. The different specifications imply that the length of the signal line is different, so the propagation delay time is inevitably different. Therefore, the manufacturer of the SoC test device individually obtains information about the physical signal line length from each manufacturer of the Hi-Fix board, PIB, and probe card whenever the type of SoC changes. Therefore, it has to be newly input and stored in the SoC test device, and the hassle of notifying this information to the user of the SoC test device not only decreases the speed of the test work, but also results in a good or bad decision, that is, an inaccuracy of the test. There is this. These problems increase proportionally as the number of channels applied by the SoC test apparatus increases.

Korean Patent Publication (Registration Publication No.: 10-1548288, "Wire Diagnosis System Using Reflected Wave Measurements") uses a plurality of reflected wave measuring devices to calculate the distance to the point where the defect occurs, and the defect of the wiring line with branched lines As a technology to determine the signal connection switching control, a Hi-Fix board, a PIB (Probe Interface Board) probe card, a SoC test technology that calculates the signal line length of each SoC is not disclosed. not.

The present invention relates to an SoC test apparatus, and an object thereof is to automatically calculate the physical signal line length of loads using reflected wave information.

SoC test apparatus for testing SoC according to an aspect to achieve this purpose,

A signal connection provided in the signal transmission unit to selectively switch and control the signal connection between the SoC test device and the high-fix board, the signal connection between the high-fix board and the PIB, the signal connection between the PIB and the probe card, or the signal connection between the probe card and SoC. A switching control unit, and

It is provided in the signal receiver and determines the delay time difference between the transmitted signal generated by the reflected wave and the received signal generated by the reflected wave to calculate the length of at least one signal line among the high-fix board, PIB, probe card, and SoC. It includes a signal line length calculation unit.

The present invention automatically determines the physical signal line length for each of the Hi-Fix board, PIB (Probe Interface Board), probe card, and SoC (System on Chip) connected to the SoC test device. By making the calculations available for SoC testing, the speed and accuracy of the test can be promoted, and the verification of the signal line length can be performed accurately and quickly.

1 is a diagram illustrating an SoC test system according to an embodiment.
2 is a diagram showing a transmission output waveform of the SoC test apparatus of FIG. 1.
3 is a diagram showing a waveform in which a transmission output waveform and a reception output waveform of the SoC test apparatus of FIG. 1 are superimposed.

Hereinafter, the present invention will be described in detail so that those skilled in the art can easily understand and reproduce the present invention through preferred embodiments described with reference to the accompanying drawings. In describing the present invention, when it is determined that a detailed description of a related known function or configuration may unnecessarily obscure the subject matter of the embodiments of the present invention, the detailed description will be omitted. Terms used throughout the specification of the present invention are terms defined in consideration of functions in the embodiments of the present invention, and can be sufficiently modified according to the intention and custom of the user or operator. It should be made based on the contents of

In addition, the above-described and additional aspects of the invention will become apparent through the following embodiments. Aspects or configurations of the embodiments described selectively in the present specification may be freely combined with each other, even if they are shown as a single unified configuration in the drawings, unless otherwise stated, unless otherwise indicated in technical contradiction to those skilled in the art. I understand.

Accordingly, the embodiments described in the present specification and the configurations shown in the drawings are only the most preferred embodiment of the present invention, and do not represent all the technical spirit of the present invention, and thus various alternatives that can be substituted for them at the time of application It should be understood that there may be equivalents and variations.

1 is a diagram illustrating an SoC test system according to an embodiment. As shown, the SoC test system 1000 includes an SoC test device 100, a signal transmitter 110, a signal receiver 120, a high-fix board 200, a PIB 300, a probe card 400, and a SoC. It may be configured to include 500.

Electrically with at least one of a Hi-Fix board 200, a probe interface board (PIB) 300, a probe card 400, and a System on Chip 500 (SoC) according to an embodiment. SoC test device 100 for testing the SoC by being connected to,

It is provided in the signal transmission unit 110, the signal connection between the SoC test apparatus 100 and the high-fix board 200, the signal connection between the high-fix board 200 and the PIB 300, the PIB 300 and the probe card 400 ), or a signal connection switching control unit 111 for selectively switching and controlling the signal connection between the probe card and the SoC, and

The signal line length of at least one of a high-fix board, PIB, probe card, and SoC by determining a delay time difference between the transmitted signal generated by the reflected wave and the received signal generated by the reflected wave, provided in the signal receiving unit 120 It may be configured to include a signal line length calculation unit for calculating.

In order to test the SoC 500, the test signal generated by the SoC test device 100 is the transmission line length of the high-fix board (T-1), the transmission line length of the PIB (T-2), and the transmission pogo block of the PIB. (310) Through the length (T-3), the length of the transmission line of the probe card (T-4), the length of the transmission probe 410 of the probe card (T-5) is input to the SoC 500, and the SoC 500 ), the length of the reception probe 410 of the probe card (R-5), the length of the reception line of the probe card (R-4), and the length of the reception pogo block 310 of the PIB (R-3) , May be input to the SoC test apparatus 100 through the reception line length R-2 of the PIB and the reception line length R-1 of the high-fix board. In this process, a reflected wave may be generated and a delay time may be generated. SoC 500 also has its own signal line length. Each signal line may be composed of a plurality of lines to configure a plurality of channels.

Reflected wave refers to an electromagnetic wave that appears by reflection of a part of a transmission and reception signal at an interface of a different medium or a junction of a line with a different line constant. In FIG. 1, the transmission signal contact points 600, 610, 620, 630, 640) and receive signal contact points 700, 710, 720, 730, 740. Transmission signal contact (600, 610, 620, 630, 640) and receiving signal contact (700, 710, 720, 730, 740) can be signal measurement points, and external connection connectors or pads already provided in the product can be used. . The reflected wave may be a medium-sized signal other than a "High" signal or a "Low" signal, and may be displayed as "Hi-z".

The SoC test apparatus 100 may include a signal transmission unit 110 and a signal reception unit 120. The signal transmission unit 110 may perform a function of transmitting a test signal for testing the performance of the SoC 500 and may include a signal connection switching controller 110 and a driver 113. The signal connection switching control unit 111 includes a signal connection between the SoC test device 100 and the high-fix board 200, a signal connection between the high-fix board 200 and the PIB 300, and the PIB 300 and the probe card 400. It is possible to selectively control the switching of the signal connection between the probe card and the SoC.

For example, in order to measure the signal line lengths (T-1, R-1) of the high-fix board 200, the signal connection switching control unit 110 is used between the SoC test device 100 and the high-fix board 200. The connection may be shorted (Closed, On), and a signal connection between the high-fix board 200 and the PIB 300 may be opened (Open, Off). In addition, in order to measure the signal line lengths (T-2, R-2) of the PIB 300, the signal connection between the SoC test apparatus 100, the high-fix board 200, and the PIB 300 is shorted (closed, On), a signal connection between the PIB 300 and the probe card 400 may be opened (Open, Off).

The signal transmission unit 110 may further include a driver 113 at an output terminal of the signal connection switching control unit 111. The driver 190 may receive a test signal from a clock signal generator (not shown) and a mux (MUX, not shown) provided in the SoC test apparatus 100 and generate an analog test data signal. There may be a plurality of drivers 190.

The signal receiving unit 120 may perform a function of receiving a signal as a result of a performance test of the SoC 500 and may include a signal line length calculation unit 114 and a comparator 112. The signal receiver 120 may provide the received test result signal to a DEMUX (not shown).

The comparator 112 may receive an analog test result signal of the SoC, compare the signal level with a reference voltage, convert it into a digital signal, and output it. The comparator can output a combination signal of digital logic “0” and “1”. For example, a logic of “1” when it is greater than the reference voltage and “0” when it is less than the reference voltage may be output. There may be a plurality of comparators 200.

The signal line length calculation unit 114 determines a delay time difference between the transmitted signal generated by the reflected wave and the received signal generated by the reflected wave to determine the signal line length of at least one of a high-fix board, PIB, probe card, and SoC. Can be calculated. The delay time difference may be due to a difference between a total signal line length of at least one load that affects the generation of a reflected wave of a transmission signal and a total signal line length of at least one load that affects the generation of a reflected wave of a received signal.

In addition, the transmission signal contact points 600, 610, 620, 630, 640 and the reception signal contact points 700, 710, 720, 730, 740 may further add a function of a switch. Therefore, it is possible to close/open by receiving a control signal from the signal connection switching control unit 111.

The SoC may be a Power Management Integrated Circuit (PMIC), an Application Processor (AP), a Display Driver Integrated Circuit (DDI), a Power IC, or a CMOS Image Sensor (CIS), but is not limited thereto. In addition, the SoC may be in a wafer state or a chip package state.

2 is a diagram illustrating a transmission output waveform of an SoC test system according to an exemplary embodiment. 2(a) is a diagram for explaining a waveform in which a reflected wave is not generated, and FIG. 2(b) is a diagram for explaining a waveform in which a reflected wave is generated. 2(a) shows the signal connection between the SoC test apparatus 100 and the high-fix board 200 in FIG. 1 in an open state, that is, in a state in which the transmission signal contact 600 is switched off. A signal waveform output from the SoC test device 100 is shown. Measurement may be performed using an oscilloscope. As shown, a rising edge occurs at 60 ns and a falling edge occurs at 140 ns, so “High” is maintained for 80 ns, and “Low” is maintained in other time regions, so no reflected wave is generated. The reason why the reflected wave is not generated in this way may be because the reflection effect due to the signal line of the loads has been removed. The signal line may include a conductive via and a pattern circuit on a PCB.

2(b) shows the signal connections of the SoC test apparatus 100, the high-fix board 200, the PIB 300, and the probe card 400 in FIG. 1 are short-circuited (Closed, On), and the SoC ( A diagram showing a signal waveform output by the SoC test apparatus 100 at the transmission signal contact 600 in a state where the signal connection of 500) is opened (Open, Off). As shown, in the Rising edge and Falling edge regions, a "Hi-z" signal (reflected wave signal) is generated instead of a "High" signal or a "Low" signal. Specifically, reflected waves were generated for 7 ns in the rising edge and falling edge regions, respectively. The reason for the occurrence of the reflected wave is that the loads, that is, the transmission signal lines T-1, T-2, T-3, and T of the high-fix board 200, the PIB 300, and the probe card 400 -4, T-5).

2(c) shows the signal connections of the SoC test apparatus 100, the high-fix board 200, the PIB 300, the probe card 400, and the SoC 500 in FIG. ) Represents a signal waveform that the SoC test apparatus 100 outputs from the transmission signal contact 600 in the state. As shown, a "Hi-z" signal was generated. Specifically, reflected waves were generated in each of the rising edge and falling edge regions for 16 ns. The reason why the reflected wave is generated as described above may be due to the reflection of all signal lines of the loads, that is, the high-fix board 200, the PIB 300, the probe card 400, and the SoC 500. The longer the length of the signal line that affects the generation of the reflected wave, the larger the reflected wave time interval.

3 is a diagram showing a waveform in which a transmission output waveform and a reception output waveform of the SoC test apparatus of FIG. 1 are superimposed. Specifically, FIG. 3 shows the signal connections of the SoC test apparatus 100, the high-fix board 200, the PIB 300, the probe card 400, and the SoC 500 in FIG. In the On) state, the SoC test device 100 superimposes the signal waveform output from the transmission signal contact point 600 (Transmission signal at contact point 600) and the signal waveform output from the reception signal contact point (Reception signal at contact point 700). It is a figure shown by (Overlapped). As shown, a "Hi-z" signal (i.e., a reflected wave) is generated in the transmission signal and the reception signal, and a delay time difference of 8 ns occurs in the transmission signal and the reception signal. This may be because the signal lines of all loads including the high-fix board 200, PIB 300, probe card 400, and SoC 500 have been affected.

In general, the skew time of 5 ps per 1 mm, that is, the delay time difference occurs in the length of the signal line, so the skew time of 8 ns occurs is the transmit signal contact, the receive signal contact from 600, and the total signal line length from 600 to 700. Is 1,600mm can be automatically calculated. In FIG. 1, the signal line length calculation unit 114 may determine a delay time difference and calculate signal line lengths of at least one or more loads based on this. The load includes a connecting board that connects the SoC test device and the SoC, that is, a high-fix board, a PIB, and a probe card, and may further include a DUT (eg, Soc).

In the same way, the signal line length of the high-fix board 200 can be obtained. That is, the signal connection switching control unit 111 of FIG. 1 shorts the signal connection between the SoC test device 100 and the high-fix board 200 and opens the signal connection between the high-fix board 200 and the PIB 300. In the (Open) state, the signal line length calculation unit 114 determines the difference in the delay time of the reflected wave generated from the signal waveform output from the transmission signal contact point, the signal waveform output from the 610, and the signal waveform output from the receive signal contact point, and The transmission line length and the reception line length of the fix board 200 may be calculated. As mentioned above, the principle of generating a skew time of 5ps per 1mm of a signal line can be used.

In the same way, the signal line length of the PIB 300, the signal line length of the probe card 400, and the signal line length of the SoC 500 can be respectively calculated.

Therefore, even if the specifications of the loads such as the high-fix board 200, PIB 300, or probe card 400 change as the type of SoC 500 to be tested is changed, the SoC test device 100 It can automatically calculate the length of each signal line and the total signal line length, increasing test speed and accuracy. Verification of whether the signal line length information of each load is correct or incorrect can also be performed accurately and quickly.

1000: SoC test system
100: SoC test device
110: signal transmission unit
111: signal connection switching control unit
112: comparator
114: signal line length calculation unit
113: driver
120: signal receiver
200: high-fix board
210: cable
300: PIB
310: Pogo block
400: probe card
410: probe
500: SoC
600, 610, 620, 630, 640: Transmission signal contact
700, 710, 720, 730, 740: receiving signal contact

Claims (3)

In the SoC test device for testing SoC by being electrically connected to at least one of a Hi-Fix board, a probe interface board (PIB), a probe card, and a system on chip (SoC),
Provided in the signal transmission unit, the signal connection at the transmission signal contact 600 and the reception signal contact 700 between the SoC test device and the high-fix board, the transmission signal contact 610 and the reception signal contact 710 between the high-fix board and the PIB ), the signal connection at the transmission signal contact 620 and the reception signal contact 720 between the PIB and the probe card, or the transmission signal contact 630 and the reception signal contact 730 between the probe card and the SoC A signal connection switching control unit for selectively controlling on/off switching of the signal connection; And
It is provided in the signal receiving unit and, by selective on/off switching control of the signal connection switching control unit, determines a delay time difference between the transmitted signal generated by the reflected wave and the received signal generated by the reflected wave, thereby determining the high-fix board, PIB A signal line length calculation unit for calculating an internal signal line length of at least one of a probe card and an SoC;
SoC test device comprising a. The method of claim 1,
A SoC test device electrically connected by a driver provided at the output terminal of the signal connection switching control unit and electrically connected, and a comparator at the input terminal of the signal line length calculation unit. The method of claim 1,
The signal line length calculation unit is an SOC testing device that calculates the signal line length based on the difference in transmission delay time.

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