KR102078383B1 - Power observe apparatus and power observe system using thereof - Google Patents

Abstract

The present invention relates to a power monitoring apparatus for monitoring the booting step of a central processing unit and collecting related information, and a power monitoring system using the same, wherein the power monitoring system according to an embodiment of the present invention comprises: a central processing unit; A power control unit; The power supply unit; A power measuring unit measuring booting power and converting the booting power into a digital signal; And a power monitoring unit configured to receive and store the digital signal converted by the power measuring unit and to control a measurement time of the power measuring unit. It may include.

Description

Power monitoring device and power monitoring system using the same {POWER OBSERVE APPARATUS AND POWER OBSERVE SYSTEM USING THEREOF}

The present invention relates to a power monitoring apparatus and a power monitoring system using the same, and more particularly, to a power monitoring apparatus for monitoring the booting stage of a central processing unit and collecting related information, and a power monitoring system using the same.

Recently, a central processing unit (CPU) mounted on an embedded board often requires a power input sequence condition in which different sizes of power are sequentially applied at a booting stage.

In the case of the central processing unit requiring a precise power input sequence as described above, booting may fail if the power input sequence has an error or the voltage level of the power supply required at the boot time is not sufficient.

These boot failures often occur during development, but often even during production.

If a boot failure occurs in the central processing unit, even the communication interface for estimating the boot cause of the embedded board becomes inoperable, which makes it difficult to diagnose the cause of the boot failure.

In order to solve the above problems, a method of monitoring the booting phase of each other through two or more central processing units connected to each other may be proposed, but this is difficult to apply in a board using a single central processing unit. In addition, there is a problem that it is impossible to monitor the pre-boot step of the other central processing unit through the central processing unit.

Thus, there is a need for a power monitoring system that can accurately monitor the booting phase of a board using a single central processing unit.

It is an object of the present invention to provide a power monitoring device and a power monitoring system capable of performing power monitoring on a booting stage of a central processing unit in a board using a single central processing unit.

Another object of the present invention is to provide a power monitoring system capable of accurately measuring and storing power provided at a booting stage of a central processing unit.

The power monitoring system according to an embodiment of the present invention for solving the above problems is booted step by step corresponding to the applied boot power, the central processing unit for providing a sequence signal according to the booting step; A power controller configured to generate a power control signal for controlling when the boot power is provided in response to the sequence signal; A power supply unit configured to provide the booting power to the CPU according to the booting step in response to the power control signal; A power measurement unit measuring the boot power and converting the boot power into a digital signal; And a power monitoring unit configured to receive and store the digital signal converted by the power measuring unit and to control a measurement time of the power measuring unit. It may include.

The power supply unit may provide two or more booting powers having different voltages in response to the power control signal.

The power measuring unit may include at least two analog-to-digital converters for converting the booting power into the digital signal.

At least two analog-to-digital converters may measure the booting power at different times at regular time intervals under the control of the power monitoring unit.

The power monitoring unit may be configured of a field programmable gate array (FPGA).

The power monitoring unit may include an internal memory unit for storing the digital signal; A terminal interface unit for allowing a user to check data stored in the internal memory unit; A timing controller for controlling when the power measurement unit measures the booting power; And a converter interface unit receiving the digital signal from the power measurement unit under control of the timing controller. It may include.

The internal memory unit may receive and store at least one of the power control signal and the sequence signal.

The converter interface unit may receive the digital signal from the power measurement unit through I2C (Inter-Integrated Circuit) communication.

An external memory unit in which the digital signal is stored; The power monitoring unit may further include a memory interface unit configured to communicate with the external memory unit. A terminal interface unit for allowing a user to check data stored in the external memory unit; A timing controller for controlling when the power measurement unit measures the booting power; And a converter interface unit receiving the digital signal from the power measurement unit under control of the timing controller. It may include.

The memory interface unit may receive at least one of the power control signal and the sequence signal and store the at least one of the power control signal and the sequence signal.

Power monitoring apparatus according to another embodiment of the present invention for solving the above problems is a power measuring unit for measuring the boot power used for each step boot of the central processing unit and converting it into a digital signal; And a power monitoring unit configured to receive and store the digital signal converted by the power measuring unit and to control a measurement time of the power measuring unit. The power monitoring unit includes an internal memory unit for storing the digital signal; A terminal interface unit for allowing a user to check data stored in the internal memory unit; A timing controller for controlling when the power measurement unit measures the booting power; And a converter interface unit receiving the digital signal from the power measurement unit under control of the timing controller. It may include.

The power measuring unit may include at least two analog-to-digital converters for converting the booting power into the digital signal.

At least two analog-to-digital converters may measure the booting power at different times at regular time intervals under the control of the power monitoring unit.

The power monitoring unit may be configured of a field programmable gate array (FPGA).

The internal memory unit may receive and store at least one of a power control signal for controlling a booting step of the central processing unit and a sequence signal provided by the central processing unit in response to the step-by-step booting.

The converter interface unit may receive the digital signal from the power measurement unit through I2C (Inter-Integrated Circuit) communication.

Power monitoring apparatus according to another embodiment of the present invention for solving the above problems is a power measurement unit for measuring the boot power used for each step of booting the central processing unit to convert to a digital signal; A power monitoring unit which receives and stores the digital signal converted by the power measuring unit, and controls a measurement time of the power measuring unit; An external memory unit storing the digital signal; The power monitoring unit includes a memory interface unit for communicating with the external memory unit; A terminal interface unit for allowing a user to check data stored in the external memory unit; A timing controller for controlling when the power measurement unit measures the booting power; And a converter interface unit receiving the digital signal from the power measurement unit under control of the timing controller. It may include.

The power monitoring apparatus and the power monitoring system according to the embodiment of the present invention may perform power monitoring for the booting stage of the central processing unit in a board using a single central processing unit.

The power monitoring apparatus and the power sensing system according to the embodiment of the present invention can accurately measure and store power provided at the booting stage of the CPU for each booting stage.

BRIEF DESCRIPTION OF THE DRAWINGS The accompanying drawings included as part of the detailed description to provide a better understanding of the present invention provide embodiments of the present invention and together with the detailed description, describe the technical idea of the present invention.
1 is a surface for explaining a power monitoring system according to an embodiment of the present invention.
FIG. 2 is a diagram for describing the power measuring unit and the power monitoring unit in detail in the embodiment of FIG. 1.
FIG. 3 is a diagram illustrating another example for describing the power measuring unit and the power monitoring unit in detail in the embodiment of FIG. 1.

As the inventive concept allows for various changes and numerous embodiments, particular embodiments will be described in detail with reference to the accompanying drawings.

The following examples are provided to assist in a comprehensive understanding of the methods, devices, and / or systems described herein. However, this is only an example and the present invention is not limited thereto.

In describing the embodiments of the present invention, when it is determined that the detailed description of the known technology related to the present invention may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted. In addition, terms to be described below are terms defined in consideration of functions in the present invention, which may vary according to intention or custom of a user or an operator. Therefore, the definition should be made based on the contents throughout the specification. The terminology used in the description is for the purpose of describing particular embodiments only and should not be limiting. Unless expressly used otherwise, the singular forms “a,” “an,” and “the” include plural forms of meaning. In this description, expressions such as "comprises" or "equipment" are intended to indicate certain features, numbers, steps, actions, elements, portions or combinations thereof, and one or more than those described. It should not be construed to exclude the presence or possibility of other features, numbers, steps, actions, elements, portions or combinations thereof.

In addition, terms such as first and second may be used to describe various components, but the components are not limited by the terms, and the terms are used to distinguish one component from another component. Only used as

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a view for explaining a power monitoring system 10 according to an embodiment of the present invention. Referring to FIG. 1, the power monitoring system 10 may include a central processing unit 100, a power control unit 200, a power supply unit 300, a power measurement unit 400, and a power monitoring unit 500. have.

The power monitoring system 10 may be mounted on an embedded board including the central processing unit 100. When the central processing unit 100 in the turn-off state receives the boot power sources V1, V2, and V3 from the power supply unit 300, booting may be performed step by step. That is, different power must be supplied according to the booting stage of the central processing unit 100. This means that the booting stage of the central processing unit consists of a sequence of booting sequences.

The central processing unit 100 may perform each booting step corresponding to the powers V1, V2, and V3 provided from the power supply unit 300, and sequence signals each time one booting step is started or terminated. (S1, S2, S3) can be generated. In FIG. 1, it is assumed that the central processing unit 100 undergoes three booting steps, and generates and provides sequence signals S1, S2, and S3 whenever starting or ending each booting step. In addition, it is assumed that the voltage level of the booting power required by the central processing unit 100 in each booting step is V1, V2, and V3. That is, the CPU 100 may perform a first booting step and generate a sequence signal S1 in response to the boot power source V1 provided from the power supply unit 300. In this manner, the CPU 100 may perform a corresponding booting step corresponding to the booting power sources V2 and V3 provided from the power supply unit 300 and generate sequence signals S2 and S3.

The power control unit 200 controls a timing at which the power supply unit 300 provides booting powers V1, V2, and V3 in response to the sequence signals S1, S2, and S3 received from the central processing unit 100. Can generate power control signals EN1, EN2, and EN3. The power control unit 200 may be configured as a single chip PMIC (Power Management IC), or may include a plurality of active devices and passive devices.

The power control unit 200 controls the timing of providing the power control signals EN1, EN2, and EN3 so that the power supply unit 300 may supply power at an accurate time for each booting stage of the central processing unit 100.

The power supply unit 300 may include a plurality of power generation devices corresponding to various power sources used in the booting step of the central processing unit 100. Such a power generation device may be composed of DC / DC elements. The power supply unit 300 may provide booting powers V1, V2, and V3 to the central processing unit in response to the power control signals EN1, EN2, and EN3 received from the power control unit 200.

In the above example, it is assumed that the booting step of the central processing unit 100 is three steps, and booting powers V1, V2, and V3 are supplied in correspondence with the booting step, and sequence signals S1, S2, and S3 or a power control signal are performed. Although illustrated as generating (EN1, EN2, EN3), the present invention is not limited to this example. The present invention can be applied to not only three booting stages but also three or more booting stages. In addition, one power is not supplied corresponding to the sequence signal, and two or more kinds of powers may be provided from the power supply unit 300 to the central processing unit 100.

The power measurement unit 400 may measure the boot power (V1, V2, V3) and convert it into a digital signal. In more detail, the power measurement unit 400 may include at least two analog-to-digital converters (ADCs) for converting the booting power sources V1, V2, and V3 into digital signals. In addition, the plurality of analog-to-digital converters may measure the booting power sources V1, V2, and V3 at different times at a predetermined time interval under the control of the power monitoring unit 500 and convert the booting power sources V1, V2, and V3 into digital signals.

The power monitoring unit 500 may receive and store the digital signal converted by the power measuring unit 400 and control the measurement timing of the digital signal of the power measuring unit 400. The power monitoring unit may be configured as a field programmable gate array (FPGA).

The power measuring unit 400 and the power monitoring unit 500 will be described in more detail with reference to FIGS. 2 and 3.

2 is a view for explaining the power measuring unit 400 and the power monitoring unit 500 in more detail in the embodiment of FIG. Referring to FIG. 2, the power measuring unit 400 may include one or more analog-digital converters 410, 420, and 430. In addition, the power monitoring unit 500 may include an internal memory unit 510, a terminal interface unit 520, a timing controller 530, and a converter interface unit 540.

In the description of FIG. 2, a description of the same configuration or effect as that of FIG. 1 will be omitted.

And a plurality of analog-to-digital converters 410, 420, 430 for converting booting power sources V1, V2, V3 into digital signals.

Each of the analog-digital converters 410, 420, and 430 may measure one booting power input to the power measuring unit 400 at different times and convert the same into a digital signal. For example, if the analog-to-digital converter 410 measures the magnitude of the voltage with respect to the boot power supply V1 at an offset time of 10 ms from the start of booting, the analog-to-digital converter 420 may boot up the power supply V1 at an offset time of 20 ms. The magnitude of the voltage can be measured with respect to. The analog-digital converter 430 may measure the magnitude of the voltage with respect to the booting power source V1 at an offset time of 30 ms.

In this way, the timing of the measurement of the magnitude of the voltage level of the booting power is measured in detail in the booting stage of the central processing unit 100 according to the change in time of the booting power (V1, V2, V3) provided to the CPU 100. It can be seen in more detail.

In FIG. 2, the voltage measuring unit 400 includes three analog-to-digital converters 410, 420, and 430, but according to the intention of the designer of the power monitoring device, the type of the embedded board, or the type of the central processing unit. The number of analog-to-digital converters that can be deployed can vary.

The booting power measured by each analog-digital converter 410, 420, 430 may be converted into a digital signal and provided to the power monitoring unit 500.

The power monitoring unit 500 may store the digital signal provided from the voltage measuring unit 400 and control the measurement timing of the power measuring unit 400.

The internal memory unit 510 may store a digital signal provided from the power measuring unit 400. That is, the internal memory unit 510 may store information about a time slot change of the booting power provided to the central processing unit 100 at the booting stage of the central processing unit 100. In addition to the booting powers V1, V2, and V3, the internal memory unit 510 may be provided with sequence signals S1, S2, S3 and power control signals EN1, EN2, and EN3 generated during the booting stage of the central processing unit 100. Information may also be stored. To this end, the power monitoring unit 500 may be connected to the power supply unit 300 and the power control unit 200 to receive the sequence signals S1, S2, and S3 or the power control signals EN1, EN2, and EN3.

The terminal interface unit 520 provides an interface between the user and the power monitoring apparatus in order for a user of the power monitoring apparatus to check information stored in the internal memory unit 510. When a boot failure of the central processing unit 100 occurs, the terminal interface unit 520 is stored in the internal memory unit 510 by a user through a communication interface such as an inter-integrated circuit (I2C) or a RS232 (Recommended Standard 232). Check the contents. The user may grasp information on the booting power stored in the internal memory unit 510 through a separately mounted display or a built-in display.

The timing controller 530 may control when the power measurement unit 400 measures booting powers V1, V2, and V3. The converter interface 540 may receive a digital signal from the power measurement unit 400 under the control of the timing controller 530. In more detail, the converter interface 540 may receive a digital signal from the analog-to-digital converters 410, 420, and 430 of the power measurement unit 400 through I 2 C (Inter-Integrated Circuit) communication. The converter interface 540 may include as many ports 541, 542, and 543 as the number of analog-to-digital converters 410, 420, and 430 of the power measurement unit 400.

The timing controller 530 controls the timing of the analog-to-digital converters 410, 420, and 430 of the power measurement unit 400 through the trigger control of the timing at which the converter interface unit 540 reads the digital signal from the power measurement unit 400. Trigger signals can be generated to measure the boot supply (V1, V2, V3) over time.

FIG. 3 is a diagram illustrating another example for describing the power measuring unit and the power monitoring unit in more detail in the embodiment of FIG. 1. Referring to FIG. 3, unlike FIG. 2, the power monitoring unit 500 includes a memory interface unit 550 instead of an internal memory unit, and the memory interface unit 550 is externally installed outside the power monitoring unit 500. It can be seen that the connection to the memory unit 600. In the description of FIG. 3, a description of the configuration or effects that overlap with FIG. 2 will be omitted.

When the power provided to the power monitoring unit 500 is turned off, all information stored in the memory of the power monitoring unit 500 may disappear due to volatility. Therefore, as shown in FIG. 3, the external memory, which is a nonvolatile memory, is external to the power monitoring unit 500 so that data is stored even when the power provided to the power monitoring unit 500 or the power provided to the embedded board is turned off. The unit 600 can be installed.

The memory interface unit 550 may connect the external memory unit 600 and the terminal interface unit 520 through a communication interface such as Inter-Integrated Circuit (I2C) or RS232 (Recommended Standard 232). The user may check information stored in the external memory unit 600 through the terminal interface unit 520 and the memory interface unit 550.

The above description is merely illustrative of the technical idea of the present invention, and those skilled in the art to which the present invention pertains may make various modifications and changes without departing from the essential characteristics of the present invention. Therefore, the embodiments described in the present invention are not intended to limit the technical spirit of the present invention but to describe the present invention, and are not limited to these embodiments. The scope of protection of the present invention should be interpreted by the following claims, and all technical ideas falling within the scope of the present invention should be construed as being included in the scope of the present invention.

100: central processing unit 200: power control unit
300: power supply unit 400: power measurement unit
500: power monitoring unit 600: external memory unit

Claims (17)

A central processing unit booted step by step in response to an applied booting power and providing a sequence signal according to the booting step;
A power controller configured to generate a power control signal for controlling when the boot power is provided in response to the sequence signal;
A power supply unit configured to provide the booting power to the CPU according to the booting step in response to the power control signal;
A power measurement unit measuring the boot power and converting the boot power into a digital signal; And
A power monitoring unit configured to receive and store the digital signal converted by the power measuring unit, and to control a measurement time of the power measuring unit;
The power measuring unit may include a plurality of analog-to-digital converters for converting a boot signal into digital signals for each of the booting powers classified by the booting step.
Each of the plurality of analog-to-digital converters, the power monitoring system for measuring the booting power at different times in each booting step under the control of the power monitoring unit. delete delete delete The method of claim 1, wherein the power monitoring unit
A power monitoring system comprising a field programmable gate array (FPGA). The method of claim 1, wherein the power monitoring unit
An internal memory unit for storing the digital signal;
A terminal interface unit for allowing a user to check data stored in the internal memory unit;
A timing controller for controlling when the power measurement unit measures the booting power; And
A converter interface unit receiving the digital signal from the power measurement unit under control of the timing controller; Power monitoring system comprising a. The method of claim 6, wherein the internal memory unit
And at least one of the power control signal and the sequence signal is stored. The method of claim 6, wherein the converter interface unit
A power monitoring system, characterized in that the digital signal is provided from the power measuring unit through I2C (Inter-Integrated Circuit) communication. According to claim 1,
An external memory unit in which the digital signal is stored; More,
The power monitoring unit
A memory interface for communicating with the external memory;
A terminal interface unit for allowing a user to check data stored in the external memory unit;
A timing controller for controlling when the power measurement unit measures the booting power; And
A converter interface unit receiving the digital signal from the power measurement unit under control of the timing controller; Power monitoring system comprising a. 10. The method of claim 9, wherein the memory interface unit
And at least one of the power control signal and the sequence signal is stored in the external memory. A power measurement unit for measuring booting power used for each stage of booting of the central processing unit and converting the booting power into a digital signal; And a power monitoring unit configured to receive and store the digital signal converted by the power measuring unit and to control a measurement time of the power measuring unit. Including,
The power measuring unit may include a plurality of analog-to-digital converters for converting the boot power into digital signals for each of the booting powers divided by the booting stages, and each of the plurality of analog-to-digital converters may include: Under control, the boot power is measured at different times in each of those boot phases,
The power monitoring unit may include an internal memory unit for storing the digital signal; A terminal interface unit for allowing a user to check data stored in the internal memory unit; A timing controller for controlling when the power measurement unit measures the booting power; And a converter interface unit receiving the digital signal from the power measurement unit under the control of the timing controller. delete delete The method of claim 11, wherein the power monitoring unit
A power monitoring device comprising a field programmable gate array (FPGA). The method of claim 11, wherein the internal memory unit
And receiving and storing at least one of a power control signal for controlling the booting step of the central processing unit and a sequence signal provided by the central processing unit in response to the step-by-step booting. The method of claim 11, wherein the converter interface unit
Power supply monitoring device characterized in that the digital signal is provided from the power measuring unit through I2C (Inter-Integrated Circuit) communication. A power measurement unit for measuring booting power used for each stage of booting of the central processing unit and converting the power to a digital signal; A power monitoring unit which receives and stores the digital signal converted by the power measuring unit, and controls a measurement time of the power measuring unit; And an external memory unit in which the digital signal is stored.
The power measuring unit may include a plurality of analog-to-digital converters for converting the boot power into digital signals for each of the booting powers classified by the booting step, and each of the plurality of analog-to-digital converters may include the power monitoring unit. Under control, the boot power is measured at different times in each of those boot phases,
The power monitoring unit may include a memory interface unit for communicating with the external memory unit; A terminal interface unit for allowing a user to check data stored in the external memory unit; A timing controller for controlling when the power measurement unit measures the booting power; And a converter interface unit receiving the digital signal from the power measuring unit under the control of the timing controller.

Images