KR102060115B1 - Led substrate with individually controllable of led module - Google Patents

Led substrate with individually controllable of led module Download PDF

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KR102060115B1
KR102060115B1 KR1020180109362A KR20180109362A KR102060115B1 KR 102060115 B1 KR102060115 B1 KR 102060115B1 KR 1020180109362 A KR1020180109362 A KR 1020180109362A KR 20180109362 A KR20180109362 A KR 20180109362A KR 102060115 B1 KR102060115 B1 KR 102060115B1
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substrate
conductive pattern
led
led module
terminal
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KR1020180109362A
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Korean (ko)
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유영철
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주식회사 피아이에스
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/22Roughened surfaces, e.g. at the interface between epitaxial layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H05B33/0842

Abstract

The present invention relates to an LED substrate whose LED chips can be individually controlled, in which a first substrate to an (N-1)^th substrate, and an N^th substrate, formed in a configuration of stacking conductive patterns on upper sides of insulation layers, are integrated to be stacked in a vertical direction, a first LED module to an (N-1)^th LED module, and an N^th LED module in connection with conductive patterns of the first substrate to the (N-1)^th substrate are mounted on an upper part of the N^th substrate, respectively, while being in connection with a conductive pattern of the N^th substrate, and an N^th terminal corresponding to the N^th LED module and individual terminals corresponding to the first conductive pattern to the (N-1)^th conductive pattern are installed to be exposed in an integrated manner. According to the present invention, the LED modules can be individually and selectively controlled.

Description

엘이디모듈의 개별제어가 가능한 엘이디기판{LED SUBSTRATE WITH INDIVIDUALLY CONTROLLABLE OF LED MODULE}LED board for individual control of LED module {LED SUBSTRATE WITH INDIVIDUALLY CONTROLLABLE OF LED MODULE}

본 발명은 절연층의 상측에 도전성패턴이 적층되는 구성으로 이루어진 제1기판 내지 제N-1기판, 제N기판이 수직방향에 일체로 적층되는 구성으로 이루어 지고, 상기 제N기판의 상부에는 N기판의 도전성패턴과 연결되면서 제1기판 내지 제N-1기판의 도전성패턴과 연결되는 제1엘이디모듈 내지 제N-1엘이디모듈, 제N엘이디모듈이 각각 장착되며, 제N엘이디모듈에 대응되는 제N단자와 제1도전성패턴 내지 제N-1도전성패턴에 대응되는 개별단자가 일체로 노출설치되는 구성으로 이루어진 엘이디칩의 개별제어가 가능한 엘이디기판에 관한 것이다.The present invention consists of a structure in which the conductive substrate is laminated on the upper side of the insulating layer, the first substrate to the N-1 substrate, the Nth substrate is integrally stacked in the vertical direction, N on the N substrate The first LED module, the N-1 LED module, and the Nth LED module, which are connected to the conductive pattern of the substrate and connected to the conductive patterns of the first to N-1 substrates, are respectively mounted, and correspond to the Nth LED module. The present invention relates to an LED substrate capable of individually controlling an LED chip having a configuration in which the N-th terminal and the individual terminals corresponding to the N-th conductive pattern to the N-th conductive pattern are integrally exposed.

일반적으로 엘이디(LED; Light Emitting Diode)는 화합물 반도체 단자에 전류를 흘려서 P-N 접합 부근이나 활성층에서 전자와 홀의 결합에 의해 빛을 방출하는 소자로서, 수은을 사용하지 않아 친환경적이고, 고체 디바이스이어서 장수명일 뿐만 아니라, 소비 전력이 현격히 낮아 새로운 광원으로 근래에 크게 주목받고 있다.In general, an LED (Light Emitting Diode) is a device that emits light by the combination of electrons and holes in the vicinity of the PN junction or the active layer by passing a current through the compound semiconductor terminal, it is environmentally friendly, does not use mercury, it is a solid device long life In addition, power consumption is significantly lower, which has attracted much attention in recent years as a new light source.

그 중 백색광을 방출하는 백색 엘이디는 LCD-TV용 백라이트, 자동차 헤드램프, 일반 조명 등으로 실용화되고 있으며, 기존의 백열등과 형광등을 대체하는 조명으로 사용되는 등, 그 용도가 점차 확대되고 있다.Among them, white LEDs emitting white light have been put into practical use as backlights for LCD-TVs, automobile headlamps, general lighting, and the like, and are being used as lightings to replace conventional incandescent and fluorescent lamps.

이와 같이 엘이디가 기존의 조명을 대체하게 되면서, 고휘도의 엘이디 개발이 가속화되고 있으며, 이렇게 개발된 고휘도의 엘이디는 발광이 이루어지는 협소한 영역에서 많은 열이 발생하게 되는데, 이러한 열은 엘이디를 이루는 반도체의 결정 구조에 전위(dislocation) 및 부정합(mismatch)을 일으켜 엘이디의 발광 성능 및 수명에 직접적으로 부정적인 영향을 미친다.As the LED replaces the existing lighting, the development of high brightness LED is accelerated, and the high brightness LED developed in this way generates a lot of heat in a narrow area where light is emitted. Dislocations and mismatches in the crystal structure directly adversely affect the light emitting performance and lifetime of the LED.

이에 따라, 엘이디에서 발생한 열을 신속하게 방출시키기 위한 다양한 연구 개발이 활발히 이루어지고 있는 실정이다.Accordingly, various researches and developments for rapidly dissipating heat generated from LEDs are being actively performed.

이와같은 기술과 관련되어 특허 제986214호에 연성인쇄회로기판의 기술이 제시되고 있으며 그 구성은 도1에서와 같이, 연성 인쇄회로기판(1)은 절연 특성을 지닌 연성 베이스층(30), 상기 베이스층(30)의 상하부에 각각 적층되어 있는 제 1 구리층(20)과 제 2 구리층(40)을 포함한다.In connection with such a technique, a technology of a flexible printed circuit board is disclosed in Patent No. 986214. The configuration of the flexible printed circuit board 1 is a flexible base layer 30 having insulation properties. The first copper layer 20 and the second copper layer 40 stacked on upper and lower portions of the base layer 30 are included.

그리고, 상기 베이스층(30)은 제 1 구리층(20)과 제 2 구리층(40)이 전기적으로 차단되게 절연 특성 뿐만 아니라 가요적인 특성도 구비하며, 상기 제 1 구리층(20)에는 다수의 구리판(20a, 20b )이 서로 전기적으로 독립된 상태로 포함되고, 상기 제 1 구리층(20)의 구리판(20a, 20b )은 제 2 구리층(40)과 전기적으로 및/또는 열적으로 통하도록 비어홀이 형성되어 있다.In addition, the base layer 30 has not only insulation characteristics but also flexible characteristics such that the first copper layer 20 and the second copper layer 40 are electrically blocked, and the first copper layer 20 has a plurality of characteristics. Copper plates 20a and 20b are included in an electrically independent state, and the copper plates 20a and 20b of the first copper layer 20 are in electrical and / or thermal communication with the second copper layer 40. Via holes are formed.

또한, 상기 제1구리층에 연결되는 엘이디 패키지(100)로부터 발생된 열은 상부로의 복사열(T1), 구리판으로의 전도열(T2), 통전 및 열전달 겸용 비어홀(HE/T)을 통한 전도열(T3), 제 2 구리층(40)으로의 전도열(T4) 그리고 백라이트 유닛 프레임(60)으로의 전도열(T5) 형태로 고르게 분산된다.In addition, the heat generated from the LED package 100 connected to the first copper layer is radiant heat (T1) to the top, conduction heat (T2) to the copper plate, conduction heat through the via hole (HE / T) for both current and heat transfer ( T3), conduction heat T4 to the second copper layer 40 and conduction heat T5 to the backlight unit frame 60 are evenly distributed.

그러나, 상기와 같은 엘이디 패키지는, 상부에만 구비되는 복수의 제1구리층을 통하여 복수개가 동시에 연결되는 구성으로 개별제어가 불가능하게 되는 단점이 있는 것이다.However, the LED package as described above has a disadvantage in that individual control is impossible because a plurality of the same structure is connected to each other through a plurality of first copper layers provided only on the upper portion.

상기와 같은 종래의 문제점들을 개선하기 위한 본 발명의 목적은, 엘이디모듈 장착용 패턴을 각각 개별설치하여 엘이디모듈의 개별 및 선택적인 제어가 가능토록 하고, 다층기판을 통하여 복수의 엘이디칩을 용이하게 장착할 수 있도록 하며, 최소의 공간에서 개별 엘이디칩의 연결작업이 용이하게 이루어지도록 하고, 엘이디모듈에서 발생되는 열의 신속한 배출이 가능토록 하는 엘이디칩의 개별제어가 가능한 엘이디기판을 제공하는데 있다.An object of the present invention for improving the conventional problems as described above, by individually installing the LED module mounting pattern to enable individual and selective control of the LED module, and facilitates a plurality of LED chips through a multi-layer substrate The present invention provides an LED board which enables individual control of the LED chip so that it can be installed, the individual LED chips can be easily connected in a minimum space, and the heat of the LED module can be quickly discharged.

본 발명은 상기 목적을 달성하기 위하여, 절연층의 상측에 도전성패턴이 적층되는 구성으로 이루어진 제1기판 내지 제N-1기판, 제N기판이 수직방향에 일체로 적층되는 구성으로 이루어 지고,In order to achieve the above object, the present invention is made of a structure in which the first substrate to the N-th substrate, the N-th substrate is integrally laminated in the vertical direction, the conductive pattern is laminated on the upper side of the insulating layer,

상기 제N기판은, 상부에 제1기판 내지 제N-1엘이디모듈, 제N엘이디모듈이 각각 장착되면서 제N엘이디모듈에 대응되면서 가장자리에 노출되는 제N단자와 연결되는 제N도전성 패턴이 형성되고, 상기 제N단자와 구분되어 제1도전성패턴 내지 제N-1도전성패턴에 대응되는 개별단자가 일체로 노출설치되며, The Nth substrate has an Nth conductive pattern connected to an Nth terminal exposed to an edge while corresponding to the Nth LED module while the first substrate to the N-1 LED module and the Nth LED module are respectively mounted on the Nth substrate. The individual terminals corresponding to the first conductive pattern to the N-1th conductive pattern separated from the Nth terminal may be integrally exposed.

상기 제N-1기판은, 상부에는 제N-1엘이디모듈에 대응되면서 가장자리에 노출되는 제N-1단자와 연결되는 제N-1도전성 패턴이 형성되고, 상기 제N-1도전성패턴은 비어홀을 통하여 개별단자와 제N엘이디모듈에 전기적으로 각각 연결되고, The N-1th substrate has an N-1 conductive pattern connected to an N-1 terminal exposed at an edge while corresponding to the N-1 LED module, and the N-1 conductive pattern is a via hole. Are electrically connected to individual terminals and the N-th LED module through

상기 제1기판은, 제1엘이디모듈에 대응되면서 가장자리에 노출되는 제1단자와 연결되는 제1도전성 패턴이 형성되고, 상기 제1도전성패턴은 비어홀을 통하여 개별단자와 제1엘이디모듈에 전기적으로 각각 연결되는 엘이디칩의 개별제어가 가능한 엘이디기판을 제공한다.The first substrate has a first conductive pattern connected to a first terminal exposed to an edge while corresponding to the first LED module, and the first conductive pattern is electrically connected to the individual terminals and the first LED module through a via hole. It provides LED boards that can individually control the LED chips connected to each other.

그리고, 본 발명은 제1도전성패턴 내지 제N-1도전성패턴, 제N도전성패턴은 서로 다른 도전성패턴과 간섭이 방지되면서 관통되거나 도전성입자가 충진되는 열전달용비어홀을 통하여 제N기판의 상측에서 열전달토록 설치되는 엘이디칩의 개별제어가 가능한 엘이디기판을 제공한다.Further, in the present invention, the first conductive pattern to the N-1 conductive pattern and the Nth conductive pattern are heat-transferred from the upper side of the N-th substrate through heat-transfer via holes through which the conductive particles are filled while the interference is prevented from the different conductive patterns. It provides LED board which can control LED chip installed so far.

또한, 본 발명은 제1기판 내지 제N-1기판, 제N기판중 복수개가 개별단자 또는 제N단자에 동시에 연결되어 동시에 점등토록 설치되는 엘이디칩의 개별제어가 가능한 엘이디기판을 제공한다.In addition, the present invention provides an LED substrate capable of individual control of the LED chip is installed so that a plurality of the first to N-th substrate, the N-th substrate is connected to the individual terminal or the N-terminal at the same time to be lit at the same time.

더하여, 본 발명은 제N기판의 하측에 공통전극층이 일체로 적층되어 제1도전성패턴 내지 제N-1도전성패턴, 제N도전성패턴의 공통전극이 비어홀을 통하여 동시에 연결되며, 상기 공통전극 역시 상부에 구비되는 개별단자에 비어홀을 통하여 연결되는 엘이디칩의 개별제어가 가능한 엘이디기판을 제공한다.In addition, in the present invention, a common electrode layer is integrally stacked on the lower side of the Nth substrate so that the common electrodes of the first conductive pattern, the N-1 conductive pattern, and the Nth conductive pattern are simultaneously connected through a via hole, and the common electrode is also upper part. It provides an LED substrate capable of individual control of the LED chip connected to the via via holes to the individual terminals provided in the.

계속하여, 본 발명의 엘이디모듈은 비어홀에 구형의 납땜볼을 활용한 BGA방식으로 열압착되는 엘이디칩의 개별제어가 가능한 엘이디기판을 제공한다.Subsequently, the LED module of the present invention provides an LED substrate capable of individually controlling an LED chip that is thermally compressed in a BGA method using a spherical solder ball in a via hole.

그리고, 본 발명은, 절연층의 일측에 노광이나 에칭 및 식각에 의해 에어홀을 일체로 형성하는 엘이디칩의 개별제어가 가능한 엘이디기판을 제공한다.In addition, the present invention provides an LED substrate capable of individually controlling an LED chip which integrally forms an air hole by exposure, etching, and etching on one side of the insulating layer.

이상과 같이 본 발명에 의하면, 엘이디모듈 장착용 패턴을 각각 개별설치하여 엘이디모듈의 개별 및 선택적인 제어가 가능하고, 다층기판을 통하여 복수의 엘이디칩을 용이하게 장착하며, 최소의 공간에서 개별 엘이디칩의 연결작업이 용이하게 이루어지고, 엘이디모듈에서 발생되는 열의 신속한 배출이 가능한 효과가 있는 것이다.As described above, according to the present invention, by individually installing the LED module mounting pattern, it is possible to individually and selectively control the LED module, and to easily mount a plurality of LED chips through the multilayer board, and individual LEDs in a minimum space. Connection of the chip is made easily, it is possible to quickly discharge the heat generated from the LED module.

도1은 종래의 엘이디기판을 도시한 사시도이다.
도2는 본 발명에 따른 엘이디기판을 도시한 외관도이다.
도3은 본 발명에 따른 엘이디기판을 도시한 측면도이다.
도4는 본 발명에 따른 엘이디기판의 분해상태도이다.
도5 내지 도7은 각각 본 발명의 다른 실시예에 따른 엘이디기판을 도시한 외관도 및 측면도이다.
1 is a perspective view showing a conventional LED substrate.
Figure 2 is an external view showing the LED substrate according to the present invention.
Figure 3 is a side view showing the LED substrate according to the present invention.
4 is an exploded state diagram of the LED substrate according to the present invention.
5 to 7 are each an external view and a side view of the LED substrate according to another embodiment of the present invention.

이하, 첨부된 도면에 의거하여 본 발명의 실시예를 상세하게 설명하면 다음과 같다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

도2는 본 발명에 따른 엘이디기판을 도시한 외관도이고, 도3은 본 발명에 따른 엘이디기판을 도시한 측면도이며, 도4는 본 발명에 따른 엘이디기판의 분해상태도이고, 도5 내지 도7은 각각 본 발명의 다른 실시예에 따른 엘이디기판을 도시한 외관도 및 측면도이다.Figure 2 is an external view showing the LED substrate according to the present invention, Figure 3 is a side view showing the LED substrate according to the present invention, Figure 4 is an exploded view of the LED substrate according to the present invention, Figures 5 to 7 Are respectively an external view and a side view of the LED substrate according to another embodiment of the present invention.

본 발명의 엘이디용 기판(S)은, 절연층(I)의 상측에 도전성패턴(P)이 적층되는 구성으로 이루어진 제1기판(100) 내지 제N-1기판(400), 제N기판(200)이 수직방향에 일체로 적층되는 구성으로 이루어진다.In the LED substrate S of the present invention, the first substrate 100 to the N-th substrate 400 and the N-th substrate (100) having a structure in which the conductive pattern P is stacked on the insulating layer I are stacked. 200 is made of a configuration that is integrally stacked in the vertical direction.

그리고, 상기 제N기판(200)은, 상부에 제1엘이디모듈(410) 내지 제N-1엘이디모듈(430), 제N엘이디모듈(450)이 각각 장착되면서 제N엘이디모듈(450)에 대응되면서 가장자리에 노출되는 제N단자(510)와 연결되는 제N도전성 패턴(530)이 형성된다.In addition, the N-th substrate 200 is mounted on the N-th LED module 450 while the first LED module 410 to the N-1 LED module 430 and the N-th LED module 450 are respectively mounted on the N-th substrate 200. The N-th conductive pattern 530 is formed to correspond to the N-th terminal 510 exposed to the edge.

더하여, 상기 제N단자(510)와 구분되어 제1도전성패턴(130) 내지 제N-1도전성패턴(230)에 대응되는 개별단자(590)가 일체로 노출설치된다. In addition, the individual terminals 590, which are separated from the N-th terminal 510 and correspond to the first conductive patterns 130 to the N-th conductive pattern 230, are integrally exposed.

계속하여, 상기 제N-1기판(400)은, 상부에는 제N-1엘이디모듈(430)에 대응되면서 가장자리에 노출되는 제N-1단자(210)와 연결되는 제N-1도전성패턴(230)이 형성되고, 상기 제N-1단자와 제N-1도전성패턴(230)은 비어홀(V)을 통하여 개별단자(590)와 제N-1엘이디모듈(430)에 전기적으로 각각 연결된다. Subsequently, the N-th substrate 400 has an N-th conductive pattern connected to the N-th terminal 210 exposed at an edge thereof, corresponding to the N- 1 LED module 430 at an upper portion thereof. 230 is formed, and the N-th terminal and the N-th conductive pattern 230 are electrically connected to the individual terminal 590 and the N-th LED module 430 through via holes V, respectively. .

그리고, 상기 제1기판(100)은, 제1엘이디모듈(410)에 대응되면서 가장자리에 노출되는 제1단자(110)와 연결되는 제1도전성 패턴(130)이 형성되고, 상기 제1도전성패턴(130) 및 제1단자는 비어홀(V)을 통하여 개별단자(590)와 제1엘이디모듈(410)에 전기적으로 각각 연결된다.In addition, the first substrate 100 is formed with a first conductive pattern 130 connected to the first terminal 110 exposed to the edge corresponding to the first LED module 410, the first conductive pattern 130 and the first terminal are electrically connected to the individual terminal 590 and the first LED module 410 through the via hole (V), respectively.

또한, 상기 제1도전성패턴 내지 제N-1도전성패턴, 제N도전성패턴은 서로 다른 도전성패턴과 간섭이 방지되면서 관통되거나 도전성입자(760)가 충진되는 열전달용비어홀(V1)을 통하여 제N기판의 상측에서 열전달토록 설치되어도 좋다.In addition, the first conductive pattern to the N-th conductive pattern, and the N-th conductive pattern are prevented from interfering with other conductive patterns and penetrate through the heat transfer hole V1 through which the conductive particles 760 are filled. It may be provided for heat transfer from above.

더하여, 도7에서와 같이 상기 제1기판(100) 내지 제N-1기판, 제N기판중 복수개가 개별단자(590) 또는 제N단자에 동시에 연결되어 동시에 점등토록 설치되어도 좋다.In addition, as shown in FIG. 7, a plurality of the first substrate 100 to the N-th substrate and the N-th substrate may be simultaneously connected to the individual terminal 590 or the N-th terminal to be turned on at the same time.

또한, 상기 제1기판(100)의 하측에 공통전극(750)이 일체로 적층되어 제1 내지 제N-1도전성패턴, 제N도전성패턴의 공통전극이 도전성페이스트가 충진되는 접지비어홀(710)을 통하여 동시에 연결된다.In addition, the ground via hole 710 in which the common electrode 750 is integrally stacked below the first substrate 100 so that the common electrodes of the first to N-th conductive patterns and the N-th conductive pattern are filled with conductive paste. Are connected at the same time.

이때, 상기 공통전극 역시 상부에 구비되는 개별단자에 비어홀을 통하여 연결되어 전극이 상부에 노출토록 설치되어도 좋다.In this case, the common electrode may also be connected to an individual terminal provided at an upper portion thereof through a via hole to expose the electrode at an upper portion thereof.

계속하여, 상기 제1엘이디모듈(410) 내지 제N-1엘이디모듈(430), 제N엘이디모듈(450)이 비어홀에 구형의 납땜볼을 활용한 BGA방식으로 열압착되어도 좋다.Subsequently, the first LED module 410 to the N-1 LED module 430 and the Nth LED module 450 may be thermally compressed by a BGA method using a spherical solder ball in the via hole.

그리고, 상기, 절연층(I)의 일측에 노광이나 에칭 및 식각에 의해 에어홀(800)을 일체로 형성하여도 좋다.In addition, the air holes 800 may be integrally formed on one side of the insulating layer I by exposure, etching, and etching.

상기와 같은 구성으로 이루어진 본 발명의 동작을 설명한다.The operation of the present invention having the above configuration will be described.

도2내지 도7에서 도시한 바와같이 본 발명의 엘이디용 기판(S)은, 절연층(I)의 상측에 도전성패턴(P)이 적층되는 구성으로 이루어진 제1기판(100) 내지 제N-1기판(400), 제N기판(200)이 수직방향에 일체로 적층되는 구성으로 이루어져 금속재로 이루어진 도전성패턴이 각 층에 분리되어 면적의 확보가 가능함으로써 방열효과를 높이게 된다.As shown in FIGS. 2 to 7, the LED substrate S of the present invention includes a first substrate 100 to an N-th structure in which a conductive pattern P is laminated on the insulating layer I. Since the first substrate 400 and the N-th substrate 200 are integrally stacked in the vertical direction, a conductive pattern made of a metal material is separated into each layer to secure an area, thereby increasing heat dissipation effect.

이때, 상기 절연층 사이에 적층형성되는 도전성패턴은 열전달용비어홀(V1)이나 에어홀(800)을 통하여 외부에 노출토록 되어 원하는 열전달 효과의 구현이 가능토록 된다.At this time, the conductive pattern formed between the insulating layers is exposed to the outside through the heat transfer via hole (V1) or the air hole 800 to realize the desired heat transfer effect.

그리고, 상기 제N기판(200)은, 상부에 제1엘이디모듈(410) 내지 제N-1엘이디모듈(430), 제N엘이디모듈(450)이 각각 장착되면서 제N엘이디모듈(450)에 대응되면서 가장자리에 노출되는 제N단자(510)와 연결되는 제N도전성 패턴(530)이 형성되고, 상기 제N단자(510)와 구분되어 제1도전성패턴 내지 제N-1도전성패턴에 대응되는 개별단자(590)가 일체로 노출설치되어 제N단자 및 개별단자가 상부에 모두 노출되어 전원의 공급이 용이하게 된다.In addition, the N-th substrate 200 is mounted on the N-th LED module 450 while the first LED module 410 to the N-1 LED module 430 and the N-th LED module 450 are respectively mounted on the N-th substrate 200. The N-th conductive pattern 530 is formed to be connected to the N-th terminal 510 exposed to the edge, and is separated from the N-th terminal 510 to correspond to the first to N-th conductive patterns. Since the individual terminals 590 are integrally installed and exposed, the N-th terminal and the individual terminals are all exposed to the upper portion, thereby facilitating supply of power.

계속하여, 상기 제N-1기판(400)은, 상부에는 제N-1엘이디모듈(430)에 대응되면서 가장자리에 노출되는 제N-1단자(210)와 연결되는 제N-1도전성패턴(230)이 형성되고, 상기 제N-1도전성패턴(230)은 비어홀(V)을 통하여 개별단자(590)와 제N-1엘이디모듈(430)에 전기적으로 각각 연결되어 N기판의 상부에 장착되는 제N-1엘이디모듈(430)의 연결작업이 용이하게 된다. Subsequently, the N-th substrate 400 has an N-th conductive pattern connected to the N-th terminal 210 exposed at an edge thereof, corresponding to the N- 1 LED module 430 at an upper portion thereof. 230 is formed, and the N-th conductive pattern 230 is electrically connected to the individual terminals 590 and the N-1 LED module 430 through via holes V, respectively, and mounted on the N substrate. It becomes easy to connect the N-1 LED module 430 to be.

그리고, 상기 제1기판(100)은, 제1엘이디모듈(410)에 대응되면서 가장자리에 노출되는 제1단자(110)와 연결되는 제1도전성 패턴(130)이 형성되고, 상기 제1도전성패턴(130)은 비어홀(V)을 통하여 개별단자(590)와 제1엘이디모듈(410)에 전기적으로 각각 연결되어 N기판의 상부에 장착되는 제1엘이디모듈(100)의 연결작업이 용이하게 된다. In addition, the first substrate 100 is formed with a first conductive pattern 130 connected to the first terminal 110 exposed to the edge corresponding to the first LED module 410, the first conductive pattern 130 is electrically connected to the individual terminal 590 and the first LED module 410 through the via hole (V), respectively, so that it is easy to connect the first LED module 100 mounted on the N substrate. .

또한, 상기 제1도전성패턴 내지 제N-1도전성패턴, 제N도전성패턴은 서로 다른 도전성패턴과 간섭이 방지되면서 관통되거나 도전성입자(700)가 충진되는 열전달용비어홀(V1)을 통하여 외부에 노출토록 설치되어 공기와 접촉함으로써 제N기판의 상측에서 각 도전성패턴의 열전달이 용이하게 된다.In addition, the first conductive pattern to the N-th conductive pattern and the N-th conductive pattern are exposed to the outside through the heat transfer hole hole V1 through which the conductive patterns 700 are filled while the interference with the other conductive patterns is prevented. By being installed so as to be in contact with air, heat transfer of each conductive pattern becomes easy on the upper side of the N-th substrate.

더하여, 본 발명은 개별 엘이디모듈을 제어하도록 하여도 좋으나 도7에서와 같이 상기 제1기판(100) 내지 제N-1기판, 제N기판중 복수개가 개별단자(590) 또는 제N단자에 동시에 연결되어 동시에 점등토록 설치되어도 좋다.In addition, the present invention may control the individual LED module, but as shown in FIG. 7, a plurality of the first substrate 100 to the N-th substrate and the N-th substrate are simultaneously connected to the individual terminal 590 or the N-th terminal. It may be connected and turned on at the same time.

또한, 상기 제1기판(100)의 하측에 공통전극(750)이 일체로 적층되어 제1 내지 제N-1도전성패턴, 제N도전성패턴의 공통전극이 접지비어홀(710)을 통하여 동시에 연결됨으로써 열전달이 용이하게 된다.In addition, the common electrode 750 is integrally stacked on the lower side of the first substrate 100 so that the common electrodes of the first to N-th conductive patterns and the N-th conductive pattern are simultaneously connected through the ground via hole 710. Heat transfer becomes easy.

이때, 상기 공통전극 역시 상부에 구비되는 개별단자에 비어홀을 통하여 연결되어 전극이 상부에 노출토록 설치되어 전원공급이 용이하게 된다.At this time, the common electrode is also connected to the individual terminal provided in the upper through the via hole so that the electrode is exposed to the upper portion to facilitate power supply.

계속하여, 상기 제1엘이디모듈(410) 내지 제N-1엘이디모듈(430), 제N엘이디모듈(450)이 비어홀에 구형의 납땜볼을 활용한 BGA방식으로 열압착하면 연결작업이 용이하게 된다.Subsequently, when the first LED module 410 to the N-1 LED module 430 and the N LED module 450 are thermally compressed in a BGA method using a spherical solder ball in the via hole, a connection operation is easily performed. do.

그리고, 상기, 절연층(I)의 일측에 노광이나 에칭 및 식각에 의해 에어홀(800)을 일체로 형성하면 절연층 사이에 적층되는 도전성패턴을 공기중에 노출시켜 열전달효과를 상승시키게 되는 것이다.In addition, when the air holes 800 are integrally formed on one side of the insulating layer I by exposure, etching, and etching, the conductive patterns stacked between the insulating layers are exposed in the air to increase the heat transfer effect.

100...제1기판 400...제N-1기판
200...N기판 410...제1엘이디모듈
510...제N단자 590...개별단자
700...도전성입자 710...접지비어홀
750...공통전극
100 ... First substrate 400 ... N-1 substrate
200 ... N substrate 410 ... 1 LED module
510 ... N terminal 590 ... Individual terminal
700 ... conductive particles 710 ... ground via hole
750 Common electrode

Claims (6)

절연층의 상측에 도전성패턴이 적층되는 구성으로 이루어진 제1 내지 제N-1기판, 제N기판이 수직방향에 일체로 적층되는 구성으로 이루어 지고,
상기 제N기판은, 상부에 제1엘이디모듈 내지 제N-1엘이디모듈, 제N엘이디모듈이 각각 장착되며, 제N엘이디모듈에 대응되면서 가장자리에 노출되는 제N단자와 연결되는 제N도전성 패턴이 절연층의 상부에 형성되고, 상기 제N단자와 구분되어 제1도전성패턴 내지 제N-1도전성패턴에 대응되는 복수의 개별단자가 일체로 노출설치되며,
상기 제N-1기판은, 제N-1엘이디모듈에 대응되면서 가장자리에 노출되는 제N-1단자와 연결되는 제N-1도전성 패턴이 절연층의 상부에 형성되고, 상기 제N-1단자와 제N-1도전성패턴은 비어홀을 통하여 하나의 개별단자와 제N엘이디모듈에 전기적으로 각각 연결되고,
상기 제1기판은, 제1엘이디모듈에 대응되면서 가장자리에 노출되는 제1단자와 연결되는 제1도전성 패턴이 절연층의 상부에 형성되고, 상기 제1단자와 제1도전성패턴은 비어홀을 통하여 다른 하나의 개별단자와 제1엘이디모듈에 전기적으로 각각 연결되며,
상기 절연층의 일측에 노광이나 에칭 및 식각에 의해 에어홀을 일체로 형성하여 도전성패턴이 공기와 접촉토록 설치되는 엘이디칩의 개별제어가 가능한 엘이디기판.
The first to N-th substrate, consisting of a configuration in which the conductive pattern is laminated on the upper side of the insulating layer, the N-th substrate is made of a configuration in which the laminated in the vertical direction integrally,
The Nth substrate may include an Nth conductive pattern connected to an Nth terminal exposed to an edge while corresponding to the Nth LED module, wherein the first LED module, the N-1 LED module, and the Nth LED module are mounted on the Nth substrate, respectively. A plurality of individual terminals formed on the insulating layer and separated from the N-th terminal and corresponding to the first conductive pattern to the N-1 conductive pattern are integrally exposed.
The N-1th substrate has an N-1 conductive pattern connected to the N-1 terminal exposed at the edge corresponding to the N-1 LED module and formed on the insulating layer, and the N-1 terminal And the N-1 conductive pattern are electrically connected to one individual terminal and the Nth LED module through via holes, respectively.
The first substrate has a first conductive pattern connected to a first terminal exposed to an edge while corresponding to a first LED module, and is formed on an upper portion of the insulating layer, and the first terminal and the first conductive pattern are separated through a via hole. Electrically connected to one individual terminal and the first LED module,
An LED substrate capable of individually controlling an LED chip in which an air hole is integrally formed by exposure, etching, and etching on one side of the insulating layer so that a conductive pattern is in contact with air.
제1항에 있어서, 상기 제1도전성패턴 내지 제N-1도전성패턴, 제N도전성패턴은 서로 다른 도전성패턴과 간섭이 방지되면서 관통되거나 도전성입자가 충진되는 열전달용비어홀을 통하여 제N기판의 상측에서 열전달토록 설치되는 것을 특징으로 하는 엘이디칩의 개별제어가 가능한 엘이디기판.The N-th conductive pattern of claim 1, wherein the first conductive pattern to the N-1 conductive pattern and the N-th conductive pattern are penetrated or prevented from interfering with other conductive patterns and filled with conductive particles to form an upper side of the N-th substrate. LED board capable of individual control of the LED chip, characterized in that installed in the heat transfer. 제1항에 있어서, 상기 제1기판 내지 제N-1기판, 제N기판중 복수개가 개별단자 또는 제N단자에 동시에 연결되어 동시에 점등토록 설치되는 것을 특징으로 하는 엘이디칩의 개별제어가 가능한 엘이디기판.The LED of claim 1, wherein a plurality of the first to N-th substrates and the N-th substrate are simultaneously connected to individual terminals or N-th terminals and installed to light at the same time. Board. 제1항에 있어서, 상기 제1기판의 하측에 공통전극이 일체로 적층되어 제1도전성패턴 내지 제N-1도전성패턴, 제N도전성패턴이 접지비어홀을 통하여 동시에 연결되는 것을 특징으로 하는 엘이디칩의 개별제어가 가능한 엘이디기판.The LED chip of claim 1, wherein the common electrodes are integrally stacked on the lower side of the first substrate so that the first conductive pattern, the N-1 conductive pattern, and the Nth conductive pattern are simultaneously connected through the ground via hole. LED board with individual control. 제4항에 있어서, 상기 공통전극은 상부에 구비되는 개별단자에 비어홀을 통하여 연결되는 것을 특징으로 하는 엘이디칩의 개별제어가 가능한 엘이디기판.The LED substrate of claim 4, wherein the common electrode is connected to an individual terminal provided at an upper portion thereof through a via hole. 삭제delete
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100986214B1 (en) * 2008-07-21 2010-10-07 대덕지디에스 주식회사 Flexible Printed Circuit Board
KR101747846B1 (en) * 2015-01-30 2017-06-15 금호전기주식회사 Transparent light emitting apparatus
JP2017139489A (en) * 2017-04-13 2017-08-10 ソニー株式会社 Display device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100986214B1 (en) * 2008-07-21 2010-10-07 대덕지디에스 주식회사 Flexible Printed Circuit Board
KR101747846B1 (en) * 2015-01-30 2017-06-15 금호전기주식회사 Transparent light emitting apparatus
JP2017139489A (en) * 2017-04-13 2017-08-10 ソニー株式会社 Display device

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