KR102028978B1 - INSPECTION APPARATUS OF LIQUID CRYSTAL DISPLAY DEVICE and METHOD FOR TESTING THE SAME - Google Patents

Abstract

An inspection apparatus of a COG type liquid crystal display device, comprising: a chip mounting pad unit connected to a driver IC driving one of a gate line and a data line of the liquid crystal display device; And at least two inspection pads for inspecting a failure of any one of the gate line and the data line, wherein the chip mounting pad unit is connected to any one of the gate line and the data line, so as to signal the driver IC. An output pad for outputting; An input pad connected to an external circuit and receiving a signal of the external circuit; And at least two dummy pads interconnected through the driver IC, wherein the at least two test pads are connected one-to-one with the at least two dummy pads, and at least one of the at least two test pads. And connecting at least one inspection device, wherein the at least two dummy pads and the at least two inspection pads form a closed circuit together with a driver IC connected to the chip mounting pad part and the inspection equipment, and the inspection equipment closes the closed circuit. The present invention provides an inspection apparatus for a liquid crystal display device which measures a threshold current between the dummy pad and the inspection pad.

Description

Inspection device of liquid crystal display and inspection method thereof {INSPECTION APPARATUS OF LIQUID CRYSTAL DISPLAY DEVICE and METHOD FOR TESTING THE SAME}

The present invention relates to an inspection apparatus for a liquid crystal display device and an inspection method thereof, and more particularly, to an inspection apparatus for a chip on glass (COG) type liquid crystal display device and a method for inspecting a pad portion thereof.

As the information age enters full swing, the display field for visually displaying electrical information signals is rapidly developing. Accordingly, researches for developing performances such as thinning, weight reduction, and low power consumption for various flat panel display devices have been continued.

Representative examples of such flat panel displays include liquid crystal displays (LCDs), plasma display panels (PDPs), field emission display devices (FEDs), and electroluminescent displays. Electroluminescent display device (ELD), electro-wetting display device (EWD), and organic light emitting display device (OLED). Such flat panel display devices commonly include a flat panel display panel for realizing an image. A flat panel display panel is a structure in which a pair of substrates facing each other with a unique light emitting material or a polarizing material interposed therebetween.

Among them, a liquid crystal display device displays an image by using optical anisotropy and polarization of liquid crystal. That is, the liquid crystal display device forms an electric field for modifying the arrangement direction of the liquid crystals for each pixel region in a state where the thin liquid crystals are oriented in a predetermined initial direction, thereby adjusting the light transmittance of each pixel region to display an image. Display.

Meanwhile, when the liquid crystal display device is an active matrix driving mode, one of the pair of substrates bonded to each other may include a thin film transistor array substrate. Here, the thin film transistor array substrate is for defining a plurality of pixel areas corresponding to the display area for emitting light for displaying an image, and controlling the amount of light emission of each pixel area independently.

In general, a thin film transistor array substrate includes gate lines and data lines formed to cross each other so as to define a plurality of pixel regions corresponding to the display area, and is connected to a driver IC for driving each of the gate lines and the data lines.

In this case, a connection method of the driver IC includes a tape carrier package (TCP) method and a chip on glass (COG) method.

The TCP method is a method in which a flexible film mounted with a driver IC chip is connected to a pad formed at one end of each of a gate line and a data line.

The COG method is a method in which a chip is directly mounted on a thin film transistor array substrate.

On the other hand, the thin film transistor array substrate is a terminal for mounting a chip or a connection terminal with an external circuit, and includes a plurality of pads. Here, the pad is formed in a structure including at least one of a gate electrode layer, a source-drain electrode layer, a pixel electrode layer, a gate insulating layer and an interlayer insulating layer interposed therebetween, such as a thin film transistor array.

However, since the interlayer insulating layer interposed between the source-drain electrode layer and the pixel electrode layer is generally formed relatively thick to secure a storage capacitor above a threshold, the gate electrode layer, the source-drain electrode layer, and a gate insulating layer therebetween are included. It may be formed into a structure. In this case, the pad can prevent the poor contact between the gate electrode layer or the source-drain electrode layer and the pixel electrode layer due to the step of the interlayer insulating layer, while the gate insulating layer is removed due to the process of removing the interlayer insulating layer corresponding to the pad region. While being removed together, there is a problem that the undercut region occurs in the source-drain electrode layer, thereby easily corroding.

Therefore, in order to solve the problems of corrosion and poor contact, the thickness of the interlayer insulating layer in the pad of the structure including the gate electrode layer, the source-drain electrode layer, the pixel electrode layer, the gate insulating layer and the interlayer insulating layer interposed therebetween. Partial control was proposed.

However, since the critical current that can be tolerated varies depending on the thickness of the interlayer insulating layer, it is necessary to grasp the critical current of the pad.

The present invention is to provide an inspection apparatus for a liquid crystal display device and an inspection method thereof capable of measuring a critical current of a pad.

In order to solve the above problems, the present invention is a test device for a COG type liquid crystal display device, the chip mounting pad unit connected to the driver IC for driving any one of the gate line and the data line of the liquid crystal display device; And at least two inspection pads for inspecting a failure of any one of the gate line and the data line, wherein the chip mounting pad unit is connected to any one of the gate line and the data line, so as to signal the driver IC. An output pad for outputting; An input pad connected to an external circuit and receiving a signal of the external circuit; And at least two dummy pads interconnected through the driver IC, wherein the at least two test pads are connected one-to-one with the at least two dummy pads, and at least one of the at least two test pads. And connecting at least one inspection device, wherein the at least two dummy pads and the at least two inspection pads form a closed circuit together with a driver IC connected to the chip mounting pad part and the inspection equipment, and the inspection equipment closes the closed circuit. The present invention provides an inspection apparatus for a liquid crystal display device which measures a threshold current between the dummy pad and the inspection pad.

In the inspection method using the inspection apparatus of the liquid crystal display device as described above, a driver IC is connected to the chip mounting pad unit to interconnect the two dummy pads, and between the two inspection pads. Connecting the inspection equipment to the one-to-one dummy pad and the inspection pad together with the driver IC and the inspection equipment to form a closed circuit; Gradually increasing the current of the closed circuit using the inspection equipment; Checking whether the closed circuit is destroyed and the current becomes zero, and gradually increasing the current of the closed circuit again when the measured current is not zero; The method may further include detecting a threshold current by selecting a set current as a threshold current when the measured current is 0.

The inspection apparatus of the liquid crystal display according to the exemplary embodiment of the present disclosure includes at least two dummy pads of the pad mounting portion of the chip, and at least two inspection pads connected in a one-to-one manner.

Thus, if two dummy pads are interconnected through a drive IC and at least one test equipment is connected between the two test pads, a closed circuit is formed, and thus the critical current of the dummy pad and the test pad can be measured. .

1 is a schematic diagram illustrating a thin film transistor array substrate of a liquid crystal display according to an exemplary embodiment of the present disclosure.
FIG. 2 is a view of a portion I of FIG. 1.
3 is a cross-sectional view illustrating the thin film transistor of FIG. 1.
4 is a cross-sectional view illustrating the pad of FIG. 1.
5 is a flowchart illustrating a test method of a liquid crystal display according to an exemplary embodiment of the present application.
6A and 6B are flowcharts illustrating each step of FIG. 5.

Hereinafter, an inspection apparatus of a COG type liquid crystal display device and an inspection method thereof according to an embodiment of the present application will be described in detail with reference to the accompanying drawings.

FIG. 1 is a schematic view illustrating a thin film transistor array substrate of a liquid crystal display according to an exemplary embodiment of the present disclosure, and FIG. 2 is a view of a portion I of FIG. 1. 3 is a cross-sectional view illustrating the thin film transistor of FIG. 1, and FIG. 4 is a cross-sectional view illustrating the pad of FIG. 1.

As illustrated in FIG. 1, a liquid crystal display according to an exemplary embodiment of the present disclosure may display a display area on a thin film transistor array substrate (not shown) so as to define a plurality of pixel areas PA corresponding to the display area AA. A plurality of pixel areas PA may be formed at intersections between the gate line GL and the data line DL, and the gate line GL and the data line DL, which are formed to cross each other in the direction AA. A plurality of thin film transistors TFT and a plurality of pixel electrodes PE formed to correspond to the plurality of pixel regions PA and connected to the plurality of thin film transistors TFT are included.

Here, one end of each of the gate line GL and the data line DL extends outside the display area AA and is connected to each pad PAD. Accordingly, at least one driver IC chip IC mounted in the non-display area on the thin film transistor array substrate is connected to each of the gate line GL and the data line DL through the pad PAD, and thus the gate line GL. And a respective driving signal to the data line DL.

As shown in FIG. 2, the chip mounting pad unit 10 connected to the driver IC chip IC is connected to one of the gate line GL and the data line DL to output a signal of the driver IC. And an output pad 11 connected to an external circuit (not shown), an input pad 12 receiving a signal of an external circuit, and at least two dummy pads 13 connected to each other through a driver IC.

Here, at least two dummy pads 13 are not connected to any one of the gate line GL and the data line DL and to an external circuit. At least two dummy pads 13 are interconnected by the installed driver IC when the driver IC is installed in the pad mounting portion 10. That is, the driver IC includes a wiring connecting the dummy pads 13.

In addition, the liquid crystal display further includes two or more inspection pads 20 for detecting the presence or absence of defects in each process for manufacturing the liquid crystal display.

In this case, two or more inspection pads 20 may be provided to correspond to the pixel areas emitting the same color. For example, the two or more inspection pads 20 may include a first inspection pad 21 corresponding to a pixel area emitting red light, a second inspection pad 22 corresponding to a pixel area emitting green light, and a blue color. A third inspection pad 23 corresponding to the pixel area for emitting light may be included.

However, this is merely an example, and each test pad 21, 22, 23 is connected to a pad 11 of a different line within a range satisfying a condition including two or more test pads 20. It may be formed to.

Since the two or more inspection pads 20 are used for defect inspection during the manufacturing process, when the manufacturing process of the liquid crystal display device is completed, the two or more inspection pads 20 are separated from the pads 11 of each line by the laser cutting line Cut_L.

In addition, the liquid crystal display further includes an external circuit pad 30 that is connected to the input pad 12 of the chip mounting pad unit 10 and is a connection terminal of an external circuit.

As shown in FIG. 3, the thin film transistor TFT of each pixel area (PA of FIG. 1) is disposed on the gate electrode GE formed on the substrate 101 and the gate insulating film 102 covering the gate electrode GE. An active layer ACT formed to overlap at least a portion of the gate electrode GE, and a source electrode SE and a drain electrode DE formed on both sides of the active layer ACT are spaced apart from each other.

The thin film transistor TFT is covered with first and second interlayer insulating layers 103 and 104 sequentially formed on the entire surface of the gate insulating film 102. Here, the first interlayer insulating layer 103 may be an SiN-based insulating material, and the second interlayer insulating layer 104 may be photo acryl.

The pixel electrode PE and the common electrode CE are formed on the second interlayer insulating layer 104. The pixel electrode PE is connected to the drain electrode DE through the contact holes CT_PE passing through the first and second interlayer insulating layers 103 and 104. The common electrode CE is connected to a common line (not shown) that supplies a common voltage.

As shown in FIG. 4, the pad PAD is formed on the first pad layer PAD1 formed on the substrate 101 and the second pad formed on the gate insulating film 102 covering the first pad layer PAD1. The layer PAD2 and the third pad layer PAD3 are formed on the first and second interlayer insulating films 103 and 104 'covering the second pad layer PAD2. The second pad layer PAD2 is connected to the first pad layer PAD1 through a contact hole penetrating through the gate insulating layer 102, and the third pad layer PAD3 is connected to the first and second interlayer insulating layers 103. It is connected to the second pad layer PAD2 through a contact hole penetrating through 104 '.

In this case, the second interlayer insulating film 104 ′ of the pad PAD prevents the gate insulating film 102 from being removed to corrode the first or second pad layers PAD1 and PAD2, but the pad layer PAD1 due to the step difference. In order to prevent poor contact between the PAD2 and the PAD3, a thickness thinner than that of the interlayer insulating film 104 (FIG. 3) covering the thin film transistor TFT is formed.

For reference, the pad PAD illustrated in FIG. 4 is merely an example, and the output pad 11, the input pad 12, the dummy pad 13, and the test pad included in the pad mounting portion 10 may be provided. Each of the pad 20 and the external circuit pad 30 may have a structure including any one of the first and second pad layers PAD1 and PAD2 and the third pad layer PAD.

As described above, the pad PAD according to the exemplary embodiment of the present disclosure includes a second interlayer insulating film 104 ′ having a thickness thinner than that of the thin film transistor TFT, and thus corresponds to a thinned second interlayer insulating film 104 ′. It is necessary to measure the critical current.

Thus, according to one embodiment of the present application, at least two dummy pads 13 and at least two inspection pads 20 are connected one-to-one, and then drive IC and inspection equipment connected to the chip mounting pad part. Together, a closed loop can be constructed. Using this closed circuit, the threshold current of the pad PAD is measured.

5 is a flowchart illustrating a method of inspecting a liquid crystal display according to an exemplary embodiment of the present application, and FIGS. 6A and 6B are process diagrams illustrating respective steps of FIG. 5.

As shown in FIG. 5, the inspection method of the liquid crystal display according to the exemplary embodiment of the present application connects two dummy pads to each other by connecting a driver IC to a pad for chip mounting, and inspects between two inspection pads. Forming a closed circuit by connecting the equipment (S110), step of gradually increasing the current of the closed circuit using the inspection equipment (S120), checking whether the closed circuit is destroyed and the current becomes zero (S130), measurement If the current is not 0, gradually increasing the closed circuit current again (S120), and if the measured current is 0, selecting the set current as the threshold current and detecting the threshold current (S140).

As shown in FIG. 6A, in the thin film transistor array substrate SUB, the first inspection pad 21 and the first dummy pad 13a are formed to be connected to each other, and the second inspection pad 22 and the second inspection pad 22 are formed to be interconnected. The two dummy pads 13b are formed to be connected to each other. When the drive IC 200 is mounted on the chip mounting pad unit (IC in FIG. 1), the first and second dummy pads 13a and 12b are connected to each other by the drive IC 200. When the test equipment 300 is connected between the first and second test pads 21 and 22, the first test pad 21, the first and second dummy pads 13a and 13b, and the IC ( 200, a closed circuit including a test equipment 300 and a second test pad 22 is formed. (S110)

In this case, the inspection apparatus 300 may include a power supply device and an electronic load device.

Then, by using the inspection equipment 300, the current of the closed circuit (CLOSED CIRCUIT) is measured while gradually increasing the current of the closed circuit (CLOSED CIRCUIT). (S120)

At this time, if the current of the closed circuit (CLOSED CIRCUIT) is measured as 0 (S130), the current value applied at this time is detected as a threshold current. (S140)

That is, as shown in FIG. 6B, when the current is measured as 0 (S130), the second interlayer insulating film (104 'of FIG. 4) of the pad PAD is broken, causing disconnection between the test pad and the dummy pad. To be considered. That is, the threshold current is a value that disconnects between the test pad and the dummy pad, and is a threshold value that the second interlayer insulating film 104 'of the pad PAD can withstand.

As described above, the inspection apparatus of the liquid crystal display according to the exemplary embodiment of the present disclosure includes two dummy pads 13 and two inspection pads 20 connected one-to-one to form a closed circuit, thereby providing a pad PAD. The critical current of can be measured.

The present invention described above is not limited to the above-described embodiment and the accompanying drawings, it is conventional in the art that various substitutions, modifications and changes are possible within the scope without departing from the technical spirit of the present invention. It will be evident to those who have knowledge of.

AA: display area PA: pixel area
GL: Gateline DL: Dataline
TFT: thin film transistor PE: pixel electrode
IC: Drive IC PAD: Pad
10: chip mounting pad part 11: output pad
12: Input Pad 13: Dummy Pad
20: Inspection pad Cut_L: Cutting line
200: drive IC 300: inspection equipment

Claims (6)

In the inspection apparatus of the COG type liquid crystal display device,
A chip mounting pad unit connected to a driver IC for driving any one of a gate line and a data line of the liquid crystal display device; And
At least two inspection pads for inspecting a failure of any one of the gate line and the data line;
The chip mounting pad portion
An output pad connected to any one of the gate line and the data line to output a signal of the driver IC;
An input pad connected to an external circuit and receiving a signal of the external circuit; And
At least two dummy pads are interconnected through the driver IC,
The at least two test pads are connected one-to-one with the at least two dummy pads,
At least one inspection device is connected between the at least two inspection pads, and the at least two dummy pads and the at least two inspection pads together with a driver IC connected to the chip mounting pad part and the inspection device. And a test circuit for measuring the critical current of the dummy pad and the test pad using the closed circuit. The method of claim 1,
Each of the at least two test pads and the at least two dummy pads,
A first conductive layer;
At least one insulating layer formed to cover the first conductive layer; And
And a second conductive layer formed on the insulating layer and in contact with the first conductive layer through a contact hole penetrating through the insulating layer. The method of claim 2,
Any one of the at least one insulating layer is a photoacryl (Photo acryl) inspection device of the liquid crystal display device. The method of claim 2,
The first conductive layer is formed the same as any one of the gate line and the data line,
And the second conductive layer is formed in the same manner as the pixel electrode. In the inspection method using the inspection apparatus of the liquid crystal display device according to any one of claims 1 to 4,
A driver IC connected to the chip mounting pad unit to interconnect the two dummy pads, a test equipment connected between the two test pads, and a one-to-one dummy pad and an test pad; And forming a closed circuit together with the inspection equipment.
Gradually increasing the current of the closed circuit using the inspection equipment;
Checking whether the closed circuit is destroyed and the current becomes zero, and gradually increasing the current of the closed circuit again when the measured current is not zero; And
And detecting a threshold current by selecting the set current as a threshold current when the measured current is 0. The method of claim 5,
And the threshold current disconnects between the test pad and the dummy pad.

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