KR102027170B1 - Liquid crystal display device and driving method thereof - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display, and in particular, to control the polarity of data voltages output to three data lines through one data voltage output channel in a 1-pixel inversion method, and a method of driving the same. To provide a technical problem. To this end, the liquid crystal display according to the present invention comprises: a liquid crystal display panel having a plurality of pixels formed in each region defined by the intersection of the gate lines and the data lines; Image data are converted into data voltages, one horizontal section is divided into a plurality of sub horizontal sections, and polarities of data voltages respectively output to different data lines through the data voltage output channel are different from each other. A driving integrated circuit converting the data voltages differently and outputting the data voltages in the sub horizontal sections; A gate driving circuit for sequentially outputting scan signals to the gate lines; A data distribution unit including a distribution circuit for distributing data voltages sequentially input to the sub horizontal sections from the data output channel of the driving integrated circuit to a plurality of data lines corresponding to the number of the sub horizontal sections; And a timing controller configured to transmit a polarity control signal to the driving integrated circuit such that polarities of the data voltages output to the data lines for each of the sub horizontal sections are different for each of the adjacent data lines.

Description

Liquid crystal display and its driving method {LIQUID CRYSTAL DISPLAY DEVICE AND DRIVING METHOD THEREOF}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device comprising a panel made of low temperature polysilicon (LTPS) and a driving method thereof.

With the development of various portable electronic devices such as mobile communication terminals, smart phones, tablet computers, notebook computers, and the like, there is an increasing demand for a flat panel display device that can be applied thereto. Such flat panel display devices include liquid crystal display devices, plasma display panels, field emission display devices, and organic light emitting display devices. Is being studied.

Among flat panel displays, the liquid crystal display is the most widely used due to the advantages of mass production technology, ease of driving means, and high quality.

The liquid crystal display device drives the liquid crystal panel in various inversion methods to prevent deterioration of the liquid crystal and to improve display quality. The inversion method may include a frame inversion system, a line inversion system, a column inversion system, a dot inversion system, or a z-inversion ( Z-Inversion System).

1 is an exemplary diagram illustrating a general line inversion method and a column inversion method.

Among the inversion schemes described above, the frame inversion scheme inverts the polarity of the data signal supplied to the liquid crystal cells whenever the frame is changed, and the dot inversion scheme is the data signal supplied to the liquid crystal cells. Invert the polarity of the dot in dots and invert the frames. As shown in (a) of FIG. 1, the line inversion method inverts the polarity of the data signal supplied to the liquid crystal cells in units of horizontal lines and inverts in units of frames. As shown in FIG. 1B, the polarities of the data signals supplied to the liquid crystal cells are inverted in units of columns (vertical lines) and inverted for each frame.

FIG. 2 is an exemplary view for explaining a column inversion method of a conventional liquid crystal display device, (a) shows a one pixel column inversion method, and (b) shows a three pixel column inversion method.

The column inversion scheme as described above is further divided into a one pixel column inversion scheme as shown in (a) and a three pixel column inversion scheme as shown in (b).

When the panel to which the column inversion scheme is applied is composed of a red subpixel, a green subpixel, and a blue subpixel, the one pixel column inversion scheme, as shown in (a), For each frame, adjacent columns are charged with data voltages of different polarities.

In this case, since the polarity of the data voltage changes for each column, as shown in (a), the polarity of the column composed of the red subpixels and the column composed of the blue subpixels is the same, and The polarity has a polarity opposite to the above polarity.

In addition, in the 3 pixel column inversion scheme, as shown in (b), a data voltage having the same polarity is charged in three adjacent columns per frame.

In this case, since the polarities of the data voltages change every three columns, as shown in (b), the column composed of adjacent red subpixels, the column composed of green subpixels, and the column composed of blue subpixels are shown. The polarities are all the same.

However, when the panel is driven in the 3 pixel column inversion scheme as described above, the power consumption of the panel is reduced but the image quality is relatively lowered.

That is, in the 3 pixel column inversion method, since the voltage polarity applied to the pixels included in the three vertically adjacent columns is the same, the image quality is deteriorated.

Meanwhile, in a panel in which thin film silicon made of low temperature poly-silicon (LTPS) is formed (hereinafter, simply referred to as an 'LTPS panel'), one panel connected to one port of a driving integrated circuit is used. The data voltage output channel is commonly connected to three data lines.

In this case, the conventional LTPS panel is driven by a 3 pixel column inversion method, which causes deterioration in image quality.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problem, and the liquid crystal display device and its driving, which can control the polarity of the data voltages output to the plurality of data lines through one data voltage output channel in a 1 pixel inversion method. It is a technical task to provide a method.

According to an aspect of the present invention, there is provided a liquid crystal display device including: a liquid crystal display panel having a plurality of pixels formed for each region defined by an intersection of gate lines and data lines; Image data are converted into data voltages, one horizontal section is divided into a plurality of sub horizontal sections, and polarities of data voltages respectively output to different data lines through the data voltage output channel are different from each other. A driving integrated circuit converting the data voltages differently and outputting the data voltages in the sub horizontal sections; A gate driving circuit for sequentially outputting scan signals to the gate lines; A data distribution unit including a distribution circuit for distributing data voltages sequentially input to the sub horizontal sections from the data output channel of the driving integrated circuit to a plurality of data lines corresponding to the number of the sub horizontal sections; And a timing controller configured to transmit a polarity control signal to the driving integrated circuit such that polarities of the data voltages output to the data lines for each of the sub horizontal sections are different for each of the adjacent data lines.

According to an aspect of the present invention, there is provided a method of driving a liquid crystal display device, which converts image data into data voltages, divides one horizontal section into a plurality of sub-horizontal sections, and different data through a data voltage output channel. Converting the polarities of the data voltages respectively output to the lines to be different from each other for the adjacent data lines; And outputting the data voltages sequentially output for each sub horizontal section to each of a plurality of data lines corresponding to the number of the sub horizontal sections.

According to the present invention, power consumption can be reduced by controlling the polarities of the data voltages output through the one data voltage output channel to the plurality of data lines in a 1 pixel inversion method.

1 is an exemplary diagram illustrating a general line inversion method and a column inversion method.
2 is an exemplary view for explaining a column inversion method of a conventional liquid crystal display device.
3 is a schematic view of a liquid crystal display device according to the present invention;
4 is an exemplary view showing a configuration of a data distribution unit applied to a liquid crystal display according to the present invention.
5 is an exemplary view showing a pixel structure and a waveform of a data voltage of a liquid crystal display and a driving method thereof according to the present invention.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

3 is a schematic view of a liquid crystal display according to the present invention. 4 is an exemplary view illustrating a configuration of a data distributor applied to a liquid crystal display according to the present invention.

In the liquid crystal display according to the present invention, as shown in FIG. 3, a liquid crystal display having a plurality of pixels formed for each region defined by the intersection of the gate lines GL1 to GLm and the data lines DL1 to DLn. The panel 100 converts image data into data voltages, divides one horizontal section into a plurality of sub-horizontal sections, and transmits polarities of the data voltages respectively output to different data lines through the data voltage output channel. A driving integrated circuit 300 for converting data lines differently and outputting the data voltages for each sub horizontal section, a gate driving circuit 200 for outputting a scan signal to each gate line during the one horizontal section, The sub-numbers of data voltages sequentially input from the data output channel of the driving integrated circuit 300 every sub horizontal section. The data distributor 400 includes a distribution circuit for distributing the data lines corresponding to the number of sections, and the polarities of the data voltages output to the data lines every sub-horizontal section are adjacent to each data line. And a timing controller (not shown) which transmits polarity control signals to be different from each other to the driving integrated circuit.

First, the liquid crystal display panel 100 includes a lower substrate 110 and an upper substrate 120 bonded together with a liquid crystal layer interposed therebetween.

The lower substrate 110 sequentially processes a plurality of pixels P and m gate lines GL1 to GLm provided by the intersection of n data lines DL1 to DLn and m gate lines GL1 to GLm. It is configured to include a gate driving circuit 200 to drive.

One pixel P constitutes a red subpixel, a green subpixel, or a blue subpixel, and an adjacent red subpixel, a green subpixel, and a blue subpixel form one unit pixel UP. Configure.

Each of the plurality of pixels P may include a thin film transistor T connected to one adjacent gate line and one data line adjacent to each other, a plurality of pixel electrodes (not shown) connected to the thin film transistor T, and a plurality of pixel electrodes. It is configured to include a plurality of common electrodes (not shown) formed between the supplying a common voltage.

The semiconductor layer of the thin film transistor T is formed of polysilicon having a high electron mobility (˜10 cm 2 / Vsec or more) by a low temperature poly-silicon (LTPS) process. When the semiconductor layer of the thin film transistor T is formed of amorphous silicon (a-Si), the semiconductor layer of the thin film transistor T may be formed of polysilicon by a crystallization process using a local laser or heat treatment. have.

The pixel electrode and the common electrode are formed side by side with the liquid crystal layer interposed therebetween, so that the liquid crystal cell LC is formed between the pixel electrode and the common electrode. The liquid crystal cell LC drives the liquid crystal according to the difference voltage between the data voltage supplied through the thin film transistor T and the common voltage supplied to the common electrode to adjust the light transmittance.

A storage capacitor SC is formed in an area where the pixel electrode and the common electrode overlap. The storage capacitor SC maintains the voltage charged in the liquid crystal for a predetermined period of time.

The upper substrate 120 includes a black matrix layer (not shown) defining an opening region (not shown) corresponding to each pixel P of the lower substrate 110 and a color filter layer (not shown) formed in each opening region. It is provided. Meanwhile, the upper substrate 120 may have a common electrode formed in a cylinder according to the liquid crystal driving mode of the liquid crystal layer. In this case, the pixel electrode formed in the lower substrate 110 may also be formed in a cylinder so as to face the common electrode.

Next, the gate driving circuit 200 is formed at one edge portion of the lower substrate 120 to be connected to each of the m gate lines GL1 to GLm. In this case, the gate driving circuit 200 is formed together with the manufacturing process of the thin film transistor T of each pixel P.

The gate driving circuit 200 generates a scan signal according to a gate control signal provided from the timing controller (not shown), and sequentially supplies the scan signal to each of the m gate lines GL1 to GLm.

To this end, the gate driving circuit 200 includes m stages (not shown) connected to each of the m gate lines GL1 to GLm.

Each of the m stages (not shown) may scan a scan signal having a pulse width corresponding to one horizontal section in response to a gate start pulse provided from the driving integrated circuit 300 and a gate control signal including a plurality of gate clock signals. It is generated sequentially and supplied sequentially to the corresponding gate line GL.

Next, the timing controller (not shown) uses the timing signal input from an external system, that is, the vertical synchronization signal Vsync, the horizontal synchronization signal Hsync, the data enable signal DE, and the like, and the gate driving circuit. Generates various control signals for controlling the operation timing of the 200 and the driving integrated circuit 300, receives input image data from the external system, and generates image data to be transmitted to the driving integrated circuit 300. do.

The gate control signal for controlling the gate driving circuit 200 includes a gate start pulse and a plurality of gate clock signals. The data control signal for controlling the driving integrated circuit 300 includes a source start pulse, a source shift clock, a source output signal, and a polarity control signal POL.

That is, the timing controller generates a polarity control signal POL required for the driving integrated circuit to generate a data voltage, and transmits the generated polarity control signal POL to the driving integrated circuit.

In addition, the timing controller transmits a data distribution signal to the data distribution unit 400 so that the data voltages converted according to the polarity control signal are sequentially input to the data lines connected to the distribution circuit. . That is, the timing controller generates and supplies a data distribution signal DDS for controlling the data distributor 400 according to the polarity pattern of the output data voltage.

The timing controller may be integrally formed with the driving integrated circuit 300 or may be connected to the driving integrated circuit 300 and the gate driving circuit 200 in a state of being mounted on a separate board. Can be.

The timing controller may be configured to generate the red image data and the blue image data to be output to the red sub-pixel and the blue sub-pixel which are formed to be spaced apart from each other among the pixels formed of red, green, and blue. The image data is changed and output as common image data that does not deteriorate in red and blue quality. That is, since the red data voltage and the blue data voltage are simultaneously supplied to the red and blue subpixels, the timing controller corrects the image data to be output to the red subpixels and the blue subpixels. Output the same video data so that it does not

Next, the driving integrated circuit 300 may be mounted on a non-display area of the lower substrate 110 in a chip on glass (COG) type or may be connected to the liquid crystal display panel 100 in the form of a chip on film (COF). have.

The driving integrated circuit 300 converts the digital image data supplied from the timing controller in units of one horizontal line into a positive data voltage and a negative data voltage according to the polarity control signal transmitted from the timing controller. One horizontal section is divided into a plurality of sub horizontal sections and is sequentially output.

The driving integrated circuit 300 may convert the digital image data R, G, and B supplied from the timing controller according to the data control signal supplied from the timing controller to a positive data voltage corresponding to a predetermined polarity inversion pattern. The data voltage is sequentially converted to the negative data voltage, and the data voltages are sequentially supplied to the data distributor 400 in a plurality of sub horizontal sections constituting one horizontal section.

To this end, the driving integrated circuit 300 may include a shift register, a latch unit, a gamma voltage unit, and a digital-analog converter.

The shift register shifts a source start pulse input from the timing controller according to a source shift clock to generate a sequentially shifted sampling signal.

The latch unit samples digital image data (R, G, B) of one horizontal line input according to the sampling signal sequentially input from the shift register, thereby red (R), green (G), and blue (B). The digital-to-analog converter is sequentially latched and sequentially latches the red (R), green (G), and blue (B) digital image data corresponding to each sub-horizontal section of one horizontal section according to the source output signal. To feed.

The gamma voltage unit divides the plurality of gamma reference voltages input from the outside to correspond to the number of gray levels of the digital image data to generate a plurality of positive gray voltages and a plurality of negative gray voltages, and generates the plurality of positive gray voltages. And a plurality of negative gray voltages are supplied to the digital-analog converter.

The digital-analog converter selects one positive gray voltage and one negative gray voltage corresponding to the digital image data input from the latch unit among a plurality of positive gray voltages and a plurality of negative gray voltages, and selects a polarity. According to the control signal POL, one of the positive gray voltage and the negative gray voltage is selected as the data voltage and supplied to the data distributor 400.

The digital-analog converter has a plurality of data output channels CH, and polarities of data voltages output from each of the plurality of data output channels CH in each sub-horizontal period are connected to the data output channels. Each data line is inverted.

That is, the digital-analog converter selects polarities of the image data to have different polarities for adjacent data lines on the liquid crystal display panel 100. The polarity of the image data may be selected by a polarity control signal transmitted from the timing controller.

Finally, the data distributor 400 includes at least one distribution circuit 410 as shown in FIG. 4. The number of the distribution circuits 410 constituting the data distribution unit 400 may be variously set according to the size of the liquid crystal display panel 100 and the number of channels of the driving integrated circuit.

Each of the distribution circuits 410 is connected to two data lines formed in the liquid crystal display panel 100. As illustrated in FIG. 5, a first data line DL1 of the two data lines is connected to a red subpixel and a blue subpixel among pixels formed in one horizontal line. The data line DL2 is connected to the red subpixel and the green subpixel formed between the blue subpixel among the pixels formed on the one horizontal line.

The above-described configuration assumes that the liquid crystal display panel 100 is composed of red subpixels, green subpixels, and blue subpixels.

Each of the distribution circuits 410 is connected to the driving integrated circuit 300 through one data voltage output channel CH, as shown in FIG. 4.

Each of the distribution circuits 410 has switching transistors S1 and S2 connected to each of the two data lines.

That is, each of the distribution circuits 410 constituting the data distribution unit 400 is connected to the driving integrated circuit 300 through one data voltage output channel CH and is connected to the three data lines. Each is connected via three switching transistors.

The two switching transistors formed in each of the distribution circuits 410 of the data distribution unit 400 are sequentially turned on according to the data distribution signal DDS transmitted from the timing controller.

5 is an exemplary view showing a waveform of a pixel structure and a data voltage of a liquid crystal display and a driving method thereof according to the present invention.

The liquid crystal display according to the present invention includes a distribution circuit 410 shown in FIG.

In the liquid crystal display panel 100 according to the present invention, one gate line passes through one horizontal line as illustrated in FIG. 5.

In the liquid crystal display panel 100 according to the present invention, as shown in FIG. 5, two data lines DL1 and DL2 are formed to drive the red subpixel, the green subpixel, and the blue subpixel. have.

The two data lines DL1 and DL2 are connected to the distribution circuit 410 as shown in FIG. 4.

In this case, the timing controller causes the data voltages converted according to the polarity control signal POL to be output to one or more odd-numbered subpixels among subpixels connected to the distribution circuit, and then one or more subpixels. Data distribution signals DDS1 and DDS2 to be output to even-numbered data subpixels are transmitted to the data distribution unit.

First, according to the present invention, the first switching transistor S1 is turned on by the first data distribution signal DDS1 input to the distribution circuit 410 shown in FIG. 4 so that the red data voltage and the blue data voltage are zero. It is output to one data line D1.

Here, the red data voltage and the blue data voltage are the same data voltage. That is, as described above, the timing controller converts the red image data and the blue image data to be output to the red sub-pixel and the green sub-pixel commonly connected to the first data line DL1 as one common image data. And, accordingly, the same data voltage is output.

In this case, one data voltage Data R / B forming the red image data and the blue image data has a positive polarity, for example, as shown in FIG. 5.

Next, the second switching transistor S2 is turned on by the second data distribution signal DDS2, and the green data voltage Data G is output to the second data line DL2.

That is, after the data voltage is output to the odd subpixels through the first data line DL1 by the odd-numbered data distribution signal DDS1 and then by the even-numbered data distribution signal DDS2, the second data line Through DL2, a data voltage is output to an even subpixel.

Here, the odd-numbered sub-pixels or the even-numbered sub-pixels refer to an order within one unit pixel composed of a red subpixel, a green subpixel, and a blue subpixel as described above. That is, not for all subpixels on one horizontal line.

In this case, the digital-analog converter of the driving integrated circuit 300 may have a green color having a polarity different from that of the red data voltage and the blue data voltage according to the polarity control signal POL transmitted from the timing controller. Output the data voltage (Data G).

Thus, as shown in FIG. 5, the data voltages output to the adjacent data lines of the data lines have different polarities.

That is, when the red subpixels, the green subpixels, and the blue subpixels, which form one unit pixel, are sequentially arranged, the red subpixel R, which is spaced apart from the green subpixel, is disposed. As the blue subpixel B, a data voltage having the same polarity, for example, a positive polarity (+), is output. After the data voltages having the positive polarity are output, the green data voltage having the negative polarity (−) is output to the green subpixel.

Therefore, when viewed as a whole of the unit pixel, data voltages having different polarities are output to subpixels R and G or G and B that are adjacent to each other.

For this reason, the liquid crystal display according to the present invention can be driven in the same manner as the one-pixel inversion method.

At this time, during one horizontal period 1H, one scan signal Gate1 is output from the gate driving circuit 200 to the first gate line GL1 and the second gate line GL2.

In a period corresponding to two thirds of one horizontal period 1H, while the scan signal Gate1 is output to the gate line GL1, odd-numbered subpixels, that is, through the first data line DL1, One positive data voltage Data R / B corresponding to a red data voltage and a blue data voltage is charged with the red subpixels and the blue subpixels.

In a period corresponding to the remaining 1/3 of one horizontal period 1H, a negative (-) green data voltage (Data G) is transmitted to the odd pixel, that is, the green pixel, through the second data line DL2. Is input and filled in the green pixel.

Those skilled in the art to which the present invention pertains will understand that the present invention can be implemented in other specific forms without changing the technical spirit or essential features. Therefore, it is to be understood that the embodiments described above are exemplary in all respects and not restrictive. The scope of the present invention is shown by the following claims rather than the detailed description, and all changes or modifications derived from the meaning and scope of the claims and their equivalent concepts should be construed as being included in the scope of the present invention. do.

100 liquid crystal display panel 200 gate driving circuit
300: driving integrated circuit 400: data distribution unit
410: distribution circuit

Claims (10)

A liquid crystal display panel having a plurality of pixels formed for each region defined by the intersection of the gate lines and the data lines;
Image data are converted into data voltages, one horizontal section is divided into a plurality of sub horizontal sections, and polarities of data voltages respectively output to different data lines through the data voltage output channel are different from each other. A driving integrated circuit converting the data voltages differently and outputting the data voltages in each of the sub horizontal sections;
A gate driving circuit for sequentially outputting scan signals to the gate lines;
A data distribution unit including a distribution circuit for distributing data voltages sequentially input to the sub horizontal sections from the data voltage output channel of the driving integrated circuit to a plurality of data lines corresponding to the number of the sub horizontal sections. ; And
A timing controller for transmitting a polarity control signal to the driving integrated circuit such that polarities of the data voltages output to the data lines for each of the sub horizontal sections are different for each of the adjacent data lines;
Two sub pixels that are spaced apart from each other among the sub pixels forming one unit pixel are supplied with the same data voltage through a first data line provided in the distribution circuit, and are provided between the two sub pixels. And a data voltage supplied to another sub pixel through a second data line of the distribution circuit. The method of claim 1,
The driving integrated circuit,
And converting the image data transmitted from the timing controller according to the polarity control signal (POL) to have different polarities for each adjacent data line. The method of claim 1,
The timing controller,
Transmitting a data distribution signal to the data distribution unit to sequentially input the data voltages converted according to the polarity control signal to the first data line and the second data line connected to the distribution circuit,
And data voltages output to the first data line and the second data line have different polarities. The method of claim 1,
The timing controller,
One or more odd numbered sub-pixels of the sub-pixels forming the unit pixel through the first data line connected to the distribution circuit in which one of the data voltages converted according to the polarity control signal is connected. After outputting to the subpixels, a data distribution signal for outputting another data voltage to one or more even subpixels through the second data line to the data distribution unit,
And the data voltages output to the adjacent subpixels of the subpixels have different polarities. The method of claim 4, wherein
Among the subpixels forming the unit pixel on one horizontal line, the two subpixels connected to the first data line are spaced apart from each other with the other subpixel interposed therebetween, and have the same polarity. Receive the same data voltage,
Among the sub pixels forming the unit pixel, the another sub pixel connected to the second data line receives a data voltage having a polarity opposite to that of the two sub pixels. LCD display device. Image data are converted into data voltages, one horizontal section is divided into a plurality of sub horizontal sections, and polarities of data voltages respectively output to different data lines through the data voltage output channel are different from each other. Converting and outputting differently; And
Outputting the data voltages sequentially output for each sub horizontal section to each of a plurality of data lines corresponding to the number of the sub horizontal sections,
Two sub pixels spaced apart from each other among the sub pixels forming one unit pixel are supplied with the same data voltage through a first data line provided in a distribution circuit connected to the data voltage output channel. Another sub-pixel provided between them is a liquid crystal display device driving method is supplied with a data voltage through a second data line provided in the distribution circuit. The method of claim 6,
Converting and outputting the polarity of the data voltages differently,
And aligning the sorted image data to have different polarities for each adjacent data line according to the polarity control signal (POL). The method of claim 6,
The outputting of the data voltages to each of the plurality of data lines may include:
Outputting the data voltages converted according to the polarity control signal sequentially according to a data distribution signal for sequentially inputting the data voltages to the first data line and the second data line connected to the distribution circuit,
And the data voltages output to the first data line and the second data line have different polarities. The method of claim 6,
The outputting of the data voltages to each of the plurality of data lines may include:
One or more odd-numbered sub-ths of the sub-pixels forming the unit pixel through one of the data voltages converted according to the polarity control signal through the first data line connected to the distribution circuit. After outputting to the pixels, another data voltage is output to one or more even-numbered subpixels through the second data line,
And the data voltages outputted to adjacent ones of the subpixels have different polarities. The method of claim 6,
The outputting of the data voltages to each of the plurality of data lines may include:
Among the subpixels forming the unit pixel on one horizontal line, the two subpixels spaced apart from each other with the other subpixel therebetween and connected to the first data line have the same polarity. Outputting the same data voltage; And
Outputting a data voltage having a polarity opposite to that of the two subpixels as another subpixel connected to the second data line among the subpixels forming the unit pixel; A liquid crystal display device driving method.

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