KR102022346B1 - Semiconductor light emitting device and manufacturing method of the same - Google Patents

Semiconductor light emitting device and manufacturing method of the same Download PDF

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KR102022346B1
KR102022346B1 KR1020130018552A KR20130018552A KR102022346B1 KR 102022346 B1 KR102022346 B1 KR 102022346B1 KR 1020130018552 A KR1020130018552 A KR 1020130018552A KR 20130018552 A KR20130018552 A KR 20130018552A KR 102022346 B1 KR102022346 B1 KR 102022346B1
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semiconductor layer
base semiconductor
layer
substrate
base
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KR1020130018552A
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Korean (ko)
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KR20140104717A (en
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이건훈
박성현
윤의준
윤석호
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삼성전자주식회사
서울대학교산학협력단
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/12—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0091—Scattering means in or on the semiconductor body or semiconductor body package

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  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

One aspect of the present invention is a base semiconductor layer having at least one pore group group in which a plurality of pores are clustered, a first conductive semiconductor layer formed on the base semiconductor layer, and Provided is a semiconductor light emitting device comprising an active layer formed and a second conductive semiconductor layer formed on the active layer. According to one embodiment of the present invention, a semiconductor light emitting device excellent in crystallinity of a semiconductor layer and improved in light efficiency can be obtained.

Description

Semiconductor light emitting device and manufacturing method thereof {SEMICONDUCTOR LIGHT EMITTING DEVICE AND MANUFACTURING METHOD OF THE SAME}

The present invention relates to a semiconductor light emitting device and a method for manufacturing the semiconductor light emitting device.

A light emitting diode (LED), which is a kind of semiconductor light emitting device, is a semiconductor device capable of generating light of various colors by recombination of electrons and holes, and has a long life, a low power supply, excellent initial driving characteristics, Demand continues to increase due to several advantages, such as high vibration resistance. In particular, group III nitride semiconductors that can generate light in the blue wavelength short wavelength region have recently been in the spotlight. Meanwhile, in the growth of nitride semiconductors, lattice defects occur within the semiconductor due to the difference in lattice constant and thermal expansion coefficient between the substrate and the semiconductor, and cracks due to stress generation are problematic. In addition, due to the difference in refractive index between the material constituting the semiconductor and the external material (for example, the substrate or air) has been pointed out that the light generated in the semiconductor is not emitted to the outside but totally reflected inside to reduce the light extraction efficiency.

An object of the present invention is to improve the lattice defect of the semiconductor layer, to minimize the stress acting on the semiconductor layer by the substrate bending during growth, and to allow the light generated inside the light emitting device to be effectively emitted to the outside, luminous efficiency The present invention provides a semiconductor light emitting device that can be improved.

Another object of the present invention is to provide a method for effectively manufacturing a semiconductor light emitting device having the above structure.

However, the object of the present invention is not limited thereto, and even if not explicitly stated, the object or effect which can be grasped from the solution means or embodiment of the problem described below will be included in this.

One aspect of the present invention is a base semiconductor layer having at least one pore group group in which a plurality of pores are clustered, a first conductivity type semiconductor layer formed on the base semiconductor layer, and the first conductivity type semiconductor layer. Provided is a semiconductor light emitting device comprising an active layer formed and a second conductive semiconductor layer formed on the active layer.

The base semiconductor layer may be a nitride semiconductor layer having a nonpolar surface.

On the other hand, the base semiconductor layer further comprises a sapphire substrate formed on the lower surface, the lower surface of the base semiconductor layer may be in contact with the R surface of the sapphire substrate.

The substrate may further include a substrate formed on a lower surface of the base semiconductor layer, and the at least one pore group may be positioned to contact the substrate.

The plurality of pores grouped in the pore group may include a region that increases in a direction away from the bottom surface of the base semiconductor layer.

The base semiconductor layer may be a semiconductor layer doped with a first conductivity type to have the same conductivity type as the first conductivity type semiconductor layer.

Alternatively, the base semiconductor layer may be an undoped semiconductor layer.

According to another aspect of the present invention, there is provided a method including forming a base semiconductor layer including at least one group of pores in which a plurality of pores are clustered on a substrate, and forming a first conductivity type semiconductor layer on the base semiconductor layer; And forming an active layer on the first conductivity type semiconductor layer and forming a second conductivity type semiconductor layer on the active layer.

The forming of the base semiconductor layer may include forming a first base semiconductor layer having at least one trench on a substrate, providing a plurality of beads in the trench, and forming the first semiconductor layer. Forming a second base semiconductor layer on the base semiconductor layer, and removing a plurality of beads formed in the trench to form a group of voids in which a plurality of pores are clustered in the first and second base semiconductor layers; And forming a third base semiconductor layer to cover the groove.

The substrate may be a sapphire substrate, and the forming of the base semiconductor layer on the substrate may include forming the base semiconductor layer on the R surface of the sapphire substrate.

In addition, the solution of the said subject does not enumerate all the features of this invention. Various features of the present invention and the advantages and effects thereof may be understood in more detail with reference to the following specific embodiments.

According to one embodiment of the present invention, a semiconductor light emitting device having improved luminous efficiency can be obtained from a semiconductor layer having excellent quality.

In addition, a method capable of efficiently manufacturing a semiconductor light emitting device having the above structure can be obtained.

However, the advantageous advantages and effects of the present invention are not limited to the above description, and other technical effects not mentioned will be more readily understood by those skilled in the art from the following description.

1 is a cross-sectional view schematically showing a semiconductor light emitting device according to an embodiment of the present invention.
2 is a flowchart schematically illustrating a method of manufacturing a semiconductor light emitting device according to an embodiment of the present invention.
3 is a cross-sectional view for each process for describing the step of forming the base semiconductor layer in more detail.
4 and 5 are cross-sectional views schematically showing a semiconductor light emitting device according to still another embodiment of the present invention.
FIG. 6 is a photograph illustrating a step of forming a base semiconductor layer illustrated in FIG. 3.

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

However, embodiments of the present invention may be modified in various other forms, and the scope of the present invention is not limited to the embodiments described below. In addition, the embodiments of the present invention are provided to more completely explain the present invention to those skilled in the art. Accordingly, the shape and size of elements in the drawings may be exaggerated for clarity.

1 is a schematic cross-sectional view of a semiconductor light emitting device 100 according to an embodiment of the present invention.

Referring to FIG. 1, the semiconductor light emitting device 100 according to the present embodiment includes a substrate 110 and at least one pore group 50 formed on the substrate 110 and having a plurality of pores g clustered therein. ) A base semiconductor layer 120, a first conductive semiconductor layer 121 formed on the base semiconductor layer 120, an active layer 130 formed on the first conductive semiconductor layer 121, and The second conductive semiconductor layer 140 is formed on the active layer 130.

In the present exemplary embodiment, the semiconductor light emitting device 100 may include first and second electrodes 161 and 162 electrically connected to the first and second conductive semiconductor layers 121 and 140.

The substrate 110 may be provided as a substrate for semiconductor growth, and a substrate made of an electrically insulating and conductive material such as sapphire, SiC, MgAl 2 O 4 , MgO, LiAlO 2 , GaN, or the like may be used. In this case, it is preferable to use sapphire having electrical insulation, and sapphire is Hexa-Rhombo R3c symmetry, and the lattice constants in the c-axis and a-axis directions are 13.001Å and 4.758Å, respectively. , C (0001) plane, A (1120) plane, R (1102) plane, and the like.

Although not limited thereto, in the present embodiment, the substrate 110 may be a sapphire substrate provided with an R plane as a semiconductor growth plane. In this case, the luminous efficiency may be improved, and as shown below in FIG. 3, an advantageous structure for forming the pore group 50 may be provided.

To explain in more detail the advantage that the luminous efficiency can be improved, when a GaN-based semiconductor layer having a wurtzite crystal structure is grown by using the C plane of the sapphire substrate, Ga atoms in the upper direction along the c-axis direction In the lower part, spontaneous polariztion occurs based on the Wurtz crystal characteristic of the GaN-based semiconductor layer in which N atoms are first oriented. Furthermore, since the C surface of the sapphire substrate has a c-axis orientation, a piezoelectric polarization occurs in the c-axis direction due to strain due to a lattice constant difference with the sapphire substrate during growth. Such polarization may cause an electrostatic field inside the semiconductor layer. Such an electrostatic field separates the spatial distribution of electrons and holes, and may distort the band gap of the active layer, thereby causing a decrease in the internal quantum efficiency of the light emitting device.

On the other hand, when the R surface of the sapphire substrate is provided as a growth surface, the GaN-based semiconductor layer may be grown to the M surface to the A surface where the Ga atoms and the N atoms exist on the same surface and thus become nonpolar, thereby causing internal quantum due to polarization. Efficiency degradation can be significantly improved. Accordingly, the bottom surface of the base semiconductor layer 120 may be formed to be in contact with the R surface of the sapphire substrate, and the base semiconductor layer 120 may be a nitride semiconductor layer having a nonpolar surface.

However, the present invention is not necessarily limited thereto, and as the substrate 110 according to the present embodiment, a sapphire substrate provided with a C surface as a semiconductor growth surface may be employed, and Si, which is suitable for large diameters and has a relatively low price, may be employed. The substrate may be used. In the case of using a Si substrate, a nucleation layer made of a material such as Al x Ga 1 - x N may be formed on the substrate 110, and a nitride semiconductor having a desired structure may be grown thereon.

The base semiconductor layer 120 and the first and second conductivity-type semiconductor layers 121 and 140 may be nitride semiconductors, for example, Al x In y Ga (1-xy) N composition formula (where 0 ≦ x ≤ 1, 0 ≤ y ≤ 1, 0 ≤ x + y ≤ 1) may be a material such as GaN, AlGaN, InGaN, AlGaInN. However, the present invention is not limited thereto, and may be made of an AlGaInP-based semiconductor or an AlGaAs-based semiconductor instead of a nitride semiconductor.

Dopants may be doped with the first and second conductivity-type semiconductor layers 121 and 140 to have the first and second conductivity types, respectively, but the present invention is not limited thereto. The type may be n-type and p-type, respectively. Here, Si may be used as the n-type dopant, and Zn, Cd, Be, Mg, Ca, Ba, etc. may be used as the p-type dopant.

The base semiconductor layer 120 may be a semiconductor layer doped with a first conductivity type to have the same conductivity type as the first conductivity type semiconductor layer 121, but is not limited thereto. 120 may be an undoped semiconductor layer that functions as a buffer layer. When the base semiconductor layer 120 is employed as a buffer layer, the base semiconductor layer 120 has a function of alleviating lattice defects when the first conductive semiconductor layer 121 is formed, and when the active layer 130 is grown, the substrate ( It may also have a function of reducing the wavelength dispersion of the wafer by adjusting the degree of bending of 110.

In addition, the first and second conductivity-type semiconductor layers 121 and 140 may have a single layer structure, but may have a multi-layer structure having different compositions, thicknesses, or the like as necessary. For example, the first and second conductivity-type semiconductor layers 121 and 140 may each include a carrier injection layer capable of improving the injection efficiency of electrons and holes, and may include various types of superlattice structures. have.

The first conductivity type semiconductor layer 121 may further include a current spreading layer in a portion adjacent to the active layer 130. The current spreading layer may have a structure or an insulating material layer in which a plurality of In x Al y Ga (1-xy) N layers having different compositions or having different impurity contents are repeatedly stacked. In addition, the second conductivity-type semiconductor layer 140 may further include an electron blocking layer in a portion adjacent to the active layer 130. The electron blocking layer may have a structure in which In x Al y Ga (1-xy) N of a plurality of different compositions are laminated or one or more layers composed of Al y Ga (1-y) N, and the active layer ( Since the band gap is larger than that of 130, electrons may be prevented from overflowing to the second conductive semiconductor layer 140 having the second conductivity type (eg, p-type).

The active layer 130 is disposed between the first conductive semiconductor layer 121 and the second conductive semiconductor layer 140 to emit light having a predetermined energy by recombination of electrons and holes. Here, the active layer 130 may be a multiple quantum well (MQW) structure, for example, InGaN / GaN or GaN / AlGaN structure, in which quantum well layers and quantum barrier layers are alternately stacked.

The base semiconductor layer 120, the first and second conductive semiconductor layers 121 and 140, and the active layer 130 may be formed of a metal organic chemical vapor deposition (MOCVD), a hydrogenation vapor epitaxy (Hydride Vapor Phase). Epitaxy, HVPE), Molecular Beam Epitaxy (MBE) and the like can be grown using processes known in the art.

In the present embodiment, the base semiconductor layer 120 includes at least one pore group group 50 in which a plurality of pores g are clustered. In the present exemplary embodiment, the pore group 50 may be formed in an area adjacent to the lower surface of the base semiconductor layer 120 and may be positioned to contact the substrate 110.

As described later, the pore group 50 is a group of a plurality of air-voids g formed by removing a plurality of beads provided during the semiconductor growth process by etching, and the like. The gap g may have a structure in which the outer circumferential surface is completely closed by a material forming the base semiconductor layer 120, but may include a structure in which a portion of the gap g is open in contact with the outer circumferential surface of the other gap g in one region. have.

In addition, as shown in FIG. 1, the plurality of pores g are stacked in the thickness direction in the base semiconductor layer 120 to form a pore group 50, but within the pore group 50. The plurality of voids g may include a region that increases in a direction away from the bottom surface of the base semiconductor layer 120. A more detailed description related to this will be described later in the description related to FIG. 3. First, an operation that can be represented by the void group 50 according to the present embodiment will be described.

In detail, the pore group 50 according to the present embodiment may block dislocations generated when the semiconductor layer is grown. That is, when the semiconductor layer is grown, crystal defects such as dislocations may occur inside due to differences in lattice constants with the substrate. Such crystal defects may propagate upward along the semiconductor layer growth direction to deteriorate the crystallinity of the semiconductor layer. In addition, it can act as a leakage path of the current, thereby lowering the luminous efficiency. In this case, the pore group 50 may form an empty space inside the semiconductor layer to block dislocations from propagating upward with the growth of the semiconductor layer, and thus the semiconductor formed on the pore group 50. The layer can effectively reduce dislocation defect density.

In addition, the substrate 110 made of a heterogeneous material such as sapphire or Si may be warped in the growth process of the semiconductor layer, the cooling process after the growth, etc. due to the difference in the thermal expansion coefficient and the semiconductor layer grown thereon. The stress may cause damage to the semiconductor layer, such as a crack. However, according to the present embodiment, the pore group 50 may form an empty space inside the semiconductor layer to buffer the stress acting on the semiconductor layer to protect the semiconductor layer from cracking and the like.

In addition, the pore group 50 may improve light extraction efficiency by scattering light generated in the active layer 130. Specifically, the light generated inside the semiconductor layer is not extracted to the outside due to the difference in refractive index with the external material (for example, air) and is totally reflected inside, so that a considerable amount of light is lost inside, according to the present embodiment. The pore group 50 may scatter light by acting similarly to the concave-convex pattern in each pore g, thereby improving the external quantum efficiency of the semiconductor light emitting device 100.

Of course, such a light scattering function may be implemented by additionally forming a separate concave-convex pattern on the substrate 110. The uneven pattern of the substrate 110 may be formed by etching a portion of the substrate 110, but is not limited thereto, and the size of the pattern may be selected in a range of 5 nm to 500 μm. The uneven pattern may be employed without particular limitation as long as it is a structure for improving light extraction efficiency in a regular or irregular pattern. The shape may be employed in various forms such as pillars, mountains, hemispherical shapes, polygons, and the like.

However, the method of forming the concave-convex pattern on the substrate 110 requires a substrate etching process, which increases the cost and complicates the process, and may cause a problem in which the substrate 110 is damaged due to the etching process. Can be. However, according to the present exemplary embodiment, the light scattering effect may be realized due to the pore group 50 even though a separate concave-convex pattern is not formed on the substrate 110, thereby obtaining a semiconductor light emitting device having a simplified manufacturing process and a stable structure. There is an advantage to this.

On the other hand, although not shown separately, the semiconductor light emitting device 100 according to the present embodiment may further include a bead (b) to fill at least one of the plurality of pores (g) in the pore group 50. Can be. The bead (b) is not particularly limited as long as it is a material that can be removed by wet etching or dry etching, and may include at least one of nano silica beads and micro silica beads. In this case, it may be understood as an embodiment in which a plurality of beads (b) provided in the semiconductor growth process remain by not undergoing an etching process or remain without being partially removed from the etching process.

The first and second electrodes 161 and 162 may be electrically conductive materials known in the art, such as Ag, Al, Ni, Cr, Pd, Cu, Pt, Sn, W, Au, Rh, Ir, Ru, A material selected from Mg, Zn and the like may be formed by a process such as deposition, sputter plating, or the like. In addition, Ni / Ag, Zn / Ag, Ni / Al, Zn / Al, Pd / Ag, Pd / Al, Ir / Ag. Ir / Au, Pt / Ag, Pt / Al, Ni / Ag / Pt and the like may be employed in a two or more layer structure, and are not limited to the above-mentioned materials, and are not limited as long as the material has conductivity, and the electrode It may be employed as a material forming.

Referring to FIG. 1, a first electrode 161 is formed on a region where the first conductivity type semiconductor layer 121 is exposed, and a second electrode 162 is formed on the second conductivity type semiconductor layer 140. Although shown on the ohmic contact layer 150 formed in the second conductive semiconductor layer 140 and electrically connected to the second conductive semiconductor layer 140, the exemplary embodiment is not limited thereto. It may be provided in various forms as well.

The ohmic contact layer 150 may be formed of a material that exhibits ohmic characteristics electrically with the second conductivity-type semiconductor layer 140, and may be made of a transparent or light reflective material according to the method of using the semiconductor light emitting device 100. . For example, the ohmic contact layer 150 may be formed of a transparent conductive oxide such as ITO, CIO, ZnO, etc., which has a high light transmittance and relatively excellent ohmic contact performance among the transparent electrode material. Alternatively, the ohmic contact layer 150 may be made of a highly reflective material such as Ag, Al, or the like, and in this case, may be suitable for mounting a semiconductor light emitting device in the form of a so-called flip chip. However, the ohmic contact layer 150 is not necessarily required in this embodiment, and may be excluded in some cases.

According to the present embodiment, the pore group 50 is provided to alleviate the lattice defects of the semiconductor layer and the stress acting on the semiconductor layer to obtain a high quality semiconductor layer. Accordingly, the internal quantum efficiency of the semiconductor light emitting device 100 may be improved, and the external quantum efficiency may also be improved due to the light scattering function of the pore group 50.

2 is a flowchart schematically illustrating a method of manufacturing a semiconductor light emitting device according to an embodiment of the present invention.

Referring to FIG. 2, the method of manufacturing a semiconductor light emitting device according to the present embodiment includes forming a base semiconductor layer including at least one pore group group in which a plurality of pores are clustered on a substrate (S10), and the base. Forming a first conductive semiconductor layer on the semiconductor layer (S20), forming an active layer on the first conductive semiconductor layer (S30), and forming a second conductive semiconductor layer on the active layer Step S40 is included. Such semiconductor layer formation may use known semiconductor growth processes such as MOCVD, HVPE, MBE, and the like.

First, the step (S10) of forming the base semiconductor layer will be described in more detail with reference to FIG. 3.

Referring to FIG. 3A, in the forming of the base semiconductor layer 120 (S10), growing the first base semiconductor layer 120a having at least one trench v on the substrate 110 (S11). Starts from).

In the present embodiment, the trench v may be spontaneously formed when the first base semiconductor layer 120a is grown on the substrate 110 without undergoing a separate process. Specifically, when the R surface of the sapphire substrate is used as the growth surface of the substrate 110 when the first base semiconductor layer 120a is grown, the first base semiconductor layer 120a has the c-axis growing in parallel with the surface thereof. A plurality of islands (i) are formed, and in this case, the first base semiconductor layer (120a) has a trench (v) spontaneously formed at the boundary between the plurality of islands (i) without forming a flat surface Can be.

In this case, a separate process for forming the trench v, for example, forming a mask such as SiO 2 on the substrate 110 or etching a part after forming a base semiconductor layer is not required. In this case, the process can be significantly simplified.

Next, a bead (b) is provided on the trench v as shown in FIG. 3B (S12). The beads (b) may be nanospheres or microspheres that may be removed by wet etching or dry etching, and may include, for example, at least one of nano silica beads and micro silica beads, and may include spin coating or the like. Screen printing may be applied to the trench v by applying screen printing or the like.

Further, as shown, when the trench v is provided to have a predetermined inclination angle at the boundary between the plurality of islands i, the plurality of beads b are stacked in the thickness direction in the trench v. However, the amount may be increased toward the direction away from the surface where the first base semiconductor layer 120a and the substrate 110 are in contact with each other.

In this case, the thickness t2 formed by loading the beads b may be the thickness t3 of the pore collection group according to the embodiment of the present invention through a later process. That is, the thickness t3 of the pore group according to the present embodiment can be adjusted by controlling the thickness t2 formed by loading the beads b, where the thickness t2 formed by loading the beads b ) May be controlled by adjusting at least one parameter of the growth thickness t1 of the first base semiconductor layer 120a in which the trench is formed and the amount of the beads b provided in the trench.

Thereafter, as shown in FIG. 3C, a second base semiconductor layer 120b is formed on the first base semiconductor layer 120a (S13). This step may also be understood to regrow the first base semiconductor layer 120a after providing the beads b on the trench v. FIG.

In this step, Epitaxial Lateral Overgrowth (ELO) may be applied to allow the second base semiconductor layer 120b to grow while more easily filling the gap between the beads b.

Next, as shown in FIG. 3D, the growth of the second base semiconductor layer 120b is stopped while the second base semiconductor layer 120b does not completely cover the trench v. Removing the plurality of beads (b) formed to form a plurality of pores (g) is a group of voids group (50) (S14).

The bead (b) may be removed by applying wet etching to dry etching. In the case of applying wet etching, for example, the etching solution e may be easily penetrated into the trench v by stopping the growth while the second base semiconductor layer 120b does not completely cover the trench v. By removing the beads (b) using the etching solution (e) to form a void (g) in the area occupied by the beads (b). At this time, for example, hydrogen fluoride (HF) may be used as the etchant (e).

A plurality of voids (g) formed in this step is an empty space provided by removing a plurality of beads (b), respectively, the void group group 50 in which the plurality of voids (g) is clustered is shown in Figure 3a It will be understood that the counter v is provided in correspondence.

Next, as shown in FIG. 3E, the third base semiconductor layer 120c is formed to cover the trench v (S15). In this step, the third base semiconductor layer 120c may be sufficiently grown so that the top surface is a flat surface, and ELO may be applied.

Meanwhile, the first to third base semiconductor layers 120a, 120b, and 120c may be semiconductor layers doped to have a first conductivity type, but are not limited thereto. Thus, the first to third base semiconductor layers 120a may be used. , 120b and 120c may be an undoped semiconductor layer. When the undoped semiconductor layer is employed, the base semiconductor layer can function as a buffer layer in the semiconductor light emitting device.

In addition, since the first to third base semiconductor layers 120a, 120b, and 120c do not necessarily need to be doped with the same dopant, the first base semiconductor layer 120a is provided as an undoped semiconductor layer, and the second and third The base semiconductor layers 120b and 120c may be provided as semiconductor layers doped to have a first conductivity type.

Next, referring back to FIG. 2, a first conductive semiconductor layer is formed on the base semiconductor layer (S20), and an active layer is formed on the first conductive semiconductor layer (S30). As described above, the active layer may be formed to have a quantum well layer and a quantum barrier layer in which multiple quantum wells (MQW) structures, for example, InGaN / GaN or GaN / AlGaN structures, are alternately stacked. .

Thereafter, a second conductive semiconductor layer is formed on the active layer (S40), and although not separately illustrated, an ohmic electrode layer is formed on the second conductive semiconductor layer, and then the first and second conductive semiconductor layers are respectively formed. By forming the first and second electrodes to be connected, the structure as shown in FIG. 1 may be obtained.

According to the present embodiment, the internal quantum efficiency is improved by providing the pore group 50 to alleviate the lattice defects of the semiconductor layer and the stress acting on the semiconductor layer to obtain a high quality semiconductor layer, and the pore group 50 Due to the light scattering function of), a semiconductor light emitting device having improved external quantum efficiency can be efficiently and easily manufactured.

4 is a schematic cross-sectional view of a semiconductor light emitting device 200 according to still another embodiment of the present invention.

Referring to FIG. 4, the semiconductor light emitting device 200 according to the present embodiment includes a base semiconductor layer 120, a first conductive semiconductor layer 121 formed on the base semiconductor layer 120, and the first semiconductor layer 120. An active layer 130 formed on the first conductive semiconductor layer 121, a second conductive semiconductor layer 140 formed on the active layer 130, and a conductive substrate formed on the second conductive semiconductor layer 140. And 170.

Here, the base semiconductor layer 120 includes at least one pore group group 50 in which a plurality of pores g are clustered.

That is, the present embodiment may be understood as an embodiment of a so-called vertical structure in which, unlike the embodiment of FIG. 1, the growth substrate 110 is removed and one surface of the base semiconductor layer 120 is provided as a light emitting surface. .

In the present exemplary embodiment, the semiconductor device may further include first and second electrodes 161 and 162 electrically connected to the first and second conductivity-type semiconductor layers 121 and 140, respectively. When the first conductive type is doped such that the semiconductor layer 120 has the same conductivity type as the first conductive type semiconductor layer 121, the first electrode 161 may be formed on the base semiconductor layer 120. There will be.

In addition, the second electrode 162 may be formed between the second conductive semiconductor layer 140 and the conductive substrate 170, and may have a light reflection function and an ohmic contact function with the second conductive semiconductor layer 140. In consideration of this, Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au and the like may be included.

The conductive substrate 170 is not limited thereto, but may include any one of Au, Ni, Al, Cu, W, Si, Se, GaAs, SiAl, Ge, SiC, AlN, Al 2 O 3, GaN, and AlGaN. It may be made, and may be formed by a process such as plating, sputtering, deposition, or bonding.

In the present embodiment, since the pore group 50 has a light scattering function, light generated in the active layer 130 can be easily emitted to the outside through the first surface of the first semiconductor layer 120. In addition, since the refractive index of the void g may be 1, such as air, the total reflection phenomenon due to the difference in refractive index with an external material in the semiconductor layer may be effectively reduced.

In addition, the present embodiment requires a process of removing a substrate for growing a semiconductor, and the void group 50 forms an empty space at an interface between the substrate for growing a semiconductor and the base semiconductor layer 120, thereby removing the substrate for growing a semiconductor. It is possible to provide a structure in which the process can be performed more easily.

5 is a schematic cross-sectional view of a semiconductor light emitting device 300 according to still another embodiment of the present invention.

Referring to FIG. 5, the semiconductor light emitting device 300 according to the present embodiment includes a substrate 110 and at least one pore group group formed on the substrate 110 and having a plurality of pores g clustered therein ( A base semiconductor layer 120 having 50, a first conductive semiconductor layer 121 formed on the base semiconductor layer 120, and an active layer 130 formed on the first conductive semiconductor layer 121. And a second conductivity type semiconductor layer 140 formed on the active layer 130.

This embodiment may be understood as a so-called nano LED chip type semiconductor light emitting device.

Specifically, the first conductivity type semiconductor layer 121 may be defined as a nano core protruding from the base semiconductor layer 120, and the base semiconductor layer 120 is a layer providing a growth surface of the nano core. It may be a semiconductor doped with a first conductivity type. A mask layer m having an open area for nano-core growth may be formed on the base semiconductor layer 120. Here, the mask layer m may be a dielectric material such as silicon oxide such as SiO 2 , silicon nitride such as SiN x , or silicon oxynitride (SiO x N y ).

The nanocores may be formed on the open area of the mask layer m, and the active layer 130 may be formed as a shell layer on the protruding surface formed by the nanocores. The second conductive semiconductor layer 140 is formed on the active layer 130, and thus, a nano-light emitting structure N having a core-shell shape may be provided.

Of course, in the present embodiment, the nano light emitting structure N is illustrated as a rod structure as a core-shell structure, but is not limited thereto, and may be provided as a pyramid-like structure.

In the present embodiment, the semiconductor light emitting device may include a filling material 180 filled between the nano light emitting structures (N). The filling material 180 may structurally stabilize the nano light emitting structure (N). The filling material 180 is not limited thereto, but may be formed of a transparent material such as SiO 2 .

An ohmic contact layer 150 may be formed on the nano light emitting structure N to be connected to the second conductive semiconductor layer 140. In this case, the semiconductor light emitting device may include first and second electrodes 161 and 162 connected to the base semiconductor layer 120 and the ohmic contact layer 150, respectively.

In the case of the semiconductor light emitting device using the nano light emitting structure (N), it is possible to increase the light emitting area by using the nano light emitting structure (N) to increase the luminous efficiency, it is possible to easily induce the non-polarity of the active layer 130 As a result, the internal quantum efficiency due to polarization may be improved more effectively.

6 is a photograph showing a semiconductor light emitting device according to an embodiment of the present invention in a step-by-step manner. Specifically, FIGS. 6A to 6E show semiconductor light emitting devices in a state in which the steps shown in FIGS. 3A to 3E are completed, respectively.

Referring to the top view and the plan view (upper right) shown in FIG. 6A, the base semiconductor layer 120a and the trench v forming the plurality of islands i may be identified.

Next, referring to FIGS. 6 (b) and 6 (c), the bead b is provided in the trench v and the second base semiconductor layer on the first base semiconductor layer 120a ( 120b) can be confirmed.

Then, the state of removing the beads (b) by applying a wet etching is shown in Figure 6 (d), referring to Figure 6 (d) and 6 (e), the first and second base It may be confirmed that at least one pore group group in which the plurality of pores g is clustered in the semiconductor layers 120a and 120b is formed.

It is intended that the invention not be limited by the foregoing embodiments and the accompanying drawings, but rather by the claims appended hereto. Accordingly, various forms of substitution, modification, and alteration may be made by those skilled in the art without departing from the technical spirit of the present invention described in the claims, which are also within the scope of the present invention. something to do.

100, 200, 300: semiconductor light emitting device
110: substrate 120: base semiconductor layer
121: first conductive semiconductor layer 130: active layer
140: second conductive semiconductor layer g: void
50: void set group 150: ohmic contact layer
161: first electrode 162: second electrode
170: conductive substrate 180: filling material

Claims (10)

A first base semiconductor layer having at least one trench;
A second base semiconductor layer having a plurality of voids formed on the trench and a bead filling at least one of the plurality of voids;
A third base semiconductor layer formed on the second base semiconductor layer to cover the plurality of voids;
A first conductivity type semiconductor layer formed on the third base semiconductor layer;
An active layer formed on the first conductivity type semiconductor layer; And
A second conductivity type semiconductor layer formed on the active layer;
Semiconductor light emitting device comprising a.
The method of claim 1,
The first to third base semiconductor layer is a semiconductor light emitting device, characterized in that the nitride semiconductor layer having a non-polar surface.
The method of claim 1,
Further comprising a sapphire substrate formed on the lower surface of the first base semiconductor layer,
A lower surface of the first base semiconductor layer is in contact with the R surface of the sapphire substrate.
The method of claim 1,
Further comprising a substrate formed on the lower surface of the first base semiconductor layer,
And the plurality of voids are in contact with the substrate.
The method of claim 1,
The plurality of voids formed in each of the trench comprises a region that increases in the direction away from the lower surface of the first base semiconductor layer.
The method of claim 1,
And the first to third base semiconductor layers are semiconductor layers doped with a first conductivity type to have the same conductivity type as the first conductivity type semiconductor layer.
The method of claim 1,
And the first to third base semiconductor layers are undoped semiconductor layers.
Forming a first base semiconductor layer having at least one trench on the substrate;
Providing a plurality of beads in the trench;
Forming a second base semiconductor layer on the first base semiconductor layer;
Removing the plurality of beads to form a pore group group in which a plurality of pores are clustered in the first and second base semiconductor layers;
Forming a third base semiconductor layer to cover the pore group and the trench;
Forming a first conductivity type semiconductor layer on the third base semiconductor layer;
Forming an active layer on the first conductivity type semiconductor layer; And
Forming a second conductivity type semiconductor layer on the active layer;
Semiconductor light emitting device manufacturing method comprising a.
delete The method of claim 8,
The substrate is a sapphire substrate,
Forming the first base semiconductor layer on the substrate,
And forming the first base semiconductor layer on the R surface of the sapphire substrate.
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