KR101977956B1 - Manufacturing method of power semiconductor module - Google Patents

Abstract

The present invention provides a method of manufacturing a semiconductor device, comprising: preparing a lower substrate; Forming a chip on the lower substrate; Forming a spacer on the chip, the spacer capable of performing electrical signal and heat dissipation to the upper portion or the lower portion; Fixing at least a part of the lower substrate, the chip and the spacer using a jig for module assembly; Bonding a lead frame to at least a portion of the lower substrate; And performing wire bonding to electrically connect the chip and the lead frame, wherein the spacer is bent or deformed by heat generated in the step of bonding the lead frame and the step of performing the wire bonding, In order to prevent twisting, a frame for fixing the spacer among the module-assembling jigs includes a bending prevention member at least in part, and the bending prevention member fixes a top edge portion of the spacer. to provide.

Description

[0001] The present invention relates to a manufacturing method of a power semiconductor module,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a power semiconductor module, and more particularly, to a method of manufacturing a power semiconductor module capable of protecting a chip at high voltage / high current and various impacts and minimizing influence.

Power semiconductors must protect the chip at high voltage / high current and various impacts and minimize its influence. Due to the nature of power semiconductors, heat dissipation of the package is one of the most important characteristics, which limits the performance and robustness of semiconductors.

Conventionally, in order to solve the above-described problems, a double-sided cooling system has been mainly used. The double-sided cooling method is divided into upper and lower parts for wire bonding and lead frame bonding, and at least two solder bonding processes are performed. In this process, each time the solder bonding process, that is, the high temperature process, is performed, the spacer and the semiconductor are repeatedly shrunk and expanded.

This is due to the fact that the thermal expansion coefficients of the respective module materials are different from each other, so that they act as physical stresses. Such effects are repeated, and the performance of the module as a whole is lowered due to warpage or warpage of materials such as semiconductors and spacers. When the physical limit of each material is reached, defects such as cracks are generated, have.

The present invention provides a method of manufacturing a power semiconductor module capable of protecting a chip from thermal shock, minimizing an impact thereon, and maximizing a heat dissipation property, in order to solve various problems including the above problems The purpose. However, these problems are exemplary and do not limit the scope of the present invention.

According to an aspect of the present invention, a method of manufacturing a power semiconductor module is provided. A method of manufacturing the power semiconductor module includes: preparing a lower substrate; Forming a chip on the lower substrate; Forming a spacer on the chip, the spacer capable of performing electrical signal and heat dissipation to the upper portion or the lower portion; Fixing at least a part of the lower substrate, the chip and the spacer using a jig for module assembly; Bonding a lead frame to at least a portion of the lower substrate; And performing wire bonding to electrically connect the chip and the lead frame, wherein the spacer is bent or deformed by heat generated in the step of bonding the lead frame and the step of performing the wire bonding, In order to prevent twisting, the frame for fixing the spacer among the jigs for assembling the module has a bending prevention member at least in part, and the bending prevention member can fix the upper edge of the spacer.

The method of manufacturing the power semiconductor module according to claim 1, further comprising: after the step of performing the wire bonding, removing the module assembly jig and forming an upper substrate on the spacer; Forming a molding part for sealing at least a part of the lower substrate, the chip, the spacer, the lead frame, and the upper substrate; And trimming at least a portion of the lead frame after the molding portion is formed.

In the method of manufacturing the power semiconductor module, the molding portion may expose a lower surface of the lower substrate and an upper surface of the upper substrate.

The module assembly jig may fix the lower substrate, the chip and the spacer using at least one frame, and the center of the module assembly jig may be open, And the bending prevention member is provided at a central portion of the frame for fixing the spacer, so that the upper edge of the spacer can be fixed.

In the method of manufacturing the power semiconductor module, the bending prevention member may have a structure capable of being coupled to or detached from a frame for fixing the spacer.

In the method of manufacturing the power semiconductor module, in order to prevent the spacer from being deformed by the heat generated in the step of bonding the lead frame and the step of performing the wire bonding, the spacer faces the lower substrate And a chamfered portion on the side surface.

In the method of manufacturing the power semiconductor module, the height of the central portion of the spacer is relatively lower than the height of the outer portion of the spacer due to the heat generated in the step of bonding the lead frame and the step of performing the wire bonding The area of the upper surface and the lower surface of the spacer may be different from each other.

In the method of manufacturing the power semiconductor module, by the heat generated in the step of bonding the lead frame and the step of performing the wire bonding, the spacer is subjected to a stress that is deformed downwardly convex on the basis of the lower substrate , The structure of the upper surface and the lower surface of the spacer can be formed differently.

In order to prevent the spacer from being deformed due to heat generated in the step of bonding the lead frame and the step of performing the wire bonding in the method of manufacturing the power semiconductor module, The width of the first and second electrodes may be larger than the area of the second electrode.

In the method of manufacturing the power semiconductor module, the module-assembling jig includes a lower jig and an upper jig, and the lower jig and the upper jig are composed of at least one or more parts, have.

According to one embodiment of the present invention as described above, it is possible to implement a method of manufacturing a power semiconductor module that improves thermal performance, reduces the weight and size of the module, and is inexpensive and has an improved reliability life. Of course, the scope of the present invention is not limited by these effects.

1 is a schematic cross-sectional view of a power semiconductor module implemented in a method of manufacturing a power semiconductor module according to an embodiment of the present invention.
Fig. 2 is an enlarged view of the W portion of the drawing shown in Fig. 1. Fig.
3 is a schematic view illustrating a defect structure of a spacer implemented by the method of manufacturing a power semiconductor module according to an embodiment of the present invention and a comparative example.
4 is a schematic view illustrating a module assembly jig used in a method of manufacturing a power semiconductor module according to an embodiment of the present invention.
5 to 12 are a cross-sectional view and a top view schematically showing a method of manufacturing a power semiconductor module according to an embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. It should be understood, however, that the invention is not limited to the disclosed embodiments, but may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, Is provided to fully inform the user. Also, for convenience of explanation, the components may be exaggerated or reduced in size.

The power semiconductor 1000 generally includes a lower substrate 100, a chip 200, a spacer 300, a lead frame 400, and an upper substrate 500. The chip 200 and the lead frame 400 may be electrically connected to each other by wire bonding. The configuration of each part will be described later with reference to Fig.

1 is a schematic cross-sectional view of a power semiconductor module implemented in a method of manufacturing a power semiconductor module according to an embodiment of the present invention.

Referring to FIG. 1, a power semiconductor module 1000 according to an embodiment of the present invention may include a lower substrate 100. The lower substrate 100 may be, for example, an active metal brazed copper (AMC) substrate or a direct bonder copper (DBC) substrate. The lower substrate 100 is formed on the ceramic substrate 104 with conductive metal layers 102 and 106, such as copper (Cu). The lower substrate 100 may be formed by stacking at least one layer.

The chip 200 may be mounted on the lower substrate 100 by using the first solder preform 130. [ The chip 200 is a semiconductor element, and may include at least one semiconductor element. The semiconductor device may be classified into a power semiconductor device or a diode device according to its structure, position and function. However, the chip 200 used in the present invention is not limited thereto.

In addition, a plurality of electrodes may be formed on the chip 200. [ For example, a gate electrode and an emitter electrode may be formed on one surface of the chip 200, and a collector electrode may be formed on the other surface. A cathode electrode may be formed on one surface of the chip 200, and an anode electrode may be formed on the other surface of the chip 200. Some of the electrodes may be laminated to at least part of the metal circuit pattern of the lower substrate 100.

On the other hand, a module assembly jig (not shown) having a bending prevention member (not shown) and a second solder preform 140 can be used to perform electrical signal and heat radiation on the chip 200 The spacer 300 can be formed. The spacer 300 may be made of a metal having excellent conductivity, such as copper (Cu), for example. The gap 300 between the lower substrate 100 and the upper substrate 500 is maintained to protect the wire 150 electrically connecting the chip 200 and the lead frame 400 . Here, a detailed description of the method of forming the spacer 300 and the spacer 300 will be described later with reference to FIGS. 2 to 4. FIG.

Also, a lead frame 400 may be formed on at least a part of the lower substrate 100. The lead frame 400 may be bonded to a terminal (not shown) provided on a part of the lower substrate 100 and the lead frame 400 may be electrically connected to the chip 200 by wire bonding Can have a connected structure.

Also, the upper substrate 500 may be formed on the spacer 300 using the third solder preform 160. The upper substrate 500 may be made of the same material as the lower substrate 100. The upper substrate 500 may be bonded onto the spacer 300 by a soldering method. The lower substrate 100 and the upper substrate 500 are disposed on the upper and lower sides of the chip 200, respectively, thereby improving the heat radiation characteristics.

At least a portion of the lower substrate 100, the chip 200, the spacers 300, the lead frame 400 and the upper substrate 500 may be sealed by the molding portion 600 to protect the chip 200 have. Here, the molding part 600 may be made of a polymer material having excellent insulation and protection properties, for example, an epoxy molding compound (EMC) or a polyimide series material. At this time, at least a part of the lead frame 400, the lower surface of the lower substrate 100 and the upper surface of the upper substrate 500 may be exposed to the outside, and the molding part 600 may be exposed to the outside of the lead frame 400 All the regions except the lower surface of the lower substrate 100 and the upper surface of the upper substrate 500 can be sealed.

Hereinafter, the lamination structure of the chip 200 and the spacer 300, the problems caused by the process, and the solution means thereof will be described later with reference to FIG. 2 to FIG.

Fig. 2 is an enlarged view of the W portion of the drawing shown in Fig. 1, and Fig. 3 is a schematic view of a defect structure of a spacer implemented by the method of manufacturing a power semiconductor module according to an embodiment of the present invention and a comparative example And FIG. 4 is a schematic view illustrating a jig for module assembly used in a method of manufacturing a power semiconductor module according to an embodiment of the present invention.

2 is an enlarged view of a portion W of the power semiconductor module 1000 shown in FIG. 1 in which the lower substrate 100, the chip 200, and the spacer 300 are stacked together. 2 (a) and 2 (b), the spacer 300 may have chamfer s on the side opposite to the lower substrate 100. Specifically, the area of the lower surface of the spacer 300 may be larger than that of the upper surface. Hereinafter, the upper edge portion of the spacer 300 can be understood as the chamfer portion s shown in Figs. 2A and 2B.

The chamfered portion s may be formed over the upper surface and the side surface of the spacer 300 as shown in Fig. 2 (a). The chamfered portion s can be formed by calculating the coefficient of thermal expansion according to the material and thickness of the spacer 300 to remove the side surface of the spacer 300 as much as possible as shown in FIG. 2 (b). Alternatively, as shown in FIG. 2, the top surface of the spacer 300 may be formed in an angled shape, but it may be machined into a fan shape in some cases. However, the structure of the chamfered portion s used in the present invention is not limited thereto.

The lower substrate 100 and the chip 200, the chip 200 and the spacer 300, and the lower substrate 100 and the lead frame 400 may be soldered. The soldering joint is a high temperature process. When the soldering joint is repeatedly performed, the first solder preform 130 and the second solder preform 140 are melted and hardened repeatedly. Also, as the first and second solder preforms 130 and 140 are repeatedly shrunk and expanded by the heat, the spacer 300 may have a defect on the bonding surface with the chip 200. These defects are specifically shown in Figs. 3 (a) and 3 (b).

Referring to FIG. 3, FIG. 3A is a cross-sectional view illustrating a method of manufacturing a power semiconductor module according to an embodiment of the present invention. Referring to FIG. 3, The shape of which is warped. FIG. 3 (b) is a plan view of a power semiconductor module according to a comparative example of the present invention. FIG. 3 (b) shows a state in which the spacer 300 is warped in a convex shape with respect to the lower substrate 100, It is. In both of the above cases, defects are generated in the bonding surface between the chip 200 and the spacer 300, which is an element that affects the yield of the power semiconductor module.

The structural defects of the spacers described above are inevitable defects when using a high temperature soldering joint method. Therefore, it is necessary to prevent the structural defects of the spacer by appropriately controlling it.

In order to solve the above problems, the power semiconductor module 1000 can be manufactured using the jig 700 for module assembly having at least one frame. A detailed description of the module assembly jig 700 will be given later with reference to Fig.

Referring to Fig. 4, the module assembly jig 700 may include, for example, three molds. The three molds may fix the lower substrate 100, the chip 200, and the spacers 300, respectively. The center of the module assembly jig 700 has an open structure. That is, all the three frames constituting the module assembly jig 700 may have a structure in which the center is opened.

The three frames include a frame 710 for fixing the lower substrate 100, a frame 720 for fixing the chip 200, and a frame 730 for fixing the spacer 300. First, the frame 710 for fixing the lower substrate 100 functions to fix the lower substrate 100 when the edge of the lower substrate 100 is held to perform a soldering process. The frame 710 for fixing the lower substrate 100 has an internal space V1 at the center thereof so that the chip 200 and the spacer 300 are accommodated therein when the module assembly jig 700 is coupled .

The frame 720 for fixing the chip 200 is combined with the frame 710 for fixing the lower substrate 100. When the edge of the chip 200 is held to perform the soldering process, . The frame 720 for fixing the chip 200 has the inner space V2 at the center portion so that the spacer 300 can be received therein when the module assembly jig 700 is coupled.

The frame 730 for fixing the spacer 300 is coupled to a frame 710 for fixing the lower substrate 100 and a frame 720 for fixing the chip 200. The frame 730 holds the edge of the spacer 300, When the process is performed, the spacer 300 is fixed. The frame 730 for fixing the spacer 300 can minimize the heat transmitted to the spacer 300 by having the inner space V3 at the center portion.

The edge of the spacer 300 is fixed to the inner edge of the frame 730 for fixing the spacer 300 that defines the center portion of the frame 730 for fixing the spacer 300, The bending prevention member 735 may be provided. The bending prevention member 735 may include a structure that is coupled to or detachable from the frame 730 that fixes the spacer 300. That is, as the process is performed, the bending prevention member 735 may have a structure in which bonding and detachment are mutually easy, depending on the convenience of the process.

The bending prevention member 735 may have a shape protruding downward from the upper side with respect to the upper substrate 500. The bending prevention member 735 may be formed in an angled shape according to the shape of the rim portion s of the spacer 300 It may have a round shape.

When the module assembly jig 700 having the above-described bending prevention member 735 is used, it is necessary to control the stress that the spacer 300 receives. That is, in the present invention, in order to use the module assembly jig 700 provided with the bending prevention member 735, if the stress applied to the spacer 300 is inevitably changed due to heat generated during the high-temperature soldering process, The process of inducing the spacer 300 to undergo a deformation in a downwardly convex shape with respect to the base 100 is necessarily performed.

3, when the edge portion s of the spacer 300 becomes higher than the central portion in the high-temperature soldering process, the jig 700 for module assembly described above, It is possible to prevent the edge portion s of the spacer 300 from rising upward by pressing the edge portion s of the spacer 300 against the bending prevention member 735 of the spacer 300. [

3B, when the edge portion s of the spacer 300 is lowered in height than the central portion in the high-temperature soldering process, the bending prevention member of the module- It is impossible to prevent the spacer 300 from being warped by the spacer 735. Therefore, when the structure of the spacer 300 is deformed by heat, a structural design of the spacer 300 is required to be convex downward with respect to the lower substrate 100.

In summary, by controlling the thermal expansion of the upper and lower surfaces of the spacer 300 to be different from each other, it is necessary to design the spacer 300 so as to receive a stress that deforms in such a manner that the rim portion s of the spacer 300 rises during the high-temperature soldering process , It is necessary to induce a downward convex shape by receiving a stress that is deformed by the structure shown in FIG. 3 (a). The detailed description of the structure of the spacer 300 is the same as that described with reference to Figs. 2 (a) and 2 (b).

The module jig 700 includes a lower jig and an upper jig (not shown), and the lower jig and the upper jig may be formed of at least one or more parts, It is possible to have a structure capable of bonding and desorption in the process.

Hereinafter, a method of manufacturing the power semiconductor module will be described in detail with reference to FIGS. 5 to 12 for each process step.

5 to 12 are a cross-sectional view and a top view schematically showing a method of manufacturing a power semiconductor module according to an embodiment of the present invention.

5 (a) is a cross-sectional view taken along the line AA shown in the top view of FIG. 5 (b). Hereinafter, also in the case of Figs. 6 to 12, each cross-sectional view means that the cross-sectional views are taken on the basis of AA of each top view.

Referring to FIG. 5, a method of manufacturing a power semiconductor module according to an embodiment of the present invention may first prepare a lower substrate 100. The lower substrate 100 may be, for example, an active metal brazed copper (AMC) substrate or a direct bonder copper (DBC) substrate. The lower substrate 100 is formed on the ceramic substrate 104 with conductive metal layers 102 and 106, such as copper (Cu). The lower substrate 100 may be formed by stacking at least one layer.

That is, the lower substrate 100 may include a first lower metal layer 102, a first ceramic layer 104, and a first upper metal layer 106. A first lower metal layer 102 and a first upper metal layer 106 may be formed on the lower and upper surfaces of the first ceramic substrate 104, respectively. Here, the first lower metal layer 102 and the first upper metal layer 106 can be understood as a metal circuit pattern.

Although not shown in FIGS. 5A and 5B, the first lower metal layer 102 and the first upper metal layer 106 are formed by a plurality of vias on at least a portion of the first ceramic substrate 104, May be electrically connected to each other. 5B, a semiconductor device may be disposed on the first upper metal layer 106, and the first upper metal layer 106 is formed with a metal circuit pattern so that the semiconductor device can be mounted .

Meanwhile, the lower substrate 100 can be disposed and fixed using the frame 710 for fixing the lower substrate 100 among the module assembly jigs 700 shown in FIG. For example, the lower substrate 100 may be disposed in the inner space V1 after the frame 710 for fixing the lower substrate 100 is prepared before the lower substrate 100 is prepared. Alternatively, the lower substrate 100 may be fixed using a frame 710 for fixing the lower substrate 100 after the lower substrate 100 is first prepared.

Referring to FIG. 6, after the lower substrate 100 is prepared, a chip 200 may be formed on the lower substrate 100 and a chip (not shown) may be formed on the first upper metal layer 106 of the lower substrate 100 200 may be disposed. Here, the detailed description of the chip 200 is the same as that described above with reference to FIG. 1, and therefore will not be described. The chips 200 can be bonded onto the lower substrate 100 by soldering the first substrate 100 between the lower substrate 100 and the chip 200 through the first solder preform 130.

Meanwhile, the chip 100 can be arranged and fixed using the frame 720 for fixing the chip 200 among the module assembly jigs 700 shown in FIG. For example, before the chip 200 is formed on the lower substrate 100, the frame 720 for fixing the chip 200 is combined with the frame 710 for fixing the lower substrate 100, The chip 200 can be formed in the space V2. Alternatively, after the chip 200 is first formed on the lower substrate 100, the chip 200 may be fixed using the frame 720 that fixes the chip 200.

Referring to FIG. 7, after the chip 200 is mounted on the lower substrate 100, a spacer 300 capable of performing electrical signal and heat radiation on the chip 200 can be formed on the chip 200 have. The spacer 300 can be bonded onto the chip 200 by soldering between the spacer 300 and the chip 200 via the second solder preform 140. [ At this time, by forming the upper and lower surfaces of the spacer 300 to be different from each other, the height of the center portion of the spacer 300 is relatively higher than the height of the outer portion of the spacer 300, As shown in FIG.

That is, the area of the bottom surface of the spacer 300 is designed to be wider than the area of the top surface of the spacer 300, so that the spacer 300 has a convex shape with respect to the lower substrate 100, The lower surface structure can be formed differently. The detailed description thereof is the same as that described above with reference to Figs. 1 to 3, and therefore, will be omitted.

Thereafter, at least a part of the lower substrate 100, the chip 200, and the spacers 300 can be fixed using the module assembly jig 700. The module assembly jig 700 uses at least one frame and the frame 730 for fixing the spacer 300 includes a bending prevention member 735 to prevent warpage of the spacer 300, Can be controlled to be relatively higher than the height of the central portion. Here, the detailed description of the module assembly jig 700 is the same as that described above with reference to Fig. 4, and thus will not be described.

Meanwhile, among the module assembly jigs 700 shown in FIG. 4, the spacer 300 can be arranged or fixed by using the frame 730 for fixing the spacer 300. For example, before the spacer 300 is formed on the chip 200, the frame 730 for fixing the spacer 300 is prepared in combination with the frame 720 for fixing the chip 200, The spacer 300 can be formed. Alternatively, the spacer 300 may be fixed using the frame 730 that fixes the spacer 300 after the spacer 300 is formed on the chip 200 first.

Here, the bending prevention member 735 may be pre-coupled to the frame 730 for fixing the spacer 300 to prevent the spacer 300 from being warped. Alternatively, after the spacer 300 is fixed to the frame 730 that fixes the spacer 300, the bending prevention member 735 is coupled to the frame 730 that fixes the spacer 300 to prevent warpage of the spacer 300 .

8 and 9, the lead frame 400 may be bonded to at least a part of the lower substrate 100 using an ultrasonic bonding method. The lead frame 400 may function as a signal terminal and a terminal terminal depending on the position where the lead frame 400 is bonded to the lower substrate 100. 8 (b), the lead frame 400, which is not physically contacted with the lower substrate 100, is used as a signal terminal, and is located on the opposite side of the signal terminal, 100 may be used as a terminal terminal.

After the lead frame 400 is bonded, wire bonding is performed to electrically connect the chip 200 and the lead frame 400. Here, the lead frame 400 connected to the wire 150 can be understood as a signal terminal, as described above.

Referring to FIG. 10, after the step of performing the wire bonding, the module assembly jig 700 can be removed. And then the upper substrate 500 may be formed on the spacer 300. The upper substrate 500 may be the same substrate as the lower substrate 100. The upper substrate 500 is formed on the ceramic substrate 504 with conductive metal layers 502 and 506, such as copper (Cu). The upper substrate 500 may be formed by stacking at least one layer.

That is, the upper substrate 500 may include a second lower metal layer 502, a second ceramic layer 504, and a second upper metal layer 506. A second lower metal layer 502 and a second upper metal layer 506 may be formed on the lower and upper surfaces of the second ceramic substrate 504, respectively. Here, the second lower metal layer 502 and the second upper metal layer 506 can be understood as a metal circuit pattern.

Although not shown in FIGS. 10A and 10B, the second lower metal layer 502 and the second upper metal layer 506 are formed by a plurality of vias on at least a portion of the second ceramic substrate 504, May be electrically connected to each other.

The upper substrate 500 may have the same size as the lower substrate 100 and solder may be formed between the spacers 300 and the upper substrate 500 through the third solder preform 160, The upper substrate 500 can be bonded to the upper substrate 500.

11, after the upper substrate 500 is formed on the spacers 300, the lower substrate 100, the chip 200, the spacers 300, the lead frame 400, and the upper substrate 500 A molding part 600 sealing at least a part of the molding part 600 can be formed. The molding part 600 may be made of a polymer material having excellent insulation and protection properties, for example, an epoxy molding compound (EMC) or a polyimide series material. At this time, at least a part of the lead frame 400, the lower surface of the lower substrate 100, and the upper surface of the upper substrate 500 may be exposed to the outside.

The molding part 600 may cover the entire exposed area of the lead frame 400 except the lower surface of the lower substrate 100 and the upper surface of the upper substrate 500. That is, only the first lower metal layer 102 of the lower substrate 100 and the second upper metal layer 506 of the upper substrate 500 serve as signal terminals and terminal terminals of the lead frame 400, The molding part 600 may be formed as much as possible. The molding portion 600 is formed over substantially the entire surface including the power semiconductor device, thereby protecting the power semiconductor module.

If a ceramic substrate having no metal layer is used for the lower substrate 100 and the upper substrate 500, the lower portion of the lower substrate 100 and the upper portion of the lower substrate 100 may be formed using a sputtering method or an electrolytic plating method after the molding portion 600 is formed. A separate metal layer may be formed on the upper surface of the substrate 500. The metal layer may be formed on the lower surface of the lower substrate 100 and the upper surface of the upper substrate 500. Here, since the sputtering method or the electrolytic plating method is a well-known technique, a detailed description thereof will be omitted.

Referring to FIG. 12, at least a portion of the lead frame 400 may be trimmed after the molding portion 600 is formed. Only the signal terminal 402 and the terminal terminal 404 may be protruded to the outside of the molding part 600 after the unnecessary part of the lead frame 400 is trimmed. 11, the first lower metal layer 102 of the lower substrate 100, the second upper metal layer 506 of the upper substrate 500, the signal terminal 402, the terminal terminal 404 Is exposed to the outside of the molding part 600 and the remaining part of the power semiconductor module 1000 is protected by the molding part 600.

As described above, every time the high-temperature soldering bonding process is performed, semiconductor chips and spacers having different thermal expansion coefficients repeatedly shrink and expand and are physically stressed to each other, so that when the physical limit of each material is reached, And the like.

In order to solve such a problem, in the method of manufacturing a power semiconductor module according to an embodiment of the present invention, the area of the upper surface and the lower surface of the spacer are made different from each other, To be convex downward.

Thereafter, by using a module assembly jig having at least a part of the bending prevention member to press the rim of the spacer, bending or distortion of the spacer can be easily prevented, thereby improving the performance and yield of the power semiconductor module.

While the present invention has been described with reference to exemplary embodiments, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, but, on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the invention. Accordingly, the true scope of the present invention should be determined by the technical idea of the appended claims.

100: Lower substrate
102: first lower metal layer
104: first ceramic layer
106: first upper metal layer
130: first solder preform
140: second solder preform
150: wire
160: Third solder preform
200: chip
300: Spacer
400: Lead frame
500: upper substrate
502: second lower metal layer
504: second ceramic layer
506: second upper metal layer
600: molding part
700: Jig for module assembly
710: Frame for fixing lower substrate
720: Chip fixing frame
730: spacer fixing frame
735:
1000: Power semiconductor module

Claims (10)

Preparing a lower substrate;
Forming a chip on the lower substrate;
Forming a spacer on the chip, the spacer capable of performing electrical signal and heat dissipation to the upper portion or the lower portion;
Fixing at least a part of the lower substrate, the chip and the spacer using a jig for module assembly;
Bonding a lead frame to at least a portion of the lower substrate;
Performing wire bonding to electrically connect the chip and the lead frame; And
Forming an upper substrate on the spacer;
Lt; / RTI >
Wherein forming the spacers comprises:
The upper frame of the spacer may be formed in an angular shape or in an oblique direction so as to receive a stress that deforms downwardly convexly with respect to the lower substrate due to the heat generated in the step of bonding the lead frame and the step of performing the wire bonding. Machining into a fan-like arc shape,
The module assembly jig can fix the lower substrate, the chip and the spacer using at least one frame, the center of the module assembly jig is open,
And a bending prevention member is provided on an inner rim of the frame for fixing the spacer so as to prevent the spacer from being bent or twisted, thereby fixing the upper surface frame portion of the spacer,
Wherein the bending prevention member has an angular shape or a circular arc shape depending on the shape of a rim of the spacer and has a shape protruding downward from an upper portion with respect to the upper substrate,
A method of manufacturing a power semiconductor module. The method according to claim 1,
After performing the wire bonding,
Removing the module-assembling jig and forming the upper substrate on the spacer;
Forming a molding part for sealing at least a part of the lower substrate, the chip, the spacer, the lead frame, and the upper substrate; And
Trimming at least a portion of the lead frame after the molding portion is formed;
/ RTI >
A method of manufacturing a power semiconductor module. 3. The method of claim 2,
Wherein the molding unit exposes a lower surface of the lower substrate and an upper surface of the upper substrate,
A method of manufacturing a power semiconductor module. delete The method according to claim 1,
Wherein the bending prevention member has a structure capable of being engaged with or detachable from a frame for fixing the spacer,
A method of manufacturing a power semiconductor module. delete delete delete delete The method according to claim 1,
Wherein the module jig includes a lower jig and an upper jig, the lower jig and the upper jig being formed of at least one or more parts,
A method of manufacturing a power semiconductor module.

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