KR101965079B1 - Concurrently refreshing multiple areas of a display device using multiple different refresh rates - Google Patents

Abstract

The present application relates to methods and apparatus for refreshing a display device at various frequencies. In particular, multiple regions of the display device may be simultaneously refreshed at different frequencies. In this manner, when static content is being displayed in certain areas of the display device, the specific areas may be refreshed at a lower rate than areas displaying dynamic content such as video or animation. By refreshing at lower rates, the energy consumed by the subsystems associated with the display device and the display device can be reduced. In addition, processes for reducing flicker when refreshing a display device to different refresh rates are disclosed herein.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention < RTI ID = 0.0 > [0001] < / RTI > A simultaneous refresh of multiple areas of a display device using a plurality of different refresh rates,

The described embodiments generally relate to modifying the refresh rates of a display device. More particularly, the embodiments relate to methods and apparatus for simultaneously refreshing multiple regions of a display device at different rates.

Recent advances in computing devices have enabled many lightweight, and often portable, graphics that are visually stunning on computing devices. Graphics may be provided through various systems including a graphics processor and a display monitor. Many graphics processors can interact with the display monitor to provide images and video that can be updated or refreshed without being perceived by the user of the display monitor for any interruption. However, both the transmission of data and the emission of light from the display monitor over a long period of time require a large amount of energy typically not available when implemented in portable computing devices. Often, this energy is used to switch between the colors and brightness levels of the display, and thus designing a display that does not provide optimal switching can degrade the user experience at the computing device. As a result, manufacturers often have to choose between providing more impressive visual displays or saving energy to provide longer battery life for computing devices.

Many computing devices are used primarily for Internet browsing, which may often require that various graphics be displayed. For example, some web pages may be used to stream video, and thus require a great deal of effort on the graphics processor of the computing device. To provide smooth video streams, the display monitor must be refreshed at a rate that allows video to be presented smoothly on the display monitor. However, maintaining a high refresh rate may be inefficient in terms of energy consumption, because often the entire area of the display monitor is refreshed regardless of the size of the video being displayed. Thus, even if a user of a computing device is streaming small video on a large display monitor, the refresh rate will be dynamic with respect to the size of the video. Because the hardware of many computing devices is not designed to regulate the refresh rate depending on the application being executed, it is often the case that the user is with a device that can not maintain charge for a period of frequent media playback. The user thus displays the media streams until the user can plug his or her computing device into the charging port or until the user knows that the computing device will not need battery life for other applications at certain points of the day Sometimes I give up. In addition, idle screens that display animations for various applications may also consume energy in a wasteful manner, despite many processes of the application taking place in the cloud server rather than the computing device. In this way, an application can, in some cases, consume more energy for aesthetics than the main purpose of the application.

This document describes various embodiments of methods and apparatuses for controlling the refresh rate of display devices. In some embodiments, a display device such as a liquid crystal display (LCD) or a light emitting diode (LED) display is described. The display device may include a pixel array, a gate driver operatively coupled to the pixel array, and a data driver operably coupled to the pixel array. The display device may further comprise a control circuit operably coupled to the gate driver. The control circuit provides a normal refresh signal to the gate driver when the row of the first frame data set is different from the row of the second frame data set and the row of the first frame data set is the same as the row of the second frame data set And to provide a modified refresh signal to the gate driver.

In other embodiments, a method of simultaneously refreshing multiple regions of a display device with different refresh rates is described. The method may include generating a first data frame and a second data frame, and comparing the plurality of rows of the first data frame to the plurality of rows of the second data frame. The method may further comprise determining a modified row of the second data frame, wherein the modified row is a row of data in a second data frame that is different from the corresponding data row in the first data frame. In addition, the method may include refreshing a first portion of the display device corresponding to a modified row of the second data frame to a first refresh rate, and refreshing a second portion of the display device adjacent to the first portion of the display device And refreshing at a second refresh rate.

In still other embodiments, a machine-readable non-volatile storage medium is described. The storage medium, when executed by a processor included in a computing device, causes the computing device to perform steps comprising receiving a first data frame and a second data frame corresponding to image data to be displayed on a display device Can be stored. The steps may further comprise comparing the first row group of the first data frame to both the second row group and the third row group in the second data frame. In addition, the steps include determining that the first row subset of the first row group is different from the second row group, and determining that the second row subset of the first row group is the same as the third row group can do. Further, the steps may include switching the first driver circuit group corresponding to the second row group to the high state, and switching the second driver circuit group corresponding to the third row group to the low state.

Other aspects and advantages of the present invention will become apparent from the following detailed description, made with reference to the accompanying drawings, which illustrate, by way of example, the principles of the described embodiments.

The disclosure will be readily understood by the following detailed description in conjunction with the accompanying drawings, in which like reference numerals designate like structural elements.
Figure 1 shows a computing device having a display with multiple regions of which the displayed graphic is static or dynamic.
Figure 2 shows a system diagram for controlling a display device in accordance with some embodiments discussed herein.
3 shows a diagram of a display device having an array of light emitting diodes (LED) connected to a gate driver and a data driver.
4A and 4B show a gate driver circuit having a unit circuit and an output selector circuit.
Figure 5 illustrates a diagram illustrating how multiple rows and regions of an LED array can be refreshed at different rates based on operation of the gate driver circuit.
Figures 6A and 6B illustrate the problems and solutions associated with providing a plurality of refresh rates to an LED array.
Figure 7 shows a diagram of performing multi-bank and multi-parameter gamma distributions to mitigate flickering and ripple problems at the refresh boundary.
Figure 8 illustrates a method for modifying the refresh rate of a row or a group of rows based on differences between frames provided to an LED array.
Figure 9 illustrates a method of adjusting the refresh rate of one or more rows of an LED array based on flicker content of one or more frames or images to be displayed by the LED array.
Figure 10 illustrates a method of refreshing one or more rows of an LED array according to the amount of time that one or more rows remain static or unchanged.
11 is a block diagram of a computing device that may represent components of various embodiments discussed herein.

Representative applications of the methods and devices according to the present application are described in this section. These examples are provided merely to add context and to aid understanding of the described embodiments. It will thus be apparent to one of ordinary skill in the art that the described embodiments may be practiced without some or all of these specific details. In other instances, well-known process steps have not been described in detail in order not to unnecessarily obscure the described embodiments. Other applications are possible, and therefore the following examples should not be construed as limiting.

In the following detailed description, reference is made to the accompanying drawings, which form a part hereof, and in which is shown by way of illustration specific embodiments in accordance with the described embodiments. While these embodiments have been described in sufficient detail to enable those skilled in the art to practice the described embodiments, it is to be understood that these examples are not limitations, and that other embodiments may be used and that the technical thought and scope of the described embodiments It will be appreciated that changes may be made without departing from the scope of the invention.

Embodiments discussed herein relate to display devices configured to be refreshed at different rates based on the content to be displayed by the display devices. Many computing devices are often referred to as display devices that display static and dynamic images over various usage periods . Static and dynamic images can often be displayed simultaneously on a display of a computing device. According to the embodiments discussed herein, portions of the display displaying the static image may be assigned a lower refresh rate, while portions of the display displaying the dynamic image may be assigned a normal refresh rate . These differences in refresh rates can be partially achieved by an output selector circuit that can prevent the updating of one or more rows of the display. Specifically, the display may include an array of LEDs having a plurality of rows, and each row may be connected to a gate driver, which may not be able to refresh the respective row based on the operations of the output selector circuit have. In some instances, the data driver provides updated frame data to the LED array, and if the updated frame data is equal for two or more refreshes, the gate driver may inhibit the refresh of one or more rows of the LED array . For example, when the LED array is outputting a static image at a portion of the LED array, a control signal may be provided to the output selector that prevents a portion of the LED array from being refreshed at the same rate as the other portions of the LED array. Single rows or groups of rows may be refreshed differently than other portions of the LED array such that at least two refresh rates are used to provide the output from the LED array. In some embodiments, the refresh rate assigned to a portion of the LED array may be based on the flicker content of the image or images to be output by the LED array. For example, when images contain high flicker content, a corresponding portion of the LED array may be assigned a low refresh rate. Moreover, when images contain low flicker content, a corresponding portion of the LED array can be assigned an extremely low refresh rate. In addition, during each refresh, a polarity change can be performed to mitigate wear of the LEDs of the LED array.

When multiple refresh rates are used simultaneously on the display device, the ripple can be seen by the user of the computing device to which the display device is attached. The ripple may be caused by a boundary between two adjacent portions of the display operating at different refresh rates. In order to mitigate and prevent the occurrence of ripples, compensation methods are discussed herein. In one embodiment, a digital compensation method is used. The digital compensation method allows at least 2-bit spatial dithering to be performed on data presented at the display boundary of the problem. In another embodiment, an interpolation process is used that interpolates at least two gamma curves based on the refresh rate of the one or more rows in question. The result of the interpolation is output to one or more rows in question to adjust the gamma of the images to be displayed in one or more rows so that no ripple effect is perceived.

These and other embodiments are discussed below with reference to Figures 1-11; Those skilled in the art will readily appreciate that the detailed description provided herein with respect to these drawings is for the purpose of illustration only and is not to be construed as limiting.

Figure 1 illustrates a computing device 100 having a display 102 with a plurality of regions in which the displayed graphic is static or dynamic. Specifically, the display 102 of the computing device 100 includes a header row 104 and a dynamic icon row 106 that are constantly updated in accordance with a cycle or period programmed into the computing device 100. The display 102 is also not constantly updated, but rather includes a static area 108 that remains static until an input is received from a user, network connection, or other suitable input source to the computing device 100. The header row 104 may typically include an indicator of radio signal strength, clock time, and battery life that may vary at any given moment. Because of this, the header row 104 displays different values and must be adjusted according to the dynamic changes that occur. The dynamic icon row 106 may also be modified in accordance with the updates that occur on the dynamic icons 110. The dynamic icons 110 may display the current date and time of the clock, which is constantly updated and updated. In this manner, dynamic icons 110 must be refreshed more frequently than static areas 108 to reduce energy consumption, as discussed further herein. For example, during operation of an application on the computing device 100, the display manager stored in the computing device 100 may determine whether the one or more rows currently presented on the display 102 include dynamic data. Later, and as further discussed herein, rows containing dynamic data may be assigned a higher refresh rate by the display manager than rows that do not contain dynamic data.

2 illustrates a system diagram 200 for controlling a display device 210 in accordance with some embodiments discussed herein. 2 illustrates how the computing device 202 disclosed herein may be used to simultaneously allocate different refresh rates to various regions of the display device 210 to reduce the battery life of the computing device 202. [ Lt; RTI ID = 0.0 > 210 < / RTI > The computing device 202 may include a memory 204 that stores a display manager 206 for transferring display data between the processor 208 and the display device 210. The display device 210 may include a data driver 216 for providing display data to an LED (light emitting diode) array 214. The LED array 214 may include any suitable type of LED for display on the display device 210. For example, the LED array 214 may be an array of organic light emitting diodes. The gate driver 212 is responsible for providing power to the individual LEDs of the display device 210 and for scanning the rows and / or columns of the LED array 214 according to the refresh rate provided by the display manager 206 It can be losing. The display device includes a plurality of gate drivers 212, a plurality of data drivers 216, and a plurality of LED arrays 214 arranged in any suitable manner for operating the display device 210 . Data drivers 216 and gate drivers 212 may be configured to control the luminance of each LED pixel on the display device 210. In addition, the display device 210 may be a desktop computer, a mobile device, a media Player, or any other computer-related device, for use by a computing device. In some embodiments, the display device 210 is a liquid crystal display (LCD) having an LED backlight. The LED backlight may be separate from the gate drivers 212 and data drivers 216 and the gate drivers 212 and data drivers 216 may be used to separate the transmittances of the liquid crystals for passing the LED light from the LED backlight In this manner, the liquid crystals, or the LEDs of the LED array discussed herein, can function as a pixel array to provide a channel or source for light to be projected from the display device 210. [

Figure 3 shows a diagram 300 of a display device 210 having an LED array 214 connected to a gate driver 212 and a data driver 216. As discussed further herein, the gate driver 212 may include a plurality of gate output controllers that provide power to each row and / or column of the LED array and scan for data outputs. Each gate output 302 may be limited by the refresh rate for each individual row or group of rows, according to embodiments discussed herein. In this manner, one or more gate outputs 302 may be refreshed at a different rate than one or more of the other gate outputs 302. In addition, the data driver 216 may include a plurality of data outputs 304 for updating the signals and transmitting them to the LED array 214. In some embodiments, one or more of the data outputs 304 may be interrupted or switched to a low output state to reduce power consumption when the LED array 214 is displaying static images on the screen. A refresh rate corresponding to the gate outputs 302 in regions that affect portions of the LED array 214 that displays a static image when the data outputs 304 are in an interrupt or low state, Can be reduced.

4A and 4B illustrate a gate driver circuit 400 having a unit circuit 410 and an output selector 412. In FIG. The gate driver circuit 400 includes a control circuit 408 coupled to inputs to enable the plurality of transistors and control circuitry 408 to scan for updates from the data driver 216. One or more of the plurality of transistors provides extremely low off-state currents, as discussed further herein, to allow for a lower power consumption when a low refresh rate is applied to the LED array 214 (E. G., Oxide thin film transistors). ≪ / RTI > In addition, by providing oxide transistors with the LED array 214 of organic LEDs, significant power consumption reduction can be achieved compared to displays using low temperature polysilicon. Thus, the devices and methods discussed herein may be implemented using a gate driver circuit 400 having one or more oxide thin film transistors coupled to the LED array 214 of organic LEDs. In addition, in some embodiments, the gate driver circuit 400 may be included in each gate output 302 to simultaneously scan one or more rows based on one or more clock signals provided to the gate driver circuit 400 have. The output selector 412 is included in the gate driver circuit 400 to inhibit scanning based on the control input 402. For example, the scan signal 414 may be provided to the output selector 412 and may not be output from the selector output 404 by the absence of the control input 402, as shown in Figure 4A. When the control input 402 is not provided to the output selector 412, no signal may be output from the selector output 404 or a low voltage signal may be output. 4B shows an example when the control signal 416 is received at the control input 402 of the output selector 412. As a result of the control signal 416 a conductive path is formed in the transistor between the control input 402 and the selector output 404 so that the scan signal 414 can be output from the selector output 404. The scan signal 414 may be a high voltage, with respect to the logic circuit to which the scan signal is provided, to indicate the "on" or "high" The scan signal 414 is applied to the selector output 404 until the control signal 416 is received at the control input 402. Although the scan signal 414 may be applied constantly throughout the gate driver circuit 400, . In this manner, by applying the control signal 416 to only one or more gate driver circuits 400, since one gate driver circuit 400 can be included in each gate output 302, one of the gate outputs The above rows may fail to output the scan signal 414 or may output an "off" or "low"

Figure 5 illustrates a diagram 500 illustrating how multiple rows and regions of LED array 214 can be refreshed at different rates based on the operation of gate driver circuit 400. [ 5 illustrates how a first refresh rate that is greater than the second refresh rate allocated to the second area 510 of the LED array 214 is assigned to the first area 508 of the LED array 214 Will be described. In the first frame, both the first region 508 and the second region 510, based on the scan performed on all the rows of the LED array 214 as a result of both the first refresh rate and the second refresh rate, Is refreshed. For illustrative purposes, the first region 508 may be a streaming video, and the second region 510 may be a static image bounded with streaming video. From the second frame to the "N + 3" frame, the first refresh rate causes the rows corresponding to the first region 508 to be refreshed in each frame so that the streaming video can be updated in each frame. However, the second refresh rate ensures that the rows corresponding to the second region 510 remain static and not refreshed as a result of the second refresh rate being lower than the first refresh rate. In the "N + 4" frame, the first area 508 and the second area 510 are refreshed simultaneously again after the second area 510 has not been refreshed for many consecutive frames. In this manner, energy is saved by refreshing portions of the LED array 214 at different refresh rates, as opposed to refreshing the entire LED array 214 at the same rate. In some embodiments, any suitable number of refresh rates may be applied to the LED array 214. For example, at least three different refresh rates may be applied to the LED array 214. In addition, a minimum refresh rate may be determined for one or more rows of LED arrays 214. The minimum refresh rate may be the lowest refresh rate that prevents flickering of the image displayed by the LED array 214. Moreover, a polarity change can be performed during each refresh performed in the region or row of each of the LED arrays 214.

6A and 6B illustrate the problems and solutions associated with providing a plurality of refresh rates to the LED array 214. Specifically, FIG. 6A shows a representation of a refresh boundary 608 that can be seen by the user when the refresh rate of the first region 508 is greater than the refresh rate of the second region 510. The representation of the refresh boundary 608 can be seen in Figure 6A, where the average refresh line 606 is illustrated. The average refresh line 606 is an example when the first refresh rate 602 is greater than the second refresh rate 604 and both refresh rates are shown adjacent to the refresh boundary 608 simultaneously. As a result of the average refresh line 606, flicker or luminance ripple will be seen unless the refresh boundary 608 is compensated. In order to solve the problems of flicker and ripple, solutions are described in Figures 6b and 7. Specifically, FIG. 6B shows how the compensation of the refresh boundary 608 can be performed using a set of pixels 610 that can be swapped over the refresh boundary 608 based on the refresh rate in the digital domain have. For example, for each set of at least 2x2 pixels across the refresh boundary 608, each pixel block 612 illustrated in the set of pixels 610 may be sequenced and / As shown in FIG. This technique, sometimes referred to as spatial dithering, may be performed to provide a visually smooth transition between two regions with different refresh rates.

FIG. 7 shows a system diagram 700 for performing multi-bank and multi-parameter gamma distributions to mitigate flickering and ripple problems at the refresh boundary 608. FIG. Specifically, FIG. 7 shows an analog solution for applying gamma switching to a row or row block to correct for flickering and ripple. The system diagram 700 includes a first bank 702 for storing a first gamma curve and a second bank 704 for storing a second gamma curve. Each of the first gamma curve and the second gamma curve is associated with one of two refresh rates that can be applied to the LED array 214, respectively. During a compensation operation using gamma switching, a first gamma curve and a second gamma curve, along with a row block refresh rate 706, are input to the interpolation module 708. The first gamma curve and the second gamma curve are then interpolated. The interpolation method may be in any suitable form for interpolating the image data. The results of the interpolation of the first gamma curve and the second gamma curve may be scaled or otherwise modified in accordance with the row block refresh rate 706 provided to the interpolation module 708. [ As a result, row block gamma 710 is output as a curve from interpolation module 708 to provide an analog solution to obscuring the refresh boundary 608. [ Depending on the severity of flickering and rippling that occur at refresh boundary 608, row block gamma 710 may be applied to one or more rows of LED arrays 214 simultaneously.

Figure 8 illustrates a method 800 of modifying the refresh rate of a row or a group of rows based on differences between frames provided to the LED array 214. [ Specifically, the method 800 includes, by the display manager 206, generating 802 a first data frame and a second data frame. The first and second data frames may be generated by one or more software modules within one or both of the respective devices in the computing device 202 or the display device 210. In step 804, the display manager 206 compares each first frame row (i.e., a row of the first data frame) with each second frame row (i.e., a row of the second data frame). The comparison of step 804 may be done sequentially or one at a time for each row, or a comparison of all the rows may be performed at the same time. In step 806, the display manager 206 determines whether the first frame row is different from the second frame row. If the first frame row is different from the second frame row, then the display manager 206 refreshes the array row associated with the second frame row, at step 808, according to the normal refresh rate. If the first frame row is not different from the second frame row, the display manager 206 refreshes the array row associated with the second frame row at a low refresh rate, at step 810. In this way, rows of frames that remain static across a number of consecutive frames can be maintained at a low refresh rate to save energy. For example, the normal refresh rate may be 30 Hertz or 60 Hertz, the low refresh rate may be 10 Hertz or 2 Hertz, and the extremely low refresh rate may be 1 Hertz. The normal refresh rate, the low refresh rate, and the extremely low refresh rate may be any suitable value or values for a given display device. As discussed further herein, the normal refresh rate may be greater than the low refresh rate, and the lower refresh rate may be greater than the extremely low refresh rate.

Figure 9 illustrates a method 900 of adjusting the refresh rate of one or more rows of LED arrays 214 based on the flicker content of one or more frames or images to be displayed by LED array 214. [ Flicker content or flickering refers to the amount or severity of noticeable transitions between frames that a user may be aware of when viewing a display of a computing device. The method 900 includes a step 902 in which the display manager 206 generates a first data frame and a second data frame. Each of the first data frame and the second data frame includes one or more rows of data to be provided to the LED array 214. The display manager 206 compares each first frame row of the first frame with the second frame row of each second frame in step 904. Thereafter, at step 906, the display manager 206, for one or more of the first frame rows of the first frame and for one or more of the second frame rows of the second frame, 2 frame. If any of the first frame rows is different from the corresponding second frame row, then the display manager 206 may refresh the second frame row or rows of each in accordance with the normal refresh rate, at 908. If any of the first frame rows are the same as the corresponding second frame row, the display manager 206 may proceed to step 910. At step 910, the display manager 206 may determine if any of the second frame rows contain high flicker content. If any of the second frame rows include high flicker content (e.g., content for which the user will notice flickering from the LED array 214), the display manager 206, in step 912, The two frame rows can be refreshed at a low refresh rate. The refresh rates provided herein may be assigned to one or more transitions between frames so that the next transition may be delayed according to their refresh rate. If any of the second frame rows do not contain high flicker content, the display manager 205 may refresh each of the second frame rows at an extremely low refresh rate, at step 914. In this way, the rows or rows that have been assigned an extremely low refresh rate can remain static longer to save energy. Any of the methods discussed herein may repeat one row at a time or simultaneously analyze multiple rows to efficiently determine the appropriate refresh rate for one or more rows of LED arrays 214. [

FIG. 10 shows a method 1000 of refreshing one or more rows of LED arrays 214 according to the amount of time that one or more rows remain static or unchanged. The method 1000 includes a step 1002 in which the display manager 206 determines how long rows or rows of LED arrays 214 were static. At step 1004, the display manager 206 compares the static time, or the time that the row or rows remain static or unchanged, with a predetermined threshold time. The threshold time may be a value that is set by the user or manufacturer, which may remain constant over the lifetime of the LED array 214, or may vary based on hardware changes to the computing device associated with the LED array 214. [ At step 1006, the display manager 206 determines if the static time is greater than the threshold time. If the static time is a threshold timeout, the display manager 206 may, at step 1010, prevent rows or rows from being refreshed. In this manner, the refresh rate of one or more rows of LED arrays 214 will be based on the amount of time that one or more rows were static. If the static time is below the threshold time, the display manager 206 may cause the row or rows to be refreshed, at step 1008. After steps 1008 and 1010, display manager 206 may, in step 1012, analyze the next row or rows of the current frame or preceding frame. For example, method 1000 may be performed for each data frame provided to LED array 214, and for each row of each frame. When all of the frames have been analyzed according to the method 1000, the display manager 206 may proceed to the next frame to be provided to the LED array 214. It should be noted that any method or embodiment discussed herein can be performed in any order or arrangement suitable for mitigating the energy consumption of the display device.

FIG. 11 is a block diagram of a computing device 1100 that may represent components of computing device 100 and / or computing device 202. It will be appreciated that the components, devices, or elements illustrated and described with reference to FIG. 11 may not be essential and thus some of which may be omitted in certain embodiments. Computing device 1100 may include a processor 1102 that represents a microprocessor, coprocessor, circuitry, and / or controller for controlling the overall operation of computing device 1100. It should be appreciated that although processor 1102 is illustrated as a single processor, it may include a plurality of processors. The plurality of processors may be operable to communicate with one another and may be configured collectively to perform one or more functions of computing device 1100 as described herein. In some embodiments, the processor 1102 may be configured to execute instructions that may be stored in the computing device 1100 and / or accessible by the processor 1102 in other manners. Accordingly, whether configured as hardware or a combination of hardware and software, processor 1102 can perform operations and actions in accordance with the embodiments described herein.

The computing device 1100 may also include a user input device 1104 that allows a user of the computing device 1100 to interact with the computing device 1100. For example, the user input device 1104 may take various forms such as a button, a keypad, a dial, a touch screen, an audio input interface, a visual / image capture input interface, an input in the form of sensor data, In addition, the computing device 1100 may include a display 1108 (screen display) that can be controlled by the processor 1102 to display information to a user. The controller 1110 may be used to interface with and control the different equipment via the equipment control bus 1112. The computing device 1100 may also include a network / bus interface 1114 coupled to the data link 1116. The data link 1116 may enable the computing device 1100 to be coupled to a host computer or to an accessory device. The data link 1116 may be provided via a wired connection or a wireless connection. In the case of a wireless connection, the network / bus interface 1114 may include a wireless transceiver.

Computing device 1100 may also include a storage device 1118 that may have a single disk or a plurality of disks (e.g., hard drives) and one or more partitions ("logical volume &Quot;) "). ≪ / RTI > In some embodiments, the storage device 1120 may include flash memory, semiconductor (solid state) memory, and the like. In addition, the computing device 1100 may include a read-only memory (ROM) 1122 and a random access memory (RAM) ROM 1122 may store programs, code, instructions, utilities or processes to be executed in a nonvolatile manner. The RAM 1124 may store volatile data storage and instructions related to the components of the storage management module that are configured to perform the various techniques described herein. The computing device may further include a data bus 1126. [ The data bus 1126 may facilitate data and signal transfer between at least the processor 1102, the controller 1110, the network interface 1114, the storage device 1118, the ROM 1122 and the RAM 1124 have.

The various aspects, embodiments, implementations or features of the described embodiments may be used individually or in any combination. Various aspects of the described embodiments may be implemented by software, hardware, or a combination of hardware and software. The described embodiments may also be embodied as computer readable code on a computer readable medium for controlling manufacturing operations or as computer readable code on a computer readable medium for controlling a manufacturing line. The computer readable medium is any data storage device capable of storing data that can thereafter be read by a computer system. Examples of computer-readable storage media include read-only memory, random access memory, CD-ROMs, HDDs, DVDs, magnetic tape, and optical data storage devices. The computer readable storage medium may also be distributed across computer systems coupled by a network such that the computer readable code is stored and executed in a distributed manner. In some embodiments, the computer readable storage medium may be non-volatile.

The foregoing description, for purposes of explanation, used specific nomenclature to provide a thorough understanding of the described embodiments. It will be apparent, however, to one of ordinary skill in the art, that specific details are not required to practice the described embodiments. Accordingly, the foregoing description of specific embodiments is provided for purposes of illustration and description. They are not intended to be limiting or are intended to limit the described embodiments to the precise forms disclosed. It will be apparent to those of ordinary skill in the art that many modifications and variations are possible in light of the above teachings.

Claims (48)

A method of operating a display device,
Receiving a first data frame and a second data frame corresponding to image data to be displayed on the display device;
Comparing a first row group of the first data frame with both a second row group and a third row group in the second data frame;
Determining that a first row subset of the first row group is different from the second row group;
Determining that the second row subset of the first row group is the same as the third row group;
The first driver circuit group is switched to the high state by providing the output selector of each of the driver circuits of the first driver circuit group corresponding to the second row group with a control signal causing the scanning signal to pass through the driver circuit step; And
Switching the second driver circuit group to a low state by preventing a scan signal from passing through an output selector of each of the driver circuits of the second driver circuit group corresponding to the third row group
/ RTI > 2. The method of claim 1, wherein the high state refreshes the second row group and the low state causes the third row group to remain un-refreshed. The method according to claim 1,
Wherein the second row group and the third row group further comprise determining whether the user includes flicker content to notify flickering from the display device. The method according to claim 1,
Further comprising performing a dithering process at a boundary between the second row group and the third row group. The method according to claim 1,
Further comprising interpolating two gamma curves to compensate for differences between at least two refresh rates corresponding to the second row group and the third row group. The method according to claim 1,
Further comprising switching the second driver circuit group to a high state when the second row subset of the first row group is different from the third row group. As a display device,
A pixel array;
A first group of gate drivers operatively coupled to the pixel array and a second group of gate drivers;
A data driver operatively coupled to the pixel array to provide frame data to the pixel array; And
A control circuit operatively coupled to a first group of the gate drivers or to a gate driver of a second group of gate drivers,
Providing a normal refresh signal to the gate driver when the first frame data set is different from the second frame data set,
Configured to provide a modified refresh signal to the gate driver when the first set of frame data is equal to the second set of frame data,
Lt; / RTI >
The control circuit
(i) causing a first group of gate drivers to refresh a first portion of the pixel array at a normal refresh rate,
(ii) causing a second group of gate drivers to refresh the second portion of the pixel array to a modified refresh rate,
(iii) for refreshing the recognition of the ripple at the refresh boundary between the first portion of the pixel array and the second portion of the pixel array when different refresh signals are simultaneously being used in the pixel array To make compensation
/ RTI > 8. The method of claim 7, wherein a normal refresh signal is provided to the gate driver when a control signal is received by the control circuit and the control signal causes the circuit component to generate a conductive path through which the normal refresh signal will pass, Display device. 8. The method of claim 7 wherein the normal refresh signal refreshes the pixel array to the normal refresh rate and the modified refresh signal refreshes the pixel array to the modified refresh rate, The refresh rate being greater than the refresh rate. 8. The method of claim 7,
Further comprising a plurality of control circuits configured to simultaneously provide the modified refresh signal and the normal refresh signal to the pixel array;
The pixel array
A light emitting diode (LED) backlight, or a plurality of liquid crystals configured to control the transmittance of light from a plurality of organic LEDs. 8. The method of claim 7, wherein the control circuit is configured to perform the compensation by performing a row compensating operation within a frame at the refresh boundary, the refresh boundary being such that the pixel array represents the normal refresh rate in the first portion, And at the same time the second portion is indicative of the modified refresh rate. 12. The display device of claim 11, wherein the row compensation operation comprises performing a dithering operation across a row of the pixel array. 12. The display device of claim 11, wherein the row compensation operation comprises performing interpolation between at least two gamma curves associated with at least one of the normal refresh rate and the modified refresh rate. As a computing device,
A display device, comprising: a display device
A pixel array;
A first group of gate drivers and a second group of gate drivers, each of which is operatively coupled to the pixel array;
A data driver operatively coupled to the pixel array to provide frame data to the pixel array; And
A control circuit operatively coupled to the driver, the control circuit
To simultaneously provide a plurality of different scan signals to the gate driver when the row of the first frame data set is the same as the corresponding first row in the second frame data set and is different from the second row in the second frame data set Configured -
Lt; / RTI >
The control circuit
(i) causing a first group of gate drivers to refresh a first portion of the pixel array at a normal refresh rate,
(ii) causing a second group of gate drivers to refresh the second portion of the pixel array to a modified refresh rate,
(iii) for refreshing the recognition of the ripple at the refresh boundary between the first portion of the pixel array and the second portion of the pixel array when different refresh signals are simultaneously being used in the pixel array To make compensation
≪ / RTI > 15. The computing device of claim 14, wherein the scan signal is provided to the gate driver when a control signal is received by the control circuit and the control signal causes the transistor to generate a conductive path through which the scan signal will pass. 15. The computing device of claim 14, wherein the plurality of different scan signals comprise a normal scan signal and a modified scan signal, wherein the normal scan signal corresponds to a higher scan rate than the modified scan signal. 17. The method of claim 16,
Further comprising a plurality of control circuits configured to simultaneously provide the modified scan signal and the normal scan signal to the pixel array;
The pixel array
A plurality of liquid crystals configured to control the transmittance of light from the LED backlight, or
And a plurality of organic LEDs. delete 15. The method of claim 14,
Further comprising a plurality of gate drivers, said control circuit performing said compensation by performing a row compensating operation in a frame at said refresh boundary, said refresh boundary being such that said pixel array has said normal refresh rate And at the same time said second portion is indicative of said modified refresh rate. 20. The computing device of claim 19, wherein the row compensation operation comprises performing interpolation between at least two gamma curves associated with at least one of the normal refresh rate and the modified refresh rate. delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete

Images