KR101930583B1 - 비이진 선형 블록 코드에 대한 병렬 인코딩 - Google Patents
비이진 선형 블록 코드에 대한 병렬 인코딩 Download PDFInfo
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- KR101930583B1 KR101930583B1 KR1020147029911A KR20147029911A KR101930583B1 KR 101930583 B1 KR101930583 B1 KR 101930583B1 KR 1020147029911 A KR1020147029911 A KR 1020147029911A KR 20147029911 A KR20147029911 A KR 20147029911A KR 101930583 B1 KR101930583 B1 KR 101930583B1
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- 230000005540 biological transmission Effects 0.000 abstract description 6
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- 238000005859 coupling reaction Methods 0.000 description 1
- 238000009795 derivation Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
- H03M13/1131—Scheduling of bit node or check node processing
- H03M13/1134—Full parallel processing, i.e. all bit nodes or check nodes are processed in parallel
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
- H03M13/1131—Scheduling of bit node or check node processing
- H03M13/1137—Partly parallel processing, i.e. sub-blocks or sub-groups of nodes being processed in parallel
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/1171—Parity-check or generator matrices with non-binary elements, e.g. for non-binary LDPC codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/134—Non-binary linear block codes not provided for otherwise
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
- H03M13/1515—Reed-Solomon codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/21—Non-linear codes, e.g. m-bit data word to n-bit code word [mBnB] conversion with error detection or error correction
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6502—Reduction of hardware complexity or efficient processing
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6561—Parallelized implementations
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- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Algebra (AREA)
- General Physics & Mathematics (AREA)
- Pure & Applied Mathematics (AREA)
- Nonlinear Science (AREA)
- Error Detection And Correction (AREA)
- Detection And Correction Of Errors (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/430,222 | 2012-03-26 | ||
| US13/430,222 US8949703B2 (en) | 2012-03-26 | 2012-03-26 | Parallel encoding for non-binary linear block code |
| PCT/US2012/066554 WO2013147935A1 (en) | 2012-03-26 | 2012-11-26 | Parallel encoding for non-binary linear block code |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20140142320A KR20140142320A (ko) | 2014-12-11 |
| KR101930583B1 true KR101930583B1 (ko) | 2018-12-18 |
Family
ID=47470125
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020147029911A Active KR101930583B1 (ko) | 2012-03-26 | 2012-11-26 | 비이진 선형 블록 코드에 대한 병렬 인코딩 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US8949703B2 (enExample) |
| EP (1) | EP2831999B1 (enExample) |
| JP (1) | JP5978382B2 (enExample) |
| KR (1) | KR101930583B1 (enExample) |
| CN (1) | CN104247274B (enExample) |
| WO (1) | WO2013147935A1 (enExample) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102820892B (zh) * | 2012-06-20 | 2016-06-01 | 记忆科技(深圳)有限公司 | 一种用于并行bch编码的电路、编码器及方法 |
| US20150363263A1 (en) * | 2014-06-12 | 2015-12-17 | HGST Netherlands B.V. | ECC Encoder Using Partial-Parity Feedback |
| US11611359B2 (en) | 2015-05-29 | 2023-03-21 | SK Hynix Inc. | Data storage device |
| KR20180059150A (ko) * | 2016-11-25 | 2018-06-04 | 에스케이하이닉스 주식회사 | 1 클럭 인코딩이 가능한 에러 정정 코드 인코더 및 에러 정정 코드 인코딩 방법과, 그리고 그 에러 정정 코드 인코더를 포함하는 메모리 컨트롤러 |
| US11515897B2 (en) | 2015-05-29 | 2022-11-29 | SK Hynix Inc. | Data storage device |
| KR102285940B1 (ko) | 2015-05-29 | 2021-08-05 | 에스케이하이닉스 주식회사 | 데이터 처리 회로, 데이터 처리 회로를 포함하는 데이터 저장 장치 및 그것의 동작 방법 |
| US10396827B2 (en) | 2015-09-25 | 2019-08-27 | SK Hynix Inc. | Data storage device |
| US11177835B2 (en) | 2015-09-25 | 2021-11-16 | SK Hynix Inc. | Data storage device |
| KR102683471B1 (ko) * | 2021-05-07 | 2024-07-11 | 한국전자통신연구원 | 병렬 리드솔로몬 부호화 장치 및 방법 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4293951A (en) | 1979-03-16 | 1981-10-06 | Communications Satellite Corporation | Method and apparatus for encoding/decoding a convolutional code to a periodic convolutional code block |
| US4777635A (en) | 1986-08-08 | 1988-10-11 | Data Systems Technology Corp. | Reed-Solomon code encoder and syndrome generator circuit |
Family Cites Families (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4410989A (en) * | 1980-12-11 | 1983-10-18 | Cyclotomics, Inc. | Bit serial encoder |
| DE69315018T2 (de) * | 1992-08-21 | 1998-04-30 | Koninkl Philips Electronics Nv | Hardware-effizientes Verfahren und Anordnung zur Kodierung von BCH-Kodes und insbesondere Reed-Solomon-Kodes |
| US5383204A (en) * | 1993-06-29 | 1995-01-17 | Mitsubishi Semiconductor America, Inc. | Parallel encoding apparatus and method implementing cyclic redundancy check and Reed-Solomon codes |
| EP1018220B1 (en) * | 1998-08-06 | 2007-07-25 | Samsung Electronics Co., Ltd. | Channel encoding/decoding in communication system |
| US6493845B1 (en) | 1999-06-21 | 2002-12-10 | Maxtor Corporation | Parallel input output combined system for producing error correction code redundancy symbols and error syndromes |
| JP4295871B2 (ja) * | 1999-09-24 | 2009-07-15 | 株式会社東芝 | 誤り訂正復号器 |
| WO2001076077A2 (en) * | 2000-03-31 | 2001-10-11 | Ted Szymanski | Transmitter, receiver, and coding scheme to increase data rate and decrease bit error rate of an optical data link |
| US6895545B2 (en) * | 2002-01-28 | 2005-05-17 | Broadcom Corporation | System and method for generating cyclic codes for error control in digital communications |
| JP2004208282A (ja) * | 2002-12-09 | 2004-07-22 | Sony Corp | データ処理装置 |
| KR101238108B1 (ko) * | 2004-01-15 | 2013-02-27 | 퀄컴 인코포레이티드 | 리드-솔로몬 인코딩 및 디코딩을 수행하는 방법 및 장치 |
| US7565594B2 (en) * | 2004-08-26 | 2009-07-21 | Alcatel-Lucent Usa Inc. | Method and apparatus for detecting a packet error in a wireless communications system with minimum overhead using embedded error detection capability of turbo code |
| US7395492B2 (en) * | 2004-09-13 | 2008-07-01 | Lucent Technologies Inc. | Method and apparatus for detecting a packet error in a wireless communications system with minimum overhead using tail bits in turbo code |
| US7600176B2 (en) * | 2006-03-07 | 2009-10-06 | Broadcom Corporation | Performing multiple Reed-Solomon (RS) software error correction coding (ECC) Galois field computations simultaneously |
| US7831895B2 (en) * | 2006-07-25 | 2010-11-09 | Communications Coding Corporation | Universal error control coding system for digital communication and data storage systems |
| KR20080052039A (ko) * | 2006-12-07 | 2008-06-11 | 삼성전자주식회사 | 순환 중복 검사에 의한 정정 에러를 검사하는 방법 및 그장치 |
| US8286059B1 (en) * | 2007-01-08 | 2012-10-09 | Marvell International Ltd. | Word-serial cyclic code encoder |
| US8151172B2 (en) * | 2008-07-10 | 2012-04-03 | Lsi Corporation | Adjustable error-correction for a reed solomon encoder/decoder |
| CN101834615B (zh) * | 2009-03-12 | 2012-12-26 | 高通创锐讯通讯科技(上海)有限公司 | 里德-索罗蒙编码器实现方法 |
| JP5500357B2 (ja) * | 2010-03-31 | 2014-05-21 | ソニー株式会社 | 符号化装置、および符号化方法 |
| CN102231631B (zh) * | 2011-06-20 | 2018-08-07 | 深圳市中兴微电子技术有限公司 | Rs编码器的编码方法及rs编码器 |
-
2012
- 2012-03-26 US US13/430,222 patent/US8949703B2/en active Active
- 2012-11-26 CN CN201280071938.1A patent/CN104247274B/zh active Active
- 2012-11-26 WO PCT/US2012/066554 patent/WO2013147935A1/en not_active Ceased
- 2012-11-26 JP JP2015503189A patent/JP5978382B2/ja active Active
- 2012-11-26 EP EP12808950.5A patent/EP2831999B1/en active Active
- 2012-11-26 KR KR1020147029911A patent/KR101930583B1/ko active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4293951A (en) | 1979-03-16 | 1981-10-06 | Communications Satellite Corporation | Method and apparatus for encoding/decoding a convolutional code to a periodic convolutional code block |
| US4777635A (en) | 1986-08-08 | 1988-10-11 | Data Systems Technology Corp. | Reed-Solomon code encoder and syndrome generator circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| EP2831999B1 (en) | 2019-01-09 |
| CN104247274B (zh) | 2019-04-16 |
| US8949703B2 (en) | 2015-02-03 |
| KR20140142320A (ko) | 2014-12-11 |
| US20130254639A1 (en) | 2013-09-26 |
| WO2013147935A1 (en) | 2013-10-03 |
| CN104247274A (zh) | 2014-12-24 |
| JP2015512585A (ja) | 2015-04-27 |
| JP5978382B2 (ja) | 2016-08-24 |
| EP2831999A1 (en) | 2015-02-04 |
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