KR101917601B1 - Multi-layer electron apparatus and method for manufacturing the same - Google Patents

Multi-layer electron apparatus and method for manufacturing the same Download PDF

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KR101917601B1
KR101917601B1 KR1020160018674A KR20160018674A KR101917601B1 KR 101917601 B1 KR101917601 B1 KR 101917601B1 KR 1020160018674 A KR1020160018674 A KR 1020160018674A KR 20160018674 A KR20160018674 A KR 20160018674A KR 101917601 B1 KR101917601 B1 KR 101917601B1
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flexible
layer
electronic
layers
element array
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KR1020160018674A
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Korean (ko)
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KR20170096867A (en
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장진
김용환
엄재광
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경희대학교 산학협력단
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B27/00—Layered products comprising a layer of synthetic resin
    • B32B27/28—Layered products comprising a layer of synthetic resin comprising synthetic resins not wholly covered by any one of the sub-groups B32B27/30 - B32B27/42
    • B32B27/281—Layered products comprising a layer of synthetic resin comprising synthetic resins not wholly covered by any one of the sub-groups B32B27/30 - B32B27/42 comprising polyimides
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B27/00—Layered products comprising a layer of synthetic resin
    • B32B27/06—Layered products comprising a layer of synthetic resin as the main or only constituent of a layer, which is next to another layer of the same or of a different material
    • B32B27/08—Layered products comprising a layer of synthetic resin as the main or only constituent of a layer, which is next to another layer of the same or of a different material of synthetic resin
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/07—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
    • H01L27/0705—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type
    • H01L27/0727—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type in combination with diodes, or capacitors or resistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/495—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a simple metal, e.g. W, Mo
    • H01L29/4958—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a simple metal, e.g. W, Mo with a multiple layer structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2305/00—Condition, form or state of the layers or laminate
    • B32B2305/34—Inserts
    • B32B2305/342—Chips
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2379/00—Other polymers having nitrogen, with or without oxygen or carbon only, in the main chain
    • B32B2379/08—Polyimides
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2457/00—Electrical equipment

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

A multilayer electronic device and a method of manufacturing the same are disclosed. The multilayer electronic device of the present invention includes at least one electronic device array and at least one electronic device disposed between at least three flexible polyimide layers and at least three flexible polyimide layers, The flexible PI layer of at least one of the layers of the flexible PI layers above the layer includes at least one electronic element array and a plurality of contact holes for electrically connecting at least one electronic component.

Description

[0001] MULTI-LAYER ELECTRON APPARATUS AND METHOD FOR MANUFACTURING THE SAME [0002]

The present invention relates to a multilayer electronic device in which electronic element arrays and electronic components are highly integrated and a method of manufacturing the same.

BACKGROUND ART [0002] Recently, technologies for increasing the degree of integration of electronic devices used in flexible display devices have been developed. In the case where a large number of electronic elements are required depending on the flexible display device, or when the device size is to be manufactured compactly, the integration technique of the electronic elements can be usefully used.

In general, as a method for increasing the degree of integration of an electronic device, a method of reducing the size of the electronic device or reducing the space between the electronic devices in the flexible display device is used. However, such a method corresponds to a method of integrating an electronic device in the same plane on a substrate.

Japanese Patent Registration No. 2742747, " Multilayer Semiconductor Integrated Circuit Having Thin Film Transistor " U.S. Published Patent Application No. 2011/0124183, "METHOD FOR MANUFACTURING FLEXIIBLE SEMICONDUCTOR SUBSTRATE" U. S. Patent No. 5,583, 320, " Reinforcement for flexible printed circuit board &

The present invention is characterized in that at least one electronic element array and at least one electronic element are disposed between at least three flexible PI layers having contact parts for electrical connection to stack the electronic element arrays and electronic components in a multilayer structure to form a highly integrated multi- An electronic device and a method of manufacturing the same are provided.

Further, a multi-layer electronic device capable of removing a Bazzel by including in the flexible PI layer a contact hole for electrically connecting at least one electronic element array and at least one electronic component disposed in different layers, And a manufacturing method thereof.

A multilayer electronic device comprising an electronic element array and an electronic component according to an embodiment includes at least three flexible polyimide layers made of a polyimide material and at least one electronic element array disposed between the flexible PI layers, Wherein at least one of the at least three layers of the flexible PI layers includes at least one electronic element array and a plurality of contact holes for electrically connecting the at least one electronic component, .

The electronic element array disposed between the flexible PI layers may include one or more arrays of at least one of a dual gate oxide thin film transistor array, a sensor array, and a light emitting element array.

The electronic component disposed between the flexible PI layers may include at least one component of at least one of a resistor, a capacitor, and an inductor.

 The at least one electronic element array and the at least one electronic component may be mutually contacted without a bezel between the at least three layers of flexible PI layers.

Wherein a plurality of contact holes included in at least one flexible PI layer of at least three or more flexible PI layers includes a contact line for supplying a driving signal to the at least one electronic element array and the at least one electronic component, And a transistor.

The at least three or more flexible PI layers may have different thicknesses or have the same thickness.

The dual gate oxide thin film transistor array may include a plurality of dual gate oxide thin film transistors. The plurality of dual gate oxide thin film transistors may include a substrate, a first gate electrode positioned on the substrate, an oxide semiconductor layer positioned on the first gate electrode, a source electrode and a drain electrode positioned in the oxide semiconductor layer, And a second gate electrode positioned on the oxide semiconductor layer.

The plurality of dual gate oxide thin film transistors further include a gate insulating layer positioned between the first gate electrode and the oxide semiconductor layer and a protective layer positioned between the source electrode and the drain electrode and the second gate electrode .

The oxide semiconductor layer may include amorphous indium gallium zinc oxide (a-IGZO), zinc oxide (ZnO), indium zinc oxide (IZO), indium tin oxide (ITO), zinc tin oxide (ZTO) , Gallium zinc oxide (GZO), hafnium indium zinc oxide (HIZO), zinc indium tin oxide (ZITO), and aluminum zinc tin oxide (AZTO).

Meanwhile, a multilayer electronic device including an electronic element array and an electronic device according to an embodiment includes a step of forming a first flexible PI layer by coating a polyimide-based solution on a carrier substrate, forming a first flexible PI layer Forming at least one first electronic element array and at least one first electronic component on the first flexible PI layer by coating a polyimide based solution on the first flexible PI layer to form a second flexible PI layer, Forming at least one second electronic element array and at least one second electronic component on the flexible PI layer, coating a polyimide based solution on the second flexible PI layer to form a third flexible PI layer And removing the carrier substrate, wherein at least one of the steps of forming the first to third flexible PI layers comprises: And forming a plurality of contact holes for electrically connecting the second electronic element arrays and the at least one first and second electronic components.

Before the carrier substrate is removed, a step of forming a flexible PI layer or a step of forming at least one electronic element array and at least one electronic part may be performed at least once more.

The first and second electronic device arrays may include an electronic device array and an electronic device including one or more arrays of a dual gate oxide thin film transistor array, a sensor array, and a light emitting device array.

The first and second electronic components may include at least one component of at least one of a resistor, a capacitor, and an inductor.

Wherein forming the plurality of contact holes comprises providing at least one contact line, a shift register, and a transistor for supplying drive signals to the at least one first and second electronic device arrays and the at least one first and second electronic components, More than one can be formed.

In the forming of the first to third flexible PI layers, the polyimide-based solution may be coated with different thicknesses or all of the same thickness.

According to the present invention, at least one electronic element array and at least one electronic component are disposed between at least three flexible PI layers and laminated in a multilayer structure, whereby the electronic element array and the electronic components can be highly integrated.

Further, according to the present invention, by including in the flexible PI layer a contact hole for electrically connecting at least one electronic element array and at least one electronic component disposed in different layers, a Bazzel Can be removed.

Figure 1 illustrates a multilayer electronic device in accordance with an embodiment of the present invention.
2A and 2B illustrate a multilayer electronic device according to an embodiment of the present invention.
3A-3D illustrate a multilayer electronic device according to another embodiment.
4A and 4B illustrate a multilayer electronic device according to another embodiment.
5A to 5G show a method of manufacturing a multilayer electronic device according to an embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings and accompanying drawings, but the present invention is not limited to or limited by the embodiments.

It is to be understood that when an element or layer is referred to as being " on " or " on " of another element or layer, All included. On the other hand, when a device is referred to as " directly on " or " directly above ", it does not intervene another device or layer in the middle.

The terms spatially relative, "below", "beneath", "lower", "above", "upper" May be used to readily describe a device or a relationship of components to other devices or components. Spatially relative terms should be understood to include, in addition to the orientation shown in the drawings, terms that include different orientations of the device during use or operation. For example, when inverting an element shown in the figure, an element described as " below or beneath " of another element may be placed "above" another element. Thus, the exemplary term " below " can include both downward and upward directions. The elements can also be oriented in different directions, in which case spatially relative terms can be interpreted according to orientation.

The terminology used herein is for the purpose of illustrating embodiments and is not intended to be limiting of the present invention. In the present specification, the singular form includes plural forms unless otherwise specified in the specification. It is noted that the terms "comprises" and / or "comprising" used in the specification are intended to be inclusive in a manner similar to the components, steps, operations, and / Or additions.

Unless defined otherwise, all terms (including technical and scientific terms) used herein may be used in a sense commonly understood by one of ordinary skill in the art to which this invention belongs. Also, commonly used predefined terms are not ideally or excessively interpreted unless explicitly defined otherwise.

In the following description of the present invention, a detailed description of known functions and configurations incorporated herein will be omitted when it may make the subject matter of the present invention rather unclear. The terminology used herein is a term used for appropriately expressing an embodiment of the present invention, which may vary depending on the user, the intent of the operator, or the practice of the field to which the present invention belongs. Therefore, the definitions of these terms should be based on the contents throughout this specification.

Figure 1 illustrates a multilayer electronic device in accordance with an embodiment of the present invention.

Referring to FIG. 1, a multilayer electronic device 100 includes at least three flexible polyimide layers (PI, 111, 112, 113) and at least one electronic element array disposed between flexible PI layers, And first and second circuit layers 121 and 122 formed of parts.

The first to third flexible PI layers 111, 112 and 113 are flexible substrates made of a polyimide-based material and have a stacked structure in that order. The first to third flexible PI layers 111, 112 and 113 may have different thicknesses and may have the same thickness.

The first and second circuit layers 121 and 122 are disposed between the first to third flexible PI layers 111, 112 and 113, respectively.

1, the first circuit layer 121 is disposed between the first and second flexible PI layers 111 and 112 and the second circuit layer 122 is disposed between the second and third flexible PI layers 112 , 113). Here, the flexible PI layer of at least one of the first to third flexible PI layers 111, 112, and 113 is used for electrically connecting electronic element arrays and electronic components included in the respective circuit layers 121 and 122 And includes a plurality of contact holes (not shown).

1, the circuit layers 121 and 122 disposed between the first to third flexible PI layers 111, 112 and 113 may be composed of the same kind of electronic element array and electronic parts, And an electronic component of the electronic device array. In addition, the number of electronic element arrays and electronic components constituting each circuit layer may vary depending on the design mode.

According to Fig. 1, by arranging the circuit layers 121 and 122 between the three flexible PI layers 111, 112 and 113, the electronic elements can be highly integrated in the vertical direction. Therefore, it is possible to realize a higher integration ratio compared with a conventional method of integrating electronic devices in the same plane on a substrate.

In FIG. 1, three flexible PI layers 111, 112 and 113 and two circuit layers 121 and 122 are shown and described, but the embodiment is not limited thereto. That is, it may include four flexible PI layers and three circuit layers disposed therebetween, respectively, or may include four flexible PI layers and four electronic element arrays disposed on the four flexible PI layers.

2A and 2B illustrate a multilayer electronic device according to an embodiment of the present invention. 2A and 2B, a multilayer electronic device 200 includes a first flexible PI layer 211, at least one first electronic element array, and at least one first electronic component 221 (hereinafter referred to as " A second flexible PI layer 212, at least one second electronic element array and at least one second electronic component 222 (hereinafter referred to as a " second circuit layer "), And a third flexible PI layer 213 are stacked in this order. In the multilayer electronic device 200, the flexible PI layer of at least one of the first to third flexible PI layers 211, 212, and 213 has the first circuit layer 221 and the second circuit layer 222 And a plurality of contact holes 230 for electrical connection.

In other words, the second flexible PI layer 212 is electrically connected to the first circuit layer 221 disposed on the lower surface thereof and the second circuit layer 222 disposed on the upper surface thereof, And may include a plurality of contact holes 230.

A plurality of contact holes 230 will be described in detail with reference to FIG. 2B.

Referring to FIG. 2B, the plurality of contact holes 230 include at least one first electronic element array and the first electronic component included in the first circuit layer 221, and at least one first electronic element array and the second electronic component included in the second circuit layer 222 And connects one second electronic element array and the second electronic component.

 2B, a plurality of contact holes 231, 232, 233, 234, and 234 may be formed in the second flexible PI layer 212. In this case, the plurality of contact holes 230 may be at least one of contact lines, shift registers, 235, 236 and 237 are included.

The arrangement structure of the plurality of contact holes 231 to 237 included in the second flexible PI layer 212 is the same as the arrangement structure of the first and second circuit layers 221 and 222 May be changed in consideration of the position of the electrode.

3A-3D illustrate a multilayer electronic device according to another embodiment.

The multilayer electronic device 300 includes a first flexible PI layer 311, at least one first electronic element array and at least one first electronic component 321 (hereinafter referred to as a "first circuit layer"), A second flexible PI layer 312, at least one second electronic element array and at least one second electronic component 322 (hereinafter referred to as a " second circuit layer "), a third flexible PI layer 313, At least one third electronic element array and at least one third electronic component 323 (hereinafter referred to as a "third circuit layer"), a fourth flexible PI layer 314, and at least one fourth electronic element array And at least one fourth electronic component 324 (hereinafter referred to as " fourth circuit layer ").

That is, the multilayer electronic device 300 may include four flexible PI layers 311 to 314 and four circuit layers 321 to 324 disposed on the flexible PI layers 311 to 314, respectively.

Each electronic element array included in the four circuit layers 321 to 324 may include one or more arrays of at least one of a dual gate oxide thin film transistor array, a sensor array, and a light emitting element array. Each of the electronic components included in the four circuit layers 321 to 324 may include at least one component of at least one of a resistor, a capacitor, and an inductor.

3A to 3D, the electronic element array included in each of the circuit layers 321, 322, 323, and 324 is assumed to be a dual gate oxide thin film transistor.

Referring to FIG. 3B, the dual gate oxide thin film transistor 330 includes a substrate 330a, a first gate electrode 330b, a gate insulating layer 330c, an oxide semiconductor layer 330d, a source electrode 330e, A second gate electrode 330f, a passivation layer 330g, and a second gate electrode 330h.

The first gate electrode 330b is formed on the substrate 330a. The gate insulating layer 330c is formed on the substrate 330a and covers the first gate electrode 330b to insulate the first gate electrode 330b from the oxide semiconductor layer 330d.

The oxide semiconductor layer 330d is formed on the gate insulating layer 330b. According to an embodiment, the oxide semiconductor layer 330d may be formed of amorphous indium-gallium-zinc oxide (a-IGZO). However, the present invention is not limited thereto, and examples thereof include zinc oxide (ZnO), indium zinc oxide (IZO), indium tin oxide (ITO), zinc tin oxide (ZTO), gallium zinc oxide (GZO), hafnium indium zinc oxide Indium tin oxide (ZITO) and aluminum zinc tin oxide (AZTO).

The source electrode 330e and the drain electrode 330f are formed in a direction parallel to each other. The source electrode 330e and the drain electrode 330f may be made of metal, for example, molybdenum (Mo) may be used. Although not shown in the drawing, an etch stopper (not shown) may be disposed on the oxide semiconductor layer 330d between the source electrode 330e and the drain electrode 330f.

The protective layer (Passivation Layer) (330g) is the source electrode (330e) and a drain electrode formed on the (330f), the protective layer (330g) may be an oxide (for example, silicon oxide (SiO 2)) or may be of a nitride have.

The second gate electrode 330h is formed on the protective layer 330g.

In the dual gate oxide thin film transistor 330, the first gate electrode 330b is a bottom gate electrode and the second gate electrode 330h is a top gate electrode. Therefore, when the same voltage is applied to the first and second gate electrodes 330b and 120h, the width of the channel formed in the oxide semiconductor layer 330d increases to pass through the source electrode 330e and the drain electrode 330f It is possible to increase the amount of current to be supplied. As the amount of current increases, the dual gate oxide thin film transistor 330 has higher electrical characteristics and reliability than a transistor having a single gate structure, because the field effect mobility and voltage-current characteristics are improved.

The electrical connection structure between each of the circuit layers 321, 322, 323, and 324 composed of such a dual gate oxide thin film transistor array and electronic components will be described in detail with reference to FIGS. 3C and 3D.

3C and 3D, the three flexible PI layers 312 to 314 include a plurality of contact holes 331, 332, 333, and 334 for electrically connecting the first to fourth circuit layers 321 to 324 , 335, 336, 337).

The first contact hole 331, the fourth contact hole 334, the fifth contact hole 335 and the sixth contact hole 336 are included in the third flexible PI layer 313 to form the first circuit layer 321, And the third circuit layer 323 are electrically connected to each other. The second contact hole 332 is included in the second flexible PI layer 312 to electrically connect the first circuit layer 321 and the second circuit layer 322 and the third contact hole 333 And is included in the third flexible PI layer 313 to electrically connect the second circuit layer 322 and the third circuit layer 323. The seventh contact hole 337 is included in the fourth flexible PI layer 314 to electrically connect the first circuit layer 321 and the fourth circuit layer 324.

The layout structure of the contact holes 331 to 337 included in the second to fourth flexible PI layers 312 to 314 is different from the arrangement of the electrodes included in the first to fourth circuit layers 321, 322, 323 and 324 . ≪ / RTI >

3C and 3D, the multilayer electronic device 300 can be highly integrated, and the mutual contact between the first to fourth flexible PI layers 311 to 314 can be performed without a base, It becomes possible.

4A and 4B illustrate a multilayer electronic device according to another embodiment.

The multilayer electronic device 400 includes a first flexible PI layer 411, at least one first electronic element array and at least one first electronic component 421 (hereinafter referred to as a "first circuit layer"), At least one second electronic component array and at least one second electronic component 422 (hereinafter referred to as a " second circuit layer "), a third flexible PI layer 413, a second flexible PI layer 412, At least one third electronic element array and at least one third electronic component 423 (hereinafter referred to as " third circuit layer ").

The first circuit layer 421 includes a dual gate oxide thin film transistor array, the second circuit layer 422 includes an array of light emitting elements, and the third circuit layer 423 includes a sensor array. In addition, the first to third circuit layers 421 to 423 may include at least one component of at least one of a resistor, a capacitor, and an inductor.

At least one PI layer of the first to third flexible PI layers 411 to 413 may include a plurality of contact holes 430 for electrically connecting the first to third circuit layers 421 to 423 .

The structure of the plurality of contact holes 430 will be described in detail with reference to FIG. 4B.

4B, the plurality of contact holes 430 may include a shift resist circuit 431 embedded in the second flexible PI layer 412, and may be exposed to one side of the second flexible PI layer 412 And may include a contact line 432.

The first circuit layer 421 and the second circuit layer 422 can be electrically connected by using the shift resist circuit 431 and the contact line 432. A driving signal is supplied to each of the circuit layers 421 and 422 to drive the respective circuit layers 421 and 422 so that the light emitting element array 422 included in the second circuit layer 422, Can be controlled. The third flexible PI layer 413 also includes a plurality of contact holes 430 having the same or similar structure as that of the second flexible PI layer 412, 423 of the sensor array.

5A to 5G show a method of manufacturing a multilayer electronic device according to an embodiment of the present invention.

5A shows a process of forming a first flexible PI layer 511 by coating a polyimide-based solution on a carrier substrate 501. FIG. Here, the first flexible PI layer 511 may have a first thickness.

The carrier substrate 501 may be made of a porous ceramic material. Since the porous ceramic material is stable at high temperatures and has high mechanical strength, it is possible to prevent deformation of the carrier substrate 501 due to temperature and impact applied during the manufacturing process of the multilayer electronic device.

5B shows a process of forming at least one first electronic element array and at least one first electronic component 521 (hereinafter referred to as " first circuit layer ") on the first flexible PI layer 511 Respectively. Here, the first electronic element array may be any one of a dual gate oxide thin film transistor array, a sensor array, and a light emitting element array, and the first electronic component may be at least one kind of component of a resistor, a capacitor, and an inductor.

5C illustrates a process of forming a second flexible PI layer 513 by coating a polyimide-based solution on the first circuit layer 512. FIG. Here, the second flexible PI layer 513 may be formed to have the same thickness as the first flexible PI layer 511.

In this process, a process of forming a plurality of contact holes 531 for electrical connection between the first circuit layer 521 and an additional circuit layer to be formed on the second flexible PI layer 512 may be included. Here, the plurality of contact holes 531 may be at least one of a contact line, a shift register, and a transistor.

In the process of forming the plurality of contact holes 531, a plurality of contact holes 531 are disposed on the first circuit layer 521 before the polyimide-based solution is coated, and then the polyimide- . ≪ / RTI > Alternatively, after the second flexible PI layer 512 is formed, the second flexible PI layer 512 may be etched and then a metal material may be deposited. At this time, the positions of the plurality of contact holes 531 can be determined in consideration of the electrode structure of the first circuit layer 521 and the electrode structure of the additional circuit layer.

5D shows a process of forming at least one second electronic element array and at least one second electronic component 522 (hereinafter referred to as " second circuit layer ") on the second flexible PI layer 513 Respectively. The second circuit layer 522 may be composed of an electronic element array and an electronic element of the same kind as the first circuit layer 512 and may be composed of another kind of electronic element array and electronic parts.

5E illustrates a process of forming a third flexible PI layer 513 by coating a polyimide-based solution on the second circuit layer 522. [ Here, the third flexible PI layer 515 may be formed to have the same thickness as the first flexible PI layer 511.

Although it has been shown and described above that a plurality of contact holes 531 are formed only in the second flexible PI layer 512, the first flexible PI layer 511 and the third flexible PI layer 513 may also be provided with a plurality May be formed.

FIG. 5F shows a step of removing the carrier substrate 501 from the first flexible PI layer 511. FIG. The carrier substrate 501 can be physically removed using a separate apparatus. Through such processes, a highly integrated multilayer electronic device 500 as shown in FIG. 5G can be manufactured.

The first and second circuit layers 521 and 522 are disposed between the three flexible PI layers 511, 512, and 513, but the process of forming the flexible PI layer or the formation of the circuit layer May be further performed at least once. Accordingly, it is possible to manufacture a multilayer electronic device composed of four flexible PI layers and three circuit layers, or a multilayer electronic device composed of four flexible PI layers and four circuit layers. The number of flexible PI layers and circuit layers may vary depending on the degree of integration and design of the multilayer electronic device.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments. For example, it is to be understood that the techniques described may be performed in a different order than the described methods, and / or that components of the described systems, structures, devices, circuits, Lt; / RTI > or equivalents, even if it is replaced or replaced.

Therefore, other implementations, other embodiments, and equivalents to the claims are also within the scope of the following claims.

100: Multilayer electronic device
111: first flexible PI layer
112: second flexible PI layer
113: third flexible PI layer
121: first circuit layer
122: second circuit layer

Claims (15)

At least three flexible polyimide layers made of a polyimide-based material; And
At least two circuit layers including at least one electronic element array and at least one electronic component, each of which is disposed between the flexible PI layers,
Wherein the flexible PI layer of at least one of the at least three or more flexible PI layers includes a plurality of contact holes for electrically connecting the at least one electronic element array and at least one electronic component,
Wherein the plurality of contact holes include a contact line exposed to one side of the flexible PI layer to supply a driving signal to the at least one electronic element array and the at least one electronic component and a shift resist circuit incorporated in the flexible PI layer Wherein the at least one electronic element array and the at least one electronic component are mutually contacted in a vertical direction,
Sensor array electronic element array and electronic components.
The method according to claim 1,
And the electronic element array disposed between the flexible PI layers,
A dual-gate oxide thin-film transistor array, a sensor array, and a light-emitting element array.
The method according to claim 1,
And the electronic parts disposed between the flexible PI layers, respectively,
A multilayer electronic device comprising an electronic element array and an electronic component, the electronic element array comprising at least one component of at least one of a resistor, a capacitor, and an inductor.
The method according to claim 1,
The at least one electronic element array and the at least one electronic component,
And an electronic element array and an electronic component which are mutually contacted without a baselayer between the at least three flexible PI layers.
delete The method according to claim 1,
The at least three or more flexible PI layers,
Having different thicknesses, or having the same thickness as each other.
3. The method of claim 2,
Wherein the dual gate oxide thin film transistor array comprises:
A plurality of dual gate oxide thin film transistors,
Wherein the plurality of dual gate oxide thin film transistors comprise:
Board;
A first gate electrode located on the substrate;
An oxide semiconductor layer disposed on the first gate electrode;
A source electrode and a drain electrode located in the oxide semiconductor layer; And
And a second gate electrode located on the oxide semiconductor layer.
8. The method of claim 7,
Wherein the plurality of dual gate oxide thin film transistors comprise:
A gate insulating layer disposed between the first gate electrode and the oxide semiconductor layer; And
And a protective layer disposed between the source electrode and the drain electrode and the second gate electrode,
Lt; RTI ID = 0.0 > electronic device. ≪ / RTI >
8. The method of claim 7,
Wherein the oxide semiconductor layer
Amorphous indium-gallium-zinc oxide (a-IGZO), zinc oxide (ZnO), indium zinc oxide (IZO), indium tin oxide (ITO), zinc tin oxide (ZTO), gallium zinc oxide GZO), hafnium indium zinc oxide (HIZO), zinc indium tin oxide (ZITO), and aluminum zinc tin oxide (AZTO).
Coating a polyimide-based solution on the carrier substrate to form a first flexible polyimide layer;
Forming a first circuit layer comprising at least one first electronic element array and at least one first electronic component on the first flexible PI layer;
Coating a polyimide-based solution on the first flexible PI layer to form a second flexible PI layer;
Forming a second circuit layer on the second flexible PI layer, the second circuit layer including at least one second electronic element array and at least one second electronic component;
Coating a polyimide-based solution on the second flexible PI layer to form a third flexible PI layer; And
And removing the carrier substrate,
At least one of the steps of forming the first to third flexible PI layers comprises:
Forming a plurality of contact holes for electrically connecting the at least one first and second electronic device arrays with the at least one first and second electronic components,
Wherein the plurality of contact holes include a contact line exposed to one side of the flexible PI layer to supply a driving signal to the at least one electronic element array and the at least one electronic component and a shift resist circuit incorporated in the flexible PI layer Wherein the at least one electronic device array and the at least one electronic device are mutually contacted in a vertical direction, including at least one of the electronic device arrays and the electronic device.
11. The method of claim 10,
Wherein the step of forming a flexible PI layer or the step of forming a circuit layer comprising at least one electronic element array and at least one electronic component is further performed at least once before removing the carrier substrate, And an electronic component.
11. The method of claim 10,
Wherein the first and second electronic device arrays include:
A dual-gate oxide thin-film transistor array, a sensor array, and a light-emitting element array.
11. The method of claim 10,
Wherein the first and second electronic parts comprise:
A method of manufacturing a multilayer electronic device comprising an electronic device array and an electronic device, the electronic device including at least one component of at least one of a resistor, a capacitor, and an inductor.
delete 11. The method of claim 10,
The forming of the first to third flexible PI layers may include:
Wherein said polyimide-based solution is coated with different thicknesses or all of said polyimide-based solutions are coated with the same thickness.
KR1020160018674A 2016-02-17 2016-02-17 Multi-layer electron apparatus and method for manufacturing the same KR101917601B1 (en)

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