TWI647870B - Organic thin film transistor and pixel structure - Google Patents

Abstract

An organic thin film transistor comprising a substrate, at least one source, at least one drain, at least one gate, at least two source/drain transfer electrodes, an organic interface layer, at least one organic semiconductor layer, and at least one organic gate Extremely insulating layer. The source/drain transfer electrode is disposed on the substrate and has a plurality of conductive layers and is respectively connected to the source and the drain. The organic interface layer is disposed on the substrate and partially overlaps the source, drain, and source/drain transfer electrodes. The organic semiconductor layer is disposed on the substrate and covers the source and the drain. The organic gate insulating layer is disposed on the substrate and disposed between the gate and the organic semiconductor layer. The organic gate insulating layer partially overlaps the organic interface processing layer. The pixel structure includes the above organic thin film transistor.

Description

Organic thin film transistor and pixel structure

The present invention relates to a thin film transistor and a pixel structure, and more particularly to an organic thin film transistor and a pixel structure having an organic semiconductor layer.

At present, the organic semiconductor layer of the organic thin film transistor is often used to coat the source and the drain to prevent the source and the drain from being destroyed in the process and contaminating the device cavity. However, covering the organic semiconductor layer on the data line tends to cause additional parasitic capacitance, which causes the organic thin film transistor to have a problem of RC time delay. Therefore, there is a need for a means to solve the aforementioned problems.

The present invention provides an organic thin film transistor which can improve the problem of time delay of resistance and capacitance.

The present invention provides a pixel structure including the above-described organic thin film transistor, and which can have a large aperture ratio and improve the problem of time delay of resistance and capacitance.

An organic thin film transistor of the present invention, comprising a substrate, at least one source, At least one drain, at least one gate, at least two source/drain transfer electrodes, an organic interface layer, at least one organic semiconductor layer, and at least one organic gate insulating layer. The source, the drain and the gate are disposed on the substrate. The source/drain transfer electrode is disposed on the substrate and has a plurality of conductive layers. The source/drain transfer electrodes are connected to the source and the drain, respectively. The organic interface layer is disposed on the substrate and partially overlaps the source, drain, and source/drain transfer electrodes. The organic semiconductor layer is disposed on the substrate and covers the source and the drain. The organic gate insulating layer is disposed on the substrate and disposed between the gate and the organic semiconductor layer. The organic gate insulating layer partially overlaps the organic interface processing layer.

A pixel structure of the present invention includes an organic thin film transistor, a scan line, a data line, and a pixel electrode. The organic thin film transistor is disposed in the active device region. The organic semiconductor layer is only located in the active device region. The scan line is electrically connected to the gate. The data line is connected to the source, and the organic semiconductor layer is not located on the data line. The pixel electrode is electrically connected to one of the two source/drain transfer electrodes.

One of the objects of the present invention is to improve/reduce the problem of the time delay of the resistance and capacitance of the pixel structure.

One of the objects of the present invention is to increase the aperture ratio of the pixel structure.

One of the objects of the present invention is to reduce defects in the interface between the organic semiconductor layer and the organic interface layer.

The above described features and advantages of the invention will be apparent from the following description.

10, 10a‧‧‧ pixel structure

100, 100a‧‧‧Organic film transistor

110‧‧‧Substrate

120‧‧‧ source

122‧‧‧汲polar

124‧‧‧ gate

130, 132‧‧‧ source/drain transfer electrode

134A, 134B, 134C‧‧‧ first patterned conductive layer

136A, 136B, 136C‧‧‧ second patterned conductive layer

140‧‧‧Organic interface layer

142‧‧‧First contact hole

144‧‧‧second contact hole

146‧‧‧Contact hole

150‧‧‧Organic semiconductor layer

160‧‧‧Organic gate insulation

162‧‧‧First organic layer

164‧‧‧Second organic layer

170‧‧‧ scan line

180‧‧‧Information line

190‧‧‧ pixel electrodes

A‧‧‧Active component area

S1‧‧‧ first surface

S2‧‧‧ second surface

S3, S4‧‧‧ surface

P1, P2, P3, P4‧‧‧ side walls

F‧‧· overlap zone

1A is a top plan view of a pixel structure in accordance with an embodiment of the invention.

Fig. 1B is a schematic cross-sectional view taken along line A-A' of Fig. 1A.

Fig. 1C is a schematic cross-sectional view taken along line B-B' of the overlapping portion in Fig. 1A.

2A is a top plan view of a pixel structure in accordance with another embodiment of the present invention.

Fig. 2B is a schematic cross-sectional view taken along line C-C' of Fig. 2A.

The various embodiments of the present invention are disclosed in the drawings, and in the claims However, it should be understood that these practical details are not intended to limit the invention. That is, in some embodiments of the invention, these practical details are not necessary. In addition, some of the conventional structures and elements are shown in the drawings in a simplified manner.

In the drawings, the thickness of each element or the like is exaggerated for the sake of clarity. Throughout the specification, the same reference numerals denote the same elements. It will be understood that when an element such as a layer, film, region or substrate is referred to as "on another element," or "connected to another element," It may be connected to another element or an intermediate element may also be present. In contrast, when an element is referred to as “directly on” or “directly connected to” another element, As used herein, "connected" may refer to both physical and/or electrical connections. Furthermore, Electrical connections or couplings may result in the presence of other components between the two components.

It will be understood that the terms "first", "second", "third", etc., may be used herein to describe various elements, components, regions, layers and/or portions, but such elements, components, regions, and / Or part of it should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, Thus, "a first element", "a component", "a", "a", "a" or "a"

The terminology used herein is for the purpose of describing particular embodiments, As used herein, the singular forms "", "," “or” means “and/or”. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items. It is also to be understood that the terms "comprises" and / or "comprising", when used in the specification, are in the The presence or addition of other features, regions, steps, operations, components, components, and/or combinations thereof.

Further, relative terms such as "lower" or "bottom" and "upper" or "top" may be used herein to describe the relationship of one element to another, as shown. It will be understood that relative terms are intended to encompass different orientations of the device in addition to the orientation shown. For example, if the device in one figure is turned over, the elements that are described as "on" the other elements will be directed to the "on" side of the other elements. Thus, the exemplary term "lower" can be used in the <RTI ID=0.0> </ RTI> </ RTI> <RTIgt; similar Elements that are described as "under" or "beneath" other elements will be "on" or "above" the other elements. Thus, the exemplary term "lower" or "lower" can encompass both an upper and a lower orientation.

As used herein, "about," "substantially," or "approximate" includes the values and average values within acceptable ranges of the particular values determined by those of ordinary skill in the art, in view of the measurements and The specific amount of error associated with the measurement (ie, the limits of the measurement system) is measured. For example, "about" can mean within one or more standard deviations of the stated value, or within ±30%, ±20%, ±10%, ±5%. Furthermore, as used herein, "about", "approximately" or "substantially" may select a more acceptable range or standard deviation depending on optical properties, etching properties or other properties, and may apply all properties without a standard deviation. .

All terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs, unless otherwise defined. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having meanings consistent with their meaning in the context of the related art and the present invention, and will not be construed as idealized or excessive. Formal meaning, unless explicitly defined in this article.

1A is a top plan view of a pixel structure in accordance with an embodiment of the invention. Fig. 1B is a schematic cross-sectional view taken along line A-A' of Fig. 1. Fig. 1C is a schematic cross-sectional view taken along line B-B' of Fig. 1A.

Referring to FIG. 1A and FIG. 1B , the pixel structure 10 is disposed on the substrate 110 and includes at least one organic thin film transistor 100 , at least one scan line 170 , and at least A data line 180 and at least one pixel electrode 190. The organic thin film transistor 100 is disposed in the active device region A of the pixel structure 10. In some embodiments, the substrate 110 can be a rigid substrate such as, but not limited to, a glass substrate or a sapphire substrate, a flexible substrate, or other suitable substrate material (eg, quartz, opaque/reflective material ( For example: conductive materials, metals, wafers, ceramics, or other suitable materials), combinations of at least two of the foregoing, or other applicable materials). Preferably, the substrate 110 can be a flexible material, including, for example, Polyamide (PA) Polyimide (PI), Poly(methyl methacrylate), PMMA. ), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), fiber reinforced plastics (FRP), polyetheretherketone (polyetheretherketone) , PEEK), epoxy resin or other suitable material or a combination of at least two of the foregoing, but is not limited thereto. In addition, when the substrate 110 is a flexible material, the material may be all organic material mixture, organic material mixed inorganic material, organic molecular and inorganic molecular bonding materials, or other suitable materials.

In this embodiment, the organic thin film transistor 100 includes at least one source 120, at least one drain 122, at least one gate 124, at least one source/drain transfer electrode 130, and at least one source/drain The transfer electrode 132, the at least one organic interface layer 140, the at least one organic semiconductor layer 150, and the at least one organic gate insulating layer 160.

The data line 180 and the source/drain transfer electrodes 130 and 132 are disposed on the substrate 110. The source transfer electrode 130 is connected to the source 120, and the drain transfer electrode 132 is connected to Bungee 122.

In a preferred embodiment, the source/drain transfer electrodes 130, 132 can have multiple layers of conductive layers, for example including at least two conductive layers. In the present embodiment, the source/drain transfer electrode 130 includes a first patterned conductive layer 134A and a second patterned conductive layer 136A. The source/drain transfer electrode 132 can also have multiple layers of conductive layers, for example including at least two conductive layers. In the present embodiment, the source/drain via electrode 132 includes a first patterned conductive layer 134B and a second patterned conductive layer 136B. However, in other variant embodiments, the source/drain transfer electrodes 130, 132 may also have only a single layer. The first patterned conductive layer 134A and the first patterned conductive layer 134B are formed, for example, in the same patterning process. The second patterned conductive layer 136A and the second patterned conductive layer 136B are formed, for example, in the same patterning process. In some embodiments, a plurality of (for example, two layers) conductive materials are separately formed, and then a portion of the two conductive materials are removed in the same patterning process to form a first patterned conductive layer 134A and a first pattern. The conductive layer 134B, the second patterned conductive layer 136A, and the second patterned conductive layer 136B are formed, but are not limited thereto. In other embodiments, after removing a portion of the two conductive materials in different patterning processes, the first patterned conductive layer 134A, the first patterned conductive layer 134B, the second patterned conductive layer 136A, and the second layer are formed. The conductive layer 136B is patterned.

In this embodiment, for example, the first patterned conductive layer 134A may be located between the second patterned conductive layer 136A and the substrate 110, and the first patterned conductive layer 134B may be located at the second patterned conductive layer 136B and Between the substrates 110. Therefore, the first patterned conductive layer 134A and the first patterned conductive layer 134B are not in direct contact with the source. 120 and the drain 122, but the second patterned conductive layer 136A and the second patterned conductive layer 136B directly contact the source 120 and the drain 122, respectively, but are not limited thereto.

When the source/drain transfer electrodes 130, 132 are of a single layer structure, the material thereof may include, for example, an oxidation resistant material, for example, including a metal such as titanium, molybdenum, tungsten, gold, platinum, chromium, nickel, palladium, cobalt. At least one of, a composite layer of the above materials, or an alloy of the above materials) or a metal oxide material (eg, indium tin oxide, indium zinc oxide, fluorine-doped indium oxide) or a metal nitride conductive material (eg, nitride) Titanium or molybdenum nitride) or a combination of the above.

When the source/drain transfer electrodes 130, 132 are in a multi-layer (eg, two-layer) structure, the material of the first patterned conductive layer 134A, 134B is, for example, a conductive material that can include low resistance, for example, including gold, copper, Molybdenum, titanium, aluminum, or other suitable material, or an alloy of the foregoing, or a combination of at least two of the foregoing. The material of the second patterned conductive layer 136A, 136B is, for example, an anti-oxidation conductive material, for example, including a metal (for example, at least one of titanium, molybdenum, tungsten, gold, platinum, chromium, nickel, molybdenum, cobalt, the above materials) a composite layer or an alloy of the above materials) or a metal oxide material (such as indium tin oxide, indium zinc oxide, fluorine-doped indium oxide) or a metal nitride conductive material (such as titanium nitride or molybdenum nitride) or the like The combination. In some embodiments, the materials of the first patterned conductive layers 134A, 134B may be substantially the same or different, or the materials of the second patterned conductive layers 136A, 136B may be substantially the same or different. In some embodiments, the second patterned conductive layer 136A, 136B can reduce damage to the first patterned conductive layer 134A, 134B in subsequent patterning processes.

When the data line 180 is a single layer structure, its material may include, for example, antioxidant The material, and the anti-oxidation material may be selected from substantially the same or different materials as described above. Of course, the data line 180 can also include multiple layers of conductive layers, for example including at least two conductive layers. In the embodiment, the data line 180 includes a first patterned conductive layer 134C and a second patterned conductive layer 136C. However, in other variant embodiments, the data line 180 may also have only a single layer. The first patterned conductive layer 134C and the second patterned conductive layer 136C are respectively in the same film layer as the first patterned conductive layer 134A and the second patterned conductive layer 136A. For example, the first patterned conductive layer 134A can be Extending out the active device region A to form a first patterned conductive layer 134C, the second patterned conductive layer 136A may extend out of the active device region A to form a second patterned conductive layer 136C, and the first patterned conductive layer 134C and the second pattern The material of the conductive layer 136C is substantially the same as the first patterned conductive layer 134A and the second patterned conductive layer 136A, respectively, as described above. In some embodiments, the materials of the first patterned conductive layer 134C and the second patterned conductive layer 136C are different from the first patterned conductive layer 134A and the second patterned conductive layer 136A, respectively, and the materials thereof can be referred to the foregoing. .

In some embodiments, since the data line 180 includes a low resistance material (eg, a material of the first patterned conductive layer 134 ° C), the line width of the data line 180 can be made smaller, increasing the pixel structure 10 Opening ratio.

The organic interface layer 140 can be disposed on the substrate 110 and at least partially overlaps the source 120, the drain 122, and the source/drain transfer electrodes 130, 132. For example, the organic interface processing layer 140 can be disposed on the data line 180 and the source/drain transfer electrodes 130 and 132, and the organic interface processing layer 140 can cover the data line 180 and be connected to the source/drain The electrodes 130, 132 partially overlap. In some embodiments, some of The interface processing layer 140 may be located between the source transfer electrode 130 and the drain transfer electrode 132. The first surface S1 of the organic interface processing layer 140 may directly contact the substrate 110, but is not limited thereto. In this embodiment, the material of the organic interface treatment layer 140 may be, for example, an organic material containing a decane, an acrylic acid, or a combination thereof, but is not limited thereto.

In some embodiments, the organic interface processing layer 140 has a first contact hole 142, a second contact hole 144, and a contact hole 146. In some embodiments, the first contact hole 142, the second contact hole 144, and the contact hole 146 of the organic interface processing layer 140 are formed by a patterning process.

In some embodiments, the source 120 and the drain 122 may be disposed on the organic interface processing layer 140, and the source 120 and the drain 122 may respectively pass through the first contact hole 142 and the second contact hole 144 and the corresponding source. The pole/drain transfer electrodes 130, 132 are electrically connected, but are not limited thereto. The data line 180 can be electrically connected to the source 120 through the source/drain transfer electrode 130. In some embodiments, the organic interface processing layer 140 can be located between the source 120 and the substrate 110 and between the drain 122 and the substrate 110.

The method of forming the source 120 and the drain 122 includes, for example, forming a conductive layer (not shown), and then patterning the conductive layer (not shown) to form the source 120 and the drain 122 separated from each other. The source 120 and the drain 122 may be a single layer or a multilayer structure, and the material thereof may be selected from the foregoing conductive layers, but is not limited thereto.

In this embodiment, the source 120 can be filled into the first contact hole 142 and connected to the corresponding source/drain transfer electrode 130 (eg, the second patterned conductive layer 136A), and the drain 122 can be filled in. Two contact holes 144 and corresponding source/drain transfer electrodes 132 (eg, second patterned conductive layer 136B) is connected. In this embodiment, the material of the source 120 and the drain 122 may be, for example, a metal having a work function of 4.2 ev to 5.2 ev, and a metal having a work function of 4.2 ev to 5.2 ev is, for example, gold, silver, copper, Molybdenum, titanium, aluminum, or other suitable materials, or alloys of the foregoing, but not limited thereto.

The organic semiconductor layer 150 is disposed on the substrate 110, and the organic semiconductor layer 150 may cover the source 120 and the drain 122. For example, the organic semiconductor layer 150 may cover the sidewalls P1 and P2 of the source 120 and the surface S3 (or upper surface thereof) away from the substrate 110. The organic semiconductor layer 150 may also cover the sidewalls P3 and P4 of the gate 122. And the surface S4 (or upper surface) away from the substrate 110 to prevent the source 120 and the drain 122 from being damaged in the subsequent process and contaminating the device cavity. Viewed from another direction, the organic semiconductor layer 150 can be disposed on the source 120 and the drain 122. Preferably, the organic semiconductor layer 150 is located only in the active device region A and is not located on the data line 180, but is not limited thereto. In other embodiments, the organic semiconductor layer 150 may extend out of the active device region A, and the organic semiconductor layer 150 may partially overlap the data line 180, and partially overlap to not affect the reservation between the data line 180 and other components. The capacitance is a critical value. The organic semiconductor layer 150 may be a single layer or a multilayer structure, and its material includes pentacene, oligothiophene, phtalocyanine, carbon sixty or a derivative thereof, polyarylamine, poly Polyfluorene, polythiophene, or a derivative thereof, or other suitable material.

In this embodiment, the organic semiconductor layer 150 may further cover a portion of the organic interface processing layer 140, and the second surface S2 of the portion of the organic interface processing layer 140 directly contacts a portion of the organic semiconductor layer 150. In this embodiment, due to the organic interface processing layer The 140 is formed after the source/drain transfer electrodes 130, 132, so that the second surface S2 of the organic semiconductor layer 150 and the organic interface layer 140 (or referred to as a direct contact region) is not sputtered by the conductive layer ( The figure, not shown, before the source/drain transfer electrodes 130, 132 are unpatterned, causes surface defects at the interface of the organic semiconductor layer 150 and the organic interface layer 140.

The organic gate insulating layer 160 is disposed on the substrate 110, and the organic gate insulating layer 160 may be disposed between the organic semiconductor layer 150 and the gate 124, and the organic gate insulating layer 160 may overlap at least a portion of the organic interface processing layer 140. . In some embodiments, the organic gate insulating layer 160 may cover the organic semiconductor layer 150 and a portion of the organic interface processing layer 140. The organic gate insulating layer 160 may include a single layer or a multilayer structure, and when the organic gate insulating layer 160 has a multilayer structure, it may include, for example, a first organic layer 162 and a second organic layer 164. For example, the first organic layer 162 is located between the second organic layer 164 and the organic semiconductor layer 150, and the second organic layer 164 covers the first organic layer 162. The first organic layer 162 may overlap the organic semiconductor layer 150, and the first organic layer 162 may cover the organic semiconductor layer 150. Further, the second organic layer 164 may partially overlap the organic interface processing layer 140, and the second organic layer 164 may cover a portion of the organic interface processing layer 150. In some embodiments, the dielectric constant of the second organic layer 164 is preferably greater than the dielectric constant of the first organic layer 162. In a preferred embodiment, the first organic layer 162 and the organic semiconductor layer 150 may be formed by the same patterning process, for example, the pattern and the projection range of the first organic layer 162 and the organic semiconductor layer 150 perpendicularly projected on the substrate 110. Same as above, but not limited to this. In some embodiments, the first organic layer 162 and the organic semiconductor layer 150 may be formed by different patterning processes. The pattern and/or projection range of the first organic layer 162 and the organic semiconductor layer 150 perpendicularly projected on the substrate 110 are different.

The gate 124 may be disposed on the substrate 110. The scan line 170 is electrically connected to the gate 124. In the present embodiment, the gate 124 may extend out of the active device region A to form the scan line 170, but is not limited thereto. In other embodiments, the gate 124 may not extend out of the active device region A, and the scan line 170 may still be formed. The organic thin film transistor 100 may be partially overlapped with the scan line 170. The gate 124 may be, for example, over the organic semiconductor layer 150 to form a top gate thin film transistor, but the invention is not limited thereto. In other embodiments, the gate 124 may be located between the organic semiconductor layer 150 and the substrate 110 or under the organic semiconductor layer 150 to form a bottom gate transistor film, but the present invention does not This is limited to this.

The pixel electrode 190 is electrically connected to the drain electrode 122 through the source/drain transfer electrode 132. The pixel electrode 190 is filled in the contact hole 146 to be electrically connected to the drain transfer electrode 132. In the present embodiment, the organic interface processing layer 140 is located between the organic gate insulating layer 160 and the source/drain transfer electrode 132, and the contact hole 146 is located in the organic gate insulating layer 160 and the organic interface processing layer 140. However, the invention is not limited thereto. In other embodiments, at least a portion of the organic gate insulating layer 160 directly contacts the source/drain via electrode 132, and the contact hole 146 is only located in the organic gate insulating layer 160. In a variant embodiment, a protective layer (not shown) may be covered to cover the gate 124, and a protective layer (not shown) is located between the organic gate insulating layer 160 and the pixel electrode 190. The contact hole 146 may be located in the organic gate insulating layer 160 and the protective layer (not shown), or the contact hole 146 may be located in the organic gate insulating layer 160 and the organic interface processing layer 140 or In the organic gate insulating layer 160, the invention is not limited thereto. Referring to Fig. 1A and Fig. 1C, Fig. 1C is a cross-sectional view taken along line B-B' of the overlapping portion of Fig. 1A. In the present embodiment, the scan line 170 and the data line 180 have at least one overlap region F, and the organic semiconductor layer 150 is not located in the overlap region F of the scan line 170 and the data line 180, but is not limited thereto. In other embodiments, the organic semiconductor layer 150 may extend out of the active device region A, and the organic semiconductor layer 150 may partially overlap the overlap region F, and partially overlap to not affect the conductive layer of the overlap region F ( For example, the predetermined capacitance between scan line 170 and data line 180) and other components is a critical value. In this embodiment, the organic interface processing layer 140 and the second organic layer 164 may be disposed between the scan line 170 and the data line 180. In some embodiments, the parasitic capacitance between the scan line 170 and the data line 180 is reduced by adjusting the thickness of the organic interface processing layer 140 and/or the thickness of the second organic layer 164, thereby improving the resistance time delay of the resistor.

2A is a top plan view of a pixel structure in accordance with another embodiment of the present invention. Fig. 2B is a schematic cross-sectional view taken along line C-C' of Fig. 2A. It is to be noted that the following embodiments use the same reference numerals and parts in the foregoing embodiments, in which the same reference numerals are used to refer to the same or similar elements, and the description of the same technical content is omitted. For the description of the omitted portions, reference may be made to the foregoing embodiments, and the following embodiments are not repeated.

Referring to FIG. 1B and FIG. 2B simultaneously, the organic thin film transistor 100a of the present embodiment is similar to the organic thin film transistor 100 of FIG. 1A, but the main difference is that the second patterned conductive layer in FIG. 2B The area of 136A and the second patterned conductive layer 136B is larger than the second patterned conductive layer 136A of FIG. 1B and the second figure. The area of the conductive layer 136B is small.

In the organic thin film transistor 100a of the present embodiment, the second patterned conductive layer 136A of the source/drain transfer electrode 130 is disposed corresponding to the position of the first contact hole 142, and the area of the second patterned conductive layer 136A For example, it is only slightly larger than the bottom area of the first contact hole 142.

The second patterned conductive layer 136B of the source/drain transfer electrode 132 includes, for example, two separate portions respectively disposed corresponding to the positions of the second contact holes 144 and the contact holes 146, and the second patterned conductive layer 136B The area of the two separated portions is, for example, slightly larger than the bottom area of the second contact hole 144 and the bottom area of the contact hole 146, respectively, but is not limited thereto. In other embodiments, the bottom area of at least one of the first contact hole 142, the second contact hole 144, and the contact hole 146 may be substantially equal to the area of the corresponding conductive layer (eg, the second patterned conductive layer 136A) The area, the area of the two separated portions of the second patterned conductive layer 136B).

In the present embodiment, the data line 180 is composed of only a single layer structure, such as the first patterned conductive layer 134C, thereby reducing the cost of the material.

In summary, in some embodiments of the present invention, in an organic thin film transistor and a pixel structure, an organic thin film transistor can be connected to a data line and a pixel in a pixel structure through a source/drain transfer electrode. The electrode, and in some embodiments, the organic semiconductor layer may not be located in the overlap region of the scan line and the data line. Thereby, the aperture ratio of the pixel structure can be increased, and the problem of the time delay of the resistance and capacitance can be improved. In addition, in some embodiments of the present invention, since the source/drain transfer electrode can be disposed under the organic interface processing layer, the process of the organic thin film transistor of the present invention can be reduced. A defect in the interface between the organic interface layer and the organic semiconductor layer.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any one of ordinary skill in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of the invention is defined by the scope of the appended claims.

Claims (13)

An organic thin film transistor comprising: a substrate; at least one source, at least one drain and at least one gate disposed on the substrate; at least two source/drain transfer electrodes disposed on the substrate, and Each of the source/drain transfer electrodes has a plurality of conductive layers, wherein the at least two source/drain transfer electrodes are respectively connected to the at least one source and the at least one drain; an organic interface layer is disposed And at least partially overlapping the at least one source, the at least one drain, and the at least two source/drain transfer electrodes; at least one organic semiconductor layer disposed on the substrate, and the at least one organic The semiconductor layer covers the at least one source and the at least one drain; and the at least one organic gate insulating layer is disposed on the substrate, and the at least one organic gate insulating layer is disposed on the at least one gate and the at least Between an organic semiconductor layer, wherein the at least one organic gate insulating layer overlaps at least a portion of the organic interface processing layer. The organic thin film transistor according to claim 1, wherein the organic interface processing layer covers a portion of each of the source/drain transfer electrodes and a portion of the substrate. The organic thin film transistor according to claim 2, wherein the at least one source and the at least one drain are disposed on the organic interface treatment layer. The organic thin film transistor according to claim 3, wherein the plurality of conductive layers comprise a first patterned conductive layer and a second patterned conductive layer, and the organic interface layer has a first contact And the second contact hole, the at least one source and the at least one drain are respectively connected to the corresponding second patterned conductive layer via the first contact hole and the second contact hole. The organic thin film transistor according to claim 1, wherein each of the source/drain transfer electrodes comprises an anti-oxidation material. The organic thin film transistor according to claim 1, wherein the at least one organic semiconductor layer further covers a portion of the organic interface processing layer. The organic thin film transistor according to claim 1, wherein the at least one organic gate insulating layer covers the at least one organic semiconductor layer and a portion of the organic interface processing layer. The organic thin film transistor according to claim 7, wherein the at least one organic gate insulating layer comprises a first organic layer and a second organic layer, the first organic layer and the at least one organic semiconductor layer Overlap, the second organic layer covers the first organic layer and a portion of the organic interface processing layer, wherein the first organic layer is between the at least one organic semiconductor layer and the second organic layer. The organic thin film transistor according to claim 1, wherein the at least one gate is located above or below the at least one organic semiconductor layer. A pixel structure comprising: at least one organic thin film transistor disposed in an active device region, wherein the at least one organic thin film transistor is as described in any one of claims 1 to 9, and the at least one The organic semiconductor layer is located only in the active device region; a scan line electrically connected to the at least one gate; a data line connected to the at least one source, wherein the at least one organic semiconductor layer is not located on the data line; And a pixel electrode electrically connected to one of the at least two source/drain transfer electrodes. The pixel structure of claim 10, wherein the pixel electrode is connected to one of the at least two source/drain transfer electrodes via a contact hole. The pixel structure of claim 10, wherein the data line and each of the source/drain transfer electrodes respectively have corresponding multi-layer conductive layers, and the plurality of conductive layers comprise a first patterned conductive layer. And a second patterned conductive layer, wherein the data line is formed by the corresponding first patterned conductive layer and the corresponding second patterned conductive layer. The pixel structure of claim 10, wherein the plurality of conductive layers comprise a first patterned conductive layer and a second patterned conductive layer, the data lines are only corresponding to the first patterned conductive The layer is composed.