KR101907246B1 - Chuck structure for supporting a wafer - Google Patents
Chuck structure for supporting a wafer Download PDFInfo
- Publication number
- KR101907246B1 KR101907246B1 KR1020150073833A KR20150073833A KR101907246B1 KR 101907246 B1 KR101907246 B1 KR 101907246B1 KR 1020150073833 A KR1020150073833 A KR 1020150073833A KR 20150073833 A KR20150073833 A KR 20150073833A KR 101907246 B1 KR101907246 B1 KR 101907246B1
- Authority
- KR
- South Korea
- Prior art keywords
- chuck structure
- heater
- wafer
- refrigerant
- chuck
- Prior art date
Links
- 238000000034 method Methods 0.000 claims abstract description 20
- 239000000523 sample Substances 0.000 claims abstract description 17
- 238000007689 inspection Methods 0.000 claims abstract description 13
- 239000003507 refrigerant Substances 0.000 claims description 40
- 239000002826 coolant Substances 0.000 abstract description 13
- 235000012431 wafers Nutrition 0.000 description 29
- 238000002347 injection Methods 0.000 description 16
- 239000007924 injection Substances 0.000 description 16
- 239000004065 semiconductor Substances 0.000 description 10
- 238000009826 distribution Methods 0.000 description 5
- 238000001816 cooling Methods 0.000 description 4
- 238000007599 discharging Methods 0.000 description 2
- 230000014509 gene expression Effects 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000005192 partition Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
- H01L21/6833—Details of electrostatic chucks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
Description
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chuck structure for supporting a wafer, and more particularly, to a chuck structure for supporting a wafer using the probe card to check its electrical performance.
Generally, semiconductor chips are fabricated by depositing a film on a wafer, an etching process for forming the film into patterns having electrical properties, an ion implantation process or diffusion process for implanting or diffusing impurities into the patterns, And a cleaning and rinsing process for removing impurities from the substrate on which they are formed.
After the semiconductor chips are formed by performing the above-described processes, an inspection process for inspecting the electrical performance of the semiconductor chips is performed. The inspection process is carried out by placing a wafer on which the semiconductor chips are formed on a chuck and then bringing a probe card having a plurality of probes connected to the test device into contact with the semiconductor chips of the wafer placed on the chuck. This is disclosed in Korean Patent Registration No. 10-1444808 (filed on Apr. 19, 2014, chuck plate for semiconductor wafer probe and its manufacturing method).
In this inspection process, as the current progresses from the probe card to each of the semiconductor chips, heat of up to about 2000 W can be generated in the semiconductor chips. In the inspection process, a coolant at a temperature of about -80 캜 is flown to the chuck on which the wafer is placed to remove heat generated from the semiconductor chips.
However, since the refrigerant is injected from the lateral side of the chuck, the temperature deviation between the side portion and the central portion of the chuck is very severe, about 11.5 DEG C, so that there is a possibility that the electrical performance of the semiconductor chips formed from the wafer have.
SUMMARY OF THE INVENTION It is an object of the present invention to provide a chuck structure capable of uniformly cooling wafers divided into a plurality of chips, which are subjected to an inspection process, according to their positions in the course of the inspection process.
According to an aspect of the present invention, there is provided a chuck structure on which a wafer is divided into a plurality of chips, which is inspected by a probe card on an upper portion of the chuck structure, And a discharge port for discharging the refrigerant from the refrigerant passage at the upper end is provided at a lower central portion of the chuck structure at an inlet for injecting the refrigerant into the refrigerant passage at the lower end of the chuck structure, A heater is installed in an upper portion of a central portion of the upper refrigerant passage, a second heater is installed around the heater, and the inlet port may be formed to surround the outlet port.
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According to another aspect of the present invention, there is provided a chuck structure including a plurality of chips divided into a plurality of chips to be inspected by a probe card on an upper portion of the chuck structure, And a discharge port for discharging the refrigerant from the refrigerant passage at the lower end is provided at a lower central portion of the chuck structure at an inlet for injecting the refrigerant into the upper refrigerant passage A heater is installed in an upper portion of a central portion of the upper refrigerant channel, a second heater is embedded in the vicinity of the heater, and the outlet is formed to surround the inlet.
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According to embodiments of the present invention, the second heater may have a lower output than the heater.
According to the above-described embodiments of the present invention, the chuck structure on which the wafer is divided into a plurality of chips, which is subjected to the inspection process by the probe card, By incorporating a heater for raising the temperature at the injection port portion at a position facing the injection port, the temperature deviation between the region where the injection port is formed and the other region can be controlled very low.
Accordingly, it is possible to prevent an error in the inspection process of the chips according to the temperature deviation of the wafer mentioned in the background art of the invention by reducing the temperature deviation of the wafer placed on the chuck structure The reliability of the quality of the chips can be stably secured.
1 is a schematic view showing a cross section of a chuck structure according to an embodiment of the present invention.
FIGS. 2 and 3 are views showing embodiments in which refrigerant is injected or discharged along a refrigerant passage of the chuck structure shown in FIG. 1. FIG.
4 is a view illustrating a plurality of baffle portions of the chuck structure shown in FIG.
5 is a cross-sectional view specifically showing a portion where the baffle portion shown in FIG. 4 is formed.
FIG. 6 is a view showing a temperature distribution when the wafer placed on the chuck structure shown in FIG. 1 is heated to about 500 W and 1000 W, respectively.
Hereinafter, a chuck structure for supporting a wafer according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings. The present invention is capable of various modifications and various forms, and specific embodiments are illustrated in the drawings and described in detail in the text. It should be understood, however, that the invention is not intended to be limited to the particular forms disclosed, but includes all modifications, equivalents, and alternatives falling within the spirit and scope of the invention. Like reference numerals are used for like elements in describing each drawing. In the accompanying drawings, the dimensions of the structures are enlarged to illustrate the present invention in order to clarify the present invention.
The terms first, second, etc. may be used to describe various components, but the components should not be limited by the terms. The terms are used only for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be referred to as a second component, and similarly, the second component may also be referred to as a first component.
The terminology used in this application is used only to describe a specific embodiment and is not intended to limit the invention. The singular expressions include plural expressions unless the context clearly dictates otherwise. In this application, the terms "comprises", "having", and the like are used to specify that a feature, a number, a step, an operation, an element, a part or a combination thereof is described in the specification, But do not preclude the presence or addition of one or more other features, integers, steps, operations, components, parts, or combinations thereof.
On the other hand, unless otherwise defined, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Terms such as those defined in commonly used dictionaries are to be interpreted as having a meaning consistent with the contextual meaning of the related art and are to be interpreted as either ideal or overly formal in the sense of the present application Do not.
FIG. 1 is a schematic view showing a cross section of a chuck structure according to an embodiment of the present invention. FIGS. 2 and 3 illustrate embodiments in which a coolant is injected or discharged along a coolant channel of the chuck structure shown in FIG. 1 Respectively.
Referring to FIGS. 1 to 3, a
Here, the inspection process is a process for checking electrical performance of a plurality of chips (not shown) formed on the
A
The
The
The
The
As described above, the chuck structure (100) on which the wafer (10) divided by the plurality of chips, which is inspected by the probe card, is placed on the upper part, the coolant (20) is injected through the injection port The temperature difference between the portion where the
Thus, by reducing the temperature deviation of the
Hereinafter, a structure for further reducing the temperature variation depending on the position of the
FIG. 4 is a view showing a plurality of baffle portions of the chuck structure shown in FIG. 1, and FIG. 5 is a view specifically showing a cross section at a portion where the baffle portion shown in FIG. 4 is formed.
Referring to FIGS. 4 and 5, the
The
4, the
The
Accordingly, when the
While the present invention has been described in connection with what is presently considered to be practical and exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.
10: wafer 20: refrigerant
100: Chuck structure 200: Refrigerant channel
210: inlet 220: outlet
300: heater 400: second heater
500: baffle portion
Claims (8)
The chuck structure is provided with an upper and a lower two-stage refrigerant passage connected to an inner edge of the chuck structure. A lower central portion of the chuck structure is provided with an inlet for injecting refrigerant into the lower refrigerant passage, Wherein a heater is installed in an upper portion of a central portion of the upper refrigerant channel and a second heater is installed around the heater and the inlet is formed to surround the outlet. structure.
The chuck structure is provided with an upper and a lower two-stage refrigerant flow path connected to the inside of the chuck structure. A lower central portion of the chuck structure is provided with an inlet for injecting the refrigerant into the upper refrigerant passage, Wherein a heater is installed in an upper portion of a center portion of the upper refrigerant channel and a second heater is installed around the heater and the outlet is formed to surround the inlet. structure.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020150073833A KR101907246B1 (en) | 2015-05-27 | 2015-05-27 | Chuck structure for supporting a wafer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020150073833A KR101907246B1 (en) | 2015-05-27 | 2015-05-27 | Chuck structure for supporting a wafer |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20160139259A KR20160139259A (en) | 2016-12-07 |
KR101907246B1 true KR101907246B1 (en) | 2018-12-07 |
Family
ID=57573527
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020150073833A KR101907246B1 (en) | 2015-05-27 | 2015-05-27 | Chuck structure for supporting a wafer |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR101907246B1 (en) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6349228B2 (en) * | 2014-10-22 | 2018-06-27 | 新光電気工業株式会社 | Electrostatic chuck and base member used for the electrostatic chuck |
KR102622092B1 (en) * | 2018-11-02 | 2024-01-09 | 세메스 주식회사 | Method of controlling a temperature of a wafer supporting module |
CN111324021A (en) * | 2018-12-13 | 2020-06-23 | 夏泰鑫半导体(青岛)有限公司 | Photoresist stripping equipment and wafer processing method |
KR102678795B1 (en) * | 2021-11-16 | 2024-06-26 | 한국생산기술연구원 | Lower chuck of wafer prober having radial flow path and lattice structure, and method for manufacturing the same |
KR102716208B1 (en) * | 2022-05-19 | 2024-10-15 | 뉴브이테크 주식회사 | Chuck for wafer and method for manufacturing the same |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001160479A (en) * | 1999-12-01 | 2001-06-12 | Tokyo Electron Ltd | Ceramic heating resistor and board processing device using the same |
KR100676203B1 (en) * | 2005-06-21 | 2007-01-30 | 삼성전자주식회사 | Cooling apparatus of electrostatic chuck for semiconductor equipment |
JP2008187063A (en) * | 2007-01-31 | 2008-08-14 | Hitachi High-Technologies Corp | Plasma processing equipment |
JP2011520288A (en) * | 2008-05-05 | 2011-07-14 | アプライド マテリアルズ インコーポレイテッド | Plasma reactor electrostatic chuck with multi-zone AC heater power transfer through coaxial RF feed and coaxial feed |
JP2014209536A (en) * | 2013-03-25 | 2014-11-06 | 東京エレクトロン株式会社 | Substrate inspection device and substrate temperature adjustment method |
-
2015
- 2015-05-27 KR KR1020150073833A patent/KR101907246B1/en active IP Right Grant
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001160479A (en) * | 1999-12-01 | 2001-06-12 | Tokyo Electron Ltd | Ceramic heating resistor and board processing device using the same |
KR100676203B1 (en) * | 2005-06-21 | 2007-01-30 | 삼성전자주식회사 | Cooling apparatus of electrostatic chuck for semiconductor equipment |
JP2008187063A (en) * | 2007-01-31 | 2008-08-14 | Hitachi High-Technologies Corp | Plasma processing equipment |
JP2011520288A (en) * | 2008-05-05 | 2011-07-14 | アプライド マテリアルズ インコーポレイテッド | Plasma reactor electrostatic chuck with multi-zone AC heater power transfer through coaxial RF feed and coaxial feed |
JP2014209536A (en) * | 2013-03-25 | 2014-11-06 | 東京エレクトロン株式会社 | Substrate inspection device and substrate temperature adjustment method |
Also Published As
Publication number | Publication date |
---|---|
KR20160139259A (en) | 2016-12-07 |
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