KR101904409B1 - 적층된 마이크로전자 유닛이 있는 마이크로전자 패키지 및 그의 제조 방법 - Google Patents
적층된 마이크로전자 유닛이 있는 마이크로전자 패키지 및 그의 제조 방법 Download PDFInfo
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- KR101904409B1 KR101904409B1 KR1020147013310A KR20147013310A KR101904409B1 KR 101904409 B1 KR101904409 B1 KR 101904409B1 KR 1020147013310 A KR1020147013310 A KR 1020147013310A KR 20147013310 A KR20147013310 A KR 20147013310A KR 101904409 B1 KR101904409 B1 KR 101904409B1
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- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/131—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
- H10W74/142—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed the encapsulations exposing the passive side of the semiconductor body
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/40—Encapsulations, e.g. protective coatings characterised by their materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/20—Configurations of stacked chips
- H10W90/24—Configurations of stacked chips at least one of the stacked chips being laterally offset from a neighbouring stacked chip, e.g. chip stacks having a staircase shape
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/20—Configurations of stacked chips
- H10W90/284—Configurations of stacked chips characterised by structural arrangements for measuring or testing
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/20—Configurations of stacked chips
- H10W90/291—Configurations of stacked chips characterised by containers, encapsulations, or other housings for the stacked chips
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/732—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/752—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between stacked chips
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Engineering & Computer Science (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Integrated Circuits (AREA)
- Microelectronics & Electronic Packaging (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/277,330 | 2011-10-20 | ||
| US13/277,330 US8723327B2 (en) | 2011-10-20 | 2011-10-20 | Microelectronic package with stacked microelectronic units and method for manufacture thereof |
| PCT/US2012/060585 WO2013059297A1 (en) | 2011-10-20 | 2012-10-17 | Microelectronic package with stacked microelectronic units and method for manufacture thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20140085520A KR20140085520A (ko) | 2014-07-07 |
| KR101904409B1 true KR101904409B1 (ko) | 2018-10-05 |
Family
ID=47215738
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020147013310A Active KR101904409B1 (ko) | 2011-10-20 | 2012-10-17 | 적층된 마이크로전자 유닛이 있는 마이크로전자 패키지 및 그의 제조 방법 |
Country Status (6)
| Country | Link |
|---|---|
| US (4) | US8723327B2 (https=) |
| EP (1) | EP2769412B1 (https=) |
| JP (1) | JP6061937B2 (https=) |
| KR (1) | KR101904409B1 (https=) |
| TW (1) | TWI463635B (https=) |
| WO (1) | WO2013059297A1 (https=) |
Families Citing this family (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8553420B2 (en) | 2010-10-19 | 2013-10-08 | Tessera, Inc. | Enhanced stacked microelectronic assemblies with central contacts and improved thermal characteristics |
| US8970028B2 (en) | 2011-12-29 | 2015-03-03 | Invensas Corporation | Embedded heat spreader for package with multiple microelectronic elements and face-down connection |
| US9013033B2 (en) | 2011-04-21 | 2015-04-21 | Tessera, Inc. | Multiple die face-down stacking for two or more die |
| US8928153B2 (en) | 2011-04-21 | 2015-01-06 | Tessera, Inc. | Flip-chip, face-up and face-down centerbond memory wirebond assemblies |
| US8952516B2 (en) | 2011-04-21 | 2015-02-10 | Tessera, Inc. | Multiple die stacking for two or more die |
| US8304881B1 (en) | 2011-04-21 | 2012-11-06 | Tessera, Inc. | Flip-chip, face-up and face-down wirebond combination package |
| US8633576B2 (en) | 2011-04-21 | 2014-01-21 | Tessera, Inc. | Stacked chip-on-board module with edge connector |
| US8723327B2 (en) | 2011-10-20 | 2014-05-13 | Invensas Corporation | Microelectronic package with stacked microelectronic units and method for manufacture thereof |
| US8709868B2 (en) * | 2012-08-23 | 2014-04-29 | Freescale Semiconductor, Inc. | Sensor packages and method of packaging dies of differing sizes |
| US9401338B2 (en) * | 2012-11-29 | 2016-07-26 | Freescale Semiconductor, Inc. | Electronic devices with embedded die interconnect structures, and methods of manufacture thereof |
| US9472533B2 (en) * | 2013-11-20 | 2016-10-18 | STATS ChipPAC Pte. Ltd. | Semiconductor device and method of forming wire bondable fan-out EWLB package |
| TWI649856B (zh) * | 2016-05-13 | 2019-02-01 | Xintec Inc. | 晶片封裝體與其製造方法 |
| CN112117242B (zh) * | 2019-06-20 | 2023-01-31 | 江苏长电科技股份有限公司 | 芯片封装结构及其制造方法 |
| KR102699633B1 (ko) * | 2019-06-25 | 2024-08-29 | 삼성전자주식회사 | 반도체 장치 및 그 제조 방법 |
| US11134575B2 (en) * | 2019-09-30 | 2021-09-28 | Gentherm Gmbh | Dual conductor laminated substrate |
Citations (2)
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| JP2005353837A (ja) | 2004-06-10 | 2005-12-22 | Shinko Electric Ind Co Ltd | 半導体装置及びその製造方法 |
| US20070252256A1 (en) | 2006-04-26 | 2007-11-01 | Gwang-Man Lim | Package-on-package structures |
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| US5422435A (en) | 1992-05-22 | 1995-06-06 | National Semiconductor Corporation | Stacked multi-chip modules and method of manufacturing |
| US5998864A (en) | 1995-05-26 | 1999-12-07 | Formfactor, Inc. | Stacking semiconductor devices, particularly memory chips |
| JP3644662B2 (ja) * | 1997-10-29 | 2005-05-11 | 株式会社ルネサステクノロジ | 半導体モジュール |
| JP3481444B2 (ja) | 1998-01-14 | 2003-12-22 | シャープ株式会社 | 半導体装置及びその製造方法 |
| DE10023823A1 (de) | 2000-05-15 | 2001-12-06 | Infineon Technologies Ag | Multichip-Gehäuse |
| US6885106B1 (en) | 2001-01-11 | 2005-04-26 | Tessera, Inc. | Stacked microelectronic assemblies and methods of making same |
| US7045887B2 (en) | 2002-10-08 | 2006-05-16 | Chippac, Inc. | Semiconductor multi-package module having inverted second package stacked over die-up flip-chip ball grid array (BGA) package |
| DE102005006333B4 (de) | 2005-02-10 | 2007-10-18 | Infineon Technologies Ag | Halbleiterbauteil mit mehreren Bondanschlüssen und gebondeten Kontaktelementen unterschiedlicher Metallzusammensetzung und Verfahren zur Herstellung desselben |
| US20060202317A1 (en) | 2005-03-14 | 2006-09-14 | Farid Barakat | Method for MCP packaging for balanced performance |
| US7402911B2 (en) | 2005-06-28 | 2008-07-22 | Infineon Technologies Ag | Multi-chip device and method for producing a multi-chip device |
| TWI263313B (en) * | 2005-08-15 | 2006-10-01 | Phoenix Prec Technology Corp | Stack structure of semiconductor component embedded in supporting board |
| KR100681263B1 (ko) | 2006-01-17 | 2007-02-09 | 삼성전자주식회사 | 반도체 패키지 |
| US8384199B2 (en) * | 2007-06-25 | 2013-02-26 | Epic Technologies, Inc. | Integrated conductive structures and fabrication methods thereof facilitating implementing a cell phone or other electronic system |
| US20090001529A1 (en) * | 2007-06-27 | 2009-01-01 | Ming Hsun Lee | Package stacking using unbalanced molded tsop |
| US8299626B2 (en) | 2007-08-16 | 2012-10-30 | Tessera, Inc. | Microelectronic package |
| KR20090055316A (ko) * | 2007-11-28 | 2009-06-02 | 삼성전자주식회사 | 반도체 패키지와, 이를 구비하는 전자 기기 및 반도체패키지의 제조방법 |
| US8531043B2 (en) * | 2008-09-23 | 2013-09-10 | Stats Chippac Ltd. | Planar encapsulation and mold cavity package in package system |
| US8026589B1 (en) * | 2009-02-23 | 2011-09-27 | Amkor Technology, Inc. | Reduced profile stackable semiconductor package |
| US8169065B2 (en) * | 2009-12-22 | 2012-05-01 | Epic Technologies, Inc. | Stackable circuit structures and methods of fabrication thereof |
| US8487421B2 (en) | 2011-08-01 | 2013-07-16 | Tessera, Inc. | Microelectronic package with stacked microelectronic elements and method for manufacture thereof |
| US8723327B2 (en) * | 2011-10-20 | 2014-05-13 | Invensas Corporation | Microelectronic package with stacked microelectronic units and method for manufacture thereof |
-
2011
- 2011-10-20 US US13/277,330 patent/US8723327B2/en active Active
-
2012
- 2012-10-17 EP EP12788344.5A patent/EP2769412B1/en active Active
- 2012-10-17 KR KR1020147013310A patent/KR101904409B1/ko active Active
- 2012-10-17 JP JP2014537171A patent/JP6061937B2/ja active Active
- 2012-10-17 WO PCT/US2012/060585 patent/WO2013059297A1/en not_active Ceased
- 2012-10-19 TW TW101138771A patent/TWI463635B/zh active
-
2014
- 2014-04-03 US US14/243,994 patent/US9165911B2/en active Active
-
2015
- 2015-10-15 US US14/883,977 patent/US9583475B2/en active Active
-
2017
- 2017-01-30 US US15/419,237 patent/US9876002B2/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005353837A (ja) | 2004-06-10 | 2005-12-22 | Shinko Electric Ind Co Ltd | 半導体装置及びその製造方法 |
| US20070252256A1 (en) | 2006-04-26 | 2007-11-01 | Gwang-Man Lim | Package-on-package structures |
Also Published As
| Publication number | Publication date |
|---|---|
| US20130099387A1 (en) | 2013-04-25 |
| EP2769412B1 (en) | 2019-02-20 |
| US8723327B2 (en) | 2014-05-13 |
| JP2014531134A (ja) | 2014-11-20 |
| US9165911B2 (en) | 2015-10-20 |
| WO2013059297A1 (en) | 2013-04-25 |
| TW201322419A (zh) | 2013-06-01 |
| JP6061937B2 (ja) | 2017-01-18 |
| US9876002B2 (en) | 2018-01-23 |
| US20160035712A1 (en) | 2016-02-04 |
| US9583475B2 (en) | 2017-02-28 |
| US20140212996A1 (en) | 2014-07-31 |
| TWI463635B (zh) | 2014-12-01 |
| EP2769412A1 (en) | 2014-08-27 |
| KR20140085520A (ko) | 2014-07-07 |
| US20170141094A1 (en) | 2017-05-18 |
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