KR101895178B1 - Semiconductor device manufacturing method - Google Patents
Semiconductor device manufacturing method Download PDFInfo
- Publication number
- KR101895178B1 KR101895178B1 KR1020177002261A KR20177002261A KR101895178B1 KR 101895178 B1 KR101895178 B1 KR 101895178B1 KR 1020177002261 A KR1020177002261 A KR 1020177002261A KR 20177002261 A KR20177002261 A KR 20177002261A KR 101895178 B1 KR101895178 B1 KR 101895178B1
- Authority
- KR
- South Korea
- Prior art keywords
- film
- concave portion
- back surface
- substrate
- semiconductor device
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims description 30
- 238000004519 manufacturing process Methods 0.000 title description 26
- 239000000758 substrate Substances 0.000 claims abstract description 33
- 229910052751 metal Inorganic materials 0.000 claims abstract description 29
- 239000002184 metal Substances 0.000 claims abstract description 29
- 229910018125 Al-Si Inorganic materials 0.000 claims abstract description 26
- 229910018520 Al—Si Inorganic materials 0.000 claims abstract description 26
- 230000001681 protective effect Effects 0.000 claims abstract description 21
- 239000012535 impurity Substances 0.000 claims abstract description 8
- 238000005224 laser annealing Methods 0.000 claims description 8
- 229910021332 silicide Inorganic materials 0.000 claims description 8
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims description 8
- 238000000034 method Methods 0.000 claims description 6
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 5
- 229920005591 polysilicon Polymers 0.000 claims description 5
- 229910001392 phosphorus oxide Inorganic materials 0.000 claims description 3
- VSAISIQCTGDGPU-UHFFFAOYSA-N tetraphosphorus hexaoxide Chemical compound O1P(O2)OP3OP1OP2O3 VSAISIQCTGDGPU-UHFFFAOYSA-N 0.000 claims description 3
- 239000000075 oxide glass Substances 0.000 claims description 2
- 230000000694 effects Effects 0.000 abstract description 8
- 230000000052 comparative effect Effects 0.000 abstract description 5
- 230000015556 catabolic process Effects 0.000 description 6
- 238000009792 diffusion process Methods 0.000 description 5
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 239000010941 cobalt Substances 0.000 description 2
- 229910017052 cobalt Inorganic materials 0.000 description 2
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 238000000992 sputter etching Methods 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- YXTPWUNVHCYOSP-UHFFFAOYSA-N bis($l^{2}-silanylidene)molybdenum Chemical compound [Si]=[Mo]=[Si] YXTPWUNVHCYOSP-UHFFFAOYSA-N 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 229910021344 molybdenum silicide Inorganic materials 0.000 description 1
- LFGREXWGYUGZLY-UHFFFAOYSA-N phosphoryl Chemical compound [P]=O LFGREXWGYUGZLY-UHFFFAOYSA-N 0.000 description 1
- 230000003252 repetitive effect Effects 0.000 description 1
- 229910021341 titanium silicide Inorganic materials 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- WQJQOUPTWCFRMM-UHFFFAOYSA-N tungsten disilicide Chemical compound [Si]#[W]#[Si] WQJQOUPTWCFRMM-UHFFFAOYSA-N 0.000 description 1
- 229910021342 tungsten silicide Inorganic materials 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02142—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides
- H01L21/02145—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides the material containing aluminium, e.g. AlSiOx
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
- H01L21/02178—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing aluminium, e.g. Al2O3
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
- H01L21/2251—Diffusion into or out of group IV semiconductors
- H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
- H01L21/28044—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
- H01L21/28061—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a metal or metal silicide formed by deposition, e.g. sputter deposition, i.e. without a silicidation reaction
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/32051—Deposition of metallic or metal-silicide layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/7806—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
- H01L29/456—Ohmic electrodes on silicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- High Energy & Nuclear Physics (AREA)
- Ceramic Engineering (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Electromagnetism (AREA)
- Optics & Photonics (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Chemical & Material Sciences (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Si 기판(1)의 이면에 n형 불순물을 주입하여 n형층(3)을 형성한다. Si 기판(1)의 이면에는 오목부(4)가 형성되어 있다. n형층(3)을 형성한 후에 이면 위와 오목부(4) 내에 산화막(5)을 형성한다. 오목부(4) 내의 보호막을 남기면서 이면 위의 산화막(5)을 제거한다. 산화막(5)을 제거한 후에 이면 위에 Al-Si막(6)을 형성한다. Al-Si막(6) 위에 금속 전극(7)을 형성한다. 계속하여, 본 실시의 형태의 효과를 비교예와 비교하여 설명한다. 오목부(4) 내의 산화막(5)은, Al-Si막(6)으로부터 오목부(4)를 통해서 Si 기판(1)으로 Al이 확산되는 것을 막는다.An n-type impurity is implanted into the back surface of the Si substrate 1 to form an n-type layer 3. On the back surface of the Si substrate 1, a concave portion 4 is formed. After the n-type layer 3 is formed, an oxide film 5 is formed on the back surface and in the concave portion 4. The oxide film 5 on the back surface is removed while leaving the protective film in the concave portion 4. After the oxide film 5 is removed, an Al-Si film 6 is formed on the back surface. A metal electrode 7 is formed on the Al-Si film 6. Subsequently, the effects of the present embodiment will be described in comparison with comparative examples. The oxide film 5 in the concave portion 4 prevents Al from diffusing from the Al-Si film 6 to the Si substrate 1 through the concave portion 4.
Description
본 발명은, Si 기판의 이면에 금속 전극을 형성하는 반도체 장치의 제조 방법에 관한 것이다.The present invention relates to a method of manufacturing a semiconductor device in which a metal electrode is formed on the back surface of a Si substrate.
큰 전류를 구동시키기 위한 전력용 반도체 장치에 있어서 Si 기판의 이면에 금속 전극을 형성한다(예컨대, 특허 문헌 1 참조). Si 기판과 금속 전극의 박리를 억제하기 위해 양쪽의 사이에 Al-Si막을 형성한다.A metal electrode is formed on the back surface of a Si substrate in a power semiconductor device for driving a large current (for example, see Patent Document 1). An Al-Si film is formed between the Si substrate and the metal electrode in order to suppress the peeling of the Si substrate and the metal electrode.
(선행 기술 문헌)(Prior art document)
(특허 문헌)(Patent Literature)
(특허 문헌 1) 일본 특허 공개 2006-074024호 공보(Patent Document 1) Japanese Unexamined Patent Application Publication No. 2006-074024
웨이퍼 제조시의 기계적 스트레스에 의해 Si 기판의 이면에 오목부가 형성된다. 이 오목부를 통해서 Al-Si막으로부터 Si 기판으로 Al이 확산되어 p형층이 형성된다. 이 p형층에 공핍층이 도달하기 때문에, 리크 전류가 발생하고, 디바이스의 내압이 열화한다고 하는 문제가 있었다.A concave portion is formed on the back surface of the Si substrate due to mechanical stress during wafer production. Al is diffused from the Al-Si film to the Si substrate through this concave portion to form a p-type layer. A depletion layer reaches the p-type layer, so that a leakage current is generated and the internal pressure of the device is deteriorated.
본 발명은, 상술한 바와 같은 과제를 해결하기 위해 이루어진 것으로, 그 목적은 Si 기판의 이면에 오목부가 존재하더라도 리크 전류와 내압 열화를 억제할 수 있는 반도체 장치의 제조 방법을 얻는 것이다.SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to obtain a semiconductor device manufacturing method capable of suppressing leakage current and breakdown voltage breakdown even if a concave portion exists on the back surface of the Si substrate.
본 발명과 관련되는 반도체 장치는, 오목부가 형성된 이면을 갖는 Si 기판의 상기 이면에 n형 불순물을 주입하여 n형층을 형성하는 공정과, 상기 n형층을 형성한 후에 상기 이면 위와 상기 오목부 내에 보호막을 형성하는 공정과, 상기 오목부 내의 상기 보호막을 남기면서 상기 이면 위의 상기 보호막을 제거하는 공정과, 상기 보호막을 제거한 후에 상기 이면 위에 Al-Si막을 형성하는 공정과, 상기 Al-Si막 위에 금속 전극을 형성하는 공정을 구비하고, 상기 오목부 내의 상기 보호막은, 상기 Al-Si막으로부터 상기 오목부를 통해서 상기 Si 기판으로 Al이 확산되는 것을 막는 것을 특징으로 한다.A semiconductor device according to the present invention includes the steps of forming an n-type layer by implanting n-type impurity into the back surface of an Si substrate having a back surface with a concave portion formed thereon, and forming a protective film Removing the protective film on the back surface while leaving the protective film in the concave portion; forming an Al-Si film on the back surface after removing the protective film; Wherein the protective film in the recess prevents diffusion of Al from the Al-Si film to the Si substrate through the recessed portion.
본 발명에서는, 오목부 내의 보호막이 Al-Si막으로부터 오목부를 통해서 Si 기판으로 Al이 확산되는 것을 막는다. 따라서, Si 기판의 이면에 오목부가 존재하더라도 리크 전류와 내압 열화를 억제할 수 있다.In the present invention, the protective film in the concave portion prevents Al from diffusing from the Al-Si film to the Si substrate through the concave portion. Therefore, even when the concave portion exists on the back surface of the Si substrate, the leakage current and the breakdown voltage can be suppressed.
도 1은 본 발명의 실시의 형태 1과 관련되는 반도체 장치의 제조 방법을 나타내는 단면도이다.
도 2는 본 발명의 실시의 형태 1과 관련되는 반도체 장치의 제조 방법을 나타내는 단면도이다.
도 3은 본 발명의 실시의 형태 1과 관련되는 반도체 장치의 제조 방법을 나타내는 단면도이다.
도 4는 본 발명의 실시의 형태 1과 관련되는 반도체 장치의 제조 방법을 나타내는 단면도이다.
도 5는 비교예와 관련되는 반도체 장치의 제조 방법을 나타내는 단면도이다.
도 6은 본 발명의 실시의 형태 2와 관련되는 반도체 장치의 제조 방법을 나타내는 단면도이다.
도 7은 본 발명의 실시의 형태 3과 관련되는 반도체 장치의 제조 방법을 나타내는 단면도이다.
도 8은 본 발명의 실시의 형태 4와 관련되는 반도체 장치의 제조 방법을 나타내는 단면도이다.
도 9는 본 발명의 실시의 형태 5와 관련되는 반도체 장치의 제조 방법을 나타내는 단면도이다.
도 10은 본 발명의 실시의 형태 6과 관련되는 반도체 장치의 제조 방법을 나타내는 단면도이다.
도 11은 본 발명의 실시의 형태 6과 관련되는 반도체 장치의 제조 방법을 나타내는 단면도이다.
도 12는 본 발명의 실시의 형태 6과 관련되는 반도체 장치의 제조 방법의 변형예를 나타내는 단면도이다.1 is a cross-sectional view showing a method of manufacturing a semiconductor device according to a first embodiment of the present invention.
2 is a cross-sectional view showing a method of manufacturing a semiconductor device according to
3 is a cross-sectional view showing a manufacturing method of a semiconductor device according to
4 is a cross-sectional view showing a manufacturing method of a semiconductor device according to
5 is a cross-sectional view showing a manufacturing method of a semiconductor device according to a comparative example.
6 is a cross-sectional view showing a manufacturing method of a semiconductor device according to a second embodiment of the present invention.
7 is a cross-sectional view showing a method of manufacturing a semiconductor device according to a third embodiment of the present invention.
8 is a cross-sectional view showing a method of manufacturing a semiconductor device according to
9 is a cross-sectional view showing a manufacturing method of a semiconductor device according to
10 is a cross-sectional view showing a manufacturing method of a semiconductor device according to a sixth embodiment of the present invention.
11 is a cross-sectional view showing a manufacturing method of a semiconductor device according to a sixth embodiment of the present invention.
12 is a cross-sectional view showing a modification of the semiconductor device manufacturing method according to the sixth embodiment of the present invention.
본 발명의 실시의 형태와 관련되는 반도체 장치의 제조 방법에 대하여 도면을 참조하여 설명한다. 동일한 또는 대응하는 구성 요소에는 동일한 부호를 붙이고, 설명의 반복을 생략하는 경우가 있다.A method of manufacturing a semiconductor device according to an embodiment of the present invention will be described with reference to the drawings. The same or corresponding components are denoted by the same reference numerals and repetitive descriptions may be omitted.
실시의 형태 1.
본 발명의 실시의 형태 1과 관련되는 반도체 장치의 제조 방법에 대하여 도면을 참조하면서 설명한다. 도 1~4는 본 발명의 실시의 형태 1과 관련되는 반도체 장치의 제조 방법을 나타내는 단면도이다.A semiconductor device manufacturing method according to a first embodiment of the present invention will be described with reference to the drawings. 1 to 4 are cross-sectional views showing a manufacturing method of a semiconductor device according to a first embodiment of the present invention.
우선, 도 1에 나타내는 바와 같이, n-형의 Si 기판(1)의 표면에 p형 불순물을 주입하여 p형층(2)을 형성하고, 이면에 n형 불순물을 주입하여 n형층(3)을 형성한다. Si 기판(1)의 이면에는 오목부(4)(흠)가 형성되어 있다. 다음으로, 도 2에 나타내는 바와 같이, 이면 위와 오목부(4) 내에 산화막(5)을 형성한다. 다음으로, 도 3에 나타내는 바와 같이, 스퍼터 에칭에 의해 오목부(4) 내의 산화막(5)을 남기면서 이면 위의 산화막(5)을 제거한다. 여기서, 산화막(5)은 적어도 오목부(4)의 최심부에 남아 있을 필요가 있다. 다음으로, 도 4에 나타내는 바와 같이, 이면 위에 Al-Si막(6)을 형성한다. 다음으로, Al-Si막(6) 위에 금속 전극(7)을 형성한다. 또, 금속 전극(7)은 다층 전극이다.1, a p-type impurity is implanted into the surface of an n-
계속하여, 본 실시의 형태의 효과를 비교예와 비교하여 설명한다. 도 5는 비교예와 관련되는 반도체 장치의 제조 방법을 나타내는 단면도이다. 비교예에서는 오목부(4)의 최심부에 있어서 Si 기판(1)에 직접 Al-Si막(6)이 접한다. 이 때문에, 디바이스에 역방향의 전압을 인가했을 때에 Al-Si막(6)으로부터 오목부(4)를 통해서 Si 기판(1)으로 Al이 확산되어 p형층이 형성된다. 이 p형층에 공핍층이 도달하기 때문에, 리크 전류가 발생하고, 디바이스의 내압이 열화한다.Subsequently, the effects of the present embodiment will be described in comparison with comparative examples. 5 is a cross-sectional view showing a manufacturing method of a semiconductor device according to a comparative example. In the comparative example, the Al-Si
한편, 본 실시의 형태에서는, 오목부(4) 내의 산화막(5)이 Al-Si막(6)으로부터 오목부(4)를 통해서 Si 기판(1)으로 Al이 확산되는 것을 막는 보호막으로서 기능한다. 따라서, Si 기판(1)의 이면에 오목부(4)가 존재하더라도 리크 전류와 내압 열화를 억제할 수 있다. 또한, Al-Si막(6)에 의해 Si 기판(1)과 금속 전극(7)의 박리를 억제할 수 있다.On the other hand, in the present embodiment, the
실시의 형태 2.Embodiment 2:
도 6은 본 발명의 실시의 형태 2와 관련되는 반도체 장치의 제조 방법을 나타내는 단면도이다. 본 실시의 형태에서는, 실시의 형태 1의 산화막(5) 대신에 보호막으로서 n형 도핑 폴리실리콘(8)을 형성한다. 이 경우, 오목부(4) 내의 n형 도핑 폴리실리콘(8)이 Al-Si막(6)으로부터 오목부(4)를 통해서 Si 기판(1)으로 Al이 확산되는 것을 막기 때문에, 실시의 형태 1과 마찬가지의 효과를 얻을 수 있다. 또한, n형 도핑 폴리실리콘(8)은 n형이므로, Si 기판(1)을 p형으로 활성화시키는 Al에 대하여 마진이 있고, 오목부(4)에서도 통전할 수 있다.6 is a cross-sectional view showing a manufacturing method of a semiconductor device according to a second embodiment of the present invention. In this embodiment mode, an n-type doped
실시의 형태 3.
도 7은 본 발명의 실시의 형태 3과 관련되는 반도체 장치의 제조 방법을 나타내는 단면도이다. 본 실시의 형태에서는, 실시의 형태 1의 산화막(5) 대신에 보호막으로서 인화산화막 유리(9)를 형성한다. 이 경우에도 실시의 형태 1과 마찬가지의 효과를 얻을 수 있다. 또한, 인화산화막 유리(9)는 n형이므로, 실시의 형태 2와 마찬가지로, Si 기판(1)을 p형으로 활성화시키는 Al에 대하여 마진이 있고, 오목부(4)에서도 통전할 수 있다.7 is a cross-sectional view showing a method of manufacturing a semiconductor device according to a third embodiment of the present invention. In this embodiment mode, instead of the
실시의 형태 4.
도 8은 본 발명의 실시의 형태 4와 관련되는 반도체 장치의 제조 방법을 나타내는 단면도이다. 본 실시의 형태에서는, 실시의 형태 1의 산화막(5) 대신에 보호막으로서 실리사이드화하지 않는 단체(單體) 메탈(10)(티탄)을 형성한다. 오목부(4) 내의 단체 메탈(10)은 Al의 확산을 막는 배리어 메탈로서 작용하기 때문에, 실시의 형태 1과 마찬가지의 효과를 얻을 수 있다. 또한, 단체 메탈(10)은 n형에 대한 저항 특성(ohmic characteristic)이 우수하다.8 is a cross-sectional view showing a method of manufacturing a semiconductor device according to
실시의 형태 5
도 9는 본 발명의 실시의 형태 5와 관련되는 반도체 장치의 제조 방법을 나타내는 단면도이다. 본 실시의 형태에서는, n형층(3)을 형성한 후에 이면 위와 오목부(4) 내에 금속막(티탄, 코발트, 텅스텐, 몰리브덴)을 형성한다. 그 후에, 어닐을 실시하는 것에 의해, 금속 실리사이드(11)(티탄 실리사이드, 코발트 실리사이드, 텅스텐 실리사이드, 몰리브덴 실리사이드)를 형성한다. 다음으로, 스퍼터 에칭에 의해 오목부(4) 내의 금속 실리사이드(11)를 남기면서 이면 위의 금속 실리사이드(11)를 제거한다. 그 후, 실시의 형태 1과 마찬가지로 Al-Si막(6)과 금속 전극(7)을 형성한다.9 is a cross-sectional view showing a manufacturing method of a semiconductor device according to
오목부(4) 내의 금속 실리사이드(11)가 Al-Si막(6)으로부터 오목부(4)를 통해서 Si 기판(1)으로 Al이 확산되는 것을 막는 보호막으로서 기능하기 때문에, 실시의 형태 1과 마찬가지의 효과를 얻을 수 있다. 또한, 금속 실리사이드(11)는 단체 메탈(10)보다 n형의 n형층(3)에 대한 저항 특성이 우수하고, Al의 확산을 막는 배리어 메탈로서 작용한다.Since the
실시의 형태 6
도 10, 11은 본 발명의 실시의 형태 6과 관련되는 반도체 장치의 제조 방법을 나타내는 단면도이다. 우선, 실시의 형태 1의 도 1과 마찬가지로 n-형의 Si 기판(1)의 표면에 p형 불순물을 주입하여 p형층(2)을 형성하고, 이면에 n형 불순물을 주입하여 n형층(3)을 형성한다. Si 기판(1)의 이면에는 오목부(4)가 형성되어 있다. 다음으로, 도 10에 나타내는 바와 같이, 이면에 레이저 어닐을 실시하여 오목부(4)를 남긴 채로 이면을 재결정화하고, n형층(3)을 재형성한다. 다음으로, 도 11에 나타내는 바와 같이, 이면 위에 Al-Si막(6)을 형성한다. Al-Si막(6) 위에 금속 전극(7)을 형성한다.10 and 11 are cross-sectional views showing a manufacturing method of a semiconductor device according to a sixth embodiment of the present invention. 1, a p-type impurity is implanted into the surface of an n-
이것에 의해 Al-Si막(6)으로부터 오목부(4)를 통해서 Si 기판(1)으로 Al이 확산되는 것을 막을 수 있기 때문에, 실시의 형태 1과 마찬가지의 효과를 얻을 수 있다. 또한, n형층(3)을 재형성할 수 있기 때문에, 특성 변화를 억제할 수 있다. 또한, 레이저 조사로 이면을 용융시켜 오목부(4)를 소실시키는 방법에서는 처리 시간이 길어지지만, 본 실시의 형태에서는 오목부(4)를 남김으로써 레이저 어닐의 처리 시간을 짧게 할 수 있기 때문에, 비용을 저감할 수 있다.As a result, diffusion of Al from the Al-
도 12는 본 발명의 실시의 형태 6과 관련되는 반도체 장치의 제조 방법의 변형예를 나타내는 단면도이다. 레이저 어닐을 오목부(4)에만 선택적으로 실시한다. 이것에 의해, 오목부(4) 부근을 재결정화할 수 있기 때문에, 실시의 형태 6의 효과를 얻을 수 있다. 또한, 레이저 어닐을 선택적으로 실시함으로써, 레이저 어닐의 처리 시간을 더 단축할 수 있기 때문에, 비용을 저감할 수 있다.12 is a cross-sectional view showing a modification of the semiconductor device manufacturing method according to the sixth embodiment of the present invention. Laser annealing is selectively performed only on the
1 : Si 기판
3 : n형층
4 : 오목부
5 : 산화막
6 : Al-Si막
7 : 금속 전극
8 : n형 도핑 폴리실리콘
9 : 인화산화막 유리
10 : 단체 메탈
11 : 금속 실리사이드1: Si substrate
3: n-type layer
4:
5: oxide film
6: Al-Si film
7: Metal electrode
8: n-type doped polysilicon
9: Phosphor oxide glass
10: Group Metal
11: metal silicide
Claims (7)
상기 n형층을 형성한 후에 상기 이면 위와 상기 오목부 내에 보호막을 형성하는 공정과,
상기 오목부 내의 상기 보호막을 남기면서 상기 이면 위의 상기 보호막을 제거하는 공정과,
상기 보호막을 제거한 후에 상기 이면 위에 Al-Si막을 형성하는 공정과,
상기 Al-Si막 위에 금속 전극을 형성하는 공정
을 구비하고,
상기 오목부 내의 상기 보호막은, 상기 Al-Si막으로부터 상기 오목부를 통해서 상기 Si 기판으로 Al이 확산되는 것을 막는
것을 특징으로 하는 반도체 장치의 제조 방법.
A step of forming an n-type layer by implanting n-type impurity into the back surface of the Si substrate having the recessed back side formed thereon,
Forming a protective film on the back surface and the concave portion after forming the n-type layer;
Removing the protective film on the back surface while leaving the protective film in the concave portion;
A step of forming an Al-Si film on the back surface after removing the protective film,
A step of forming a metal electrode on the Al-Si film
And,
The protective film in the concave portion is a film which prevents Al from diffusing from the Al-Si film to the Si substrate through the concave portion
Wherein the semiconductor device is a semiconductor device.
상기 보호막은 산화막인 것을 특징으로 하는 반도체 장치의 제조 방법.
The method according to claim 1,
Wherein the protective film is an oxide film.
상기 보호막은 n형 도핑 폴리실리콘 또는 인화산화막 유리인 것을 특징으로 하는 반도체 장치의 제조 방법.
The method according to claim 1,
Wherein the protective film is an n-type doped polysilicon or a phosphorus oxide glass.
상기 보호막은 실리사이드화하지 않는 메탈인 것을 특징으로 하는 반도체 장치의 제조 방법.
The method according to claim 1,
Wherein the protective film is a metal which is not silicided.
상기 보호막은 금속 실리사이드인 것을 특징으로 하는 반도체 장치의 제조 방법.
The method according to claim 1,
Wherein the protective film is a metal silicide.
상기 이면에 레이저 어닐을 실시하여 상기 오목부를 남긴 채로 상기 이면을 재결정화하고, 상기 n형층을 재형성하는 공정과,
상기 레이저 어닐의 후에 상기 이면 위에 Al-Si막을 형성하는 공정과,
상기 Al-Si막 위에 금속 전극을 형성하는 공정
을 구비하는 것을 특징으로 하는 반도체 장치의 제조 방법.
A step of forming an n-type layer by implanting n-type impurity into the back surface of the Si substrate having the recessed back side formed thereon,
A step of performing laser annealing on the back surface to recrystallize the back surface while leaving the concave portion to remodel the n-type layer,
Forming an Al-Si film on the back surface after the laser annealing;
A step of forming a metal electrode on the Al-Si film
And forming a second insulating film on the semiconductor substrate.
상기 레이저 어닐을 상기 오목부에 선택적으로 실시하는 것을 특징으로 하는 반도체 장치의 제조 방법.The method according to claim 6,
And the laser annealing is selectively performed on the concave portion.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2014/070246 WO2016017007A1 (en) | 2014-07-31 | 2014-07-31 | Semiconductor device manufacturing method |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20170016511A KR20170016511A (en) | 2017-02-13 |
KR101895178B1 true KR101895178B1 (en) | 2018-09-04 |
Family
ID=55216945
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020177002261A KR101895178B1 (en) | 2014-07-31 | 2014-07-31 | Semiconductor device manufacturing method |
Country Status (6)
Country | Link |
---|---|
US (2) | US9947544B2 (en) |
JP (1) | JP6108037B2 (en) |
KR (1) | KR101895178B1 (en) |
CN (1) | CN106663612B (en) |
DE (1) | DE112014006849B4 (en) |
WO (1) | WO2016017007A1 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111883418B (en) * | 2020-08-05 | 2021-04-27 | 长江存储科技有限责任公司 | Method for manufacturing semiconductor structure |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030032227A1 (en) | 2001-08-08 | 2003-02-13 | Masanori Ohara | MOSFET, semiconductor device using the same and production process therefor |
JP2006005245A (en) | 2004-06-18 | 2006-01-05 | Sharp Corp | Semiconductor substrate and method of manufacturing the same |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4982260A (en) | 1989-10-02 | 1991-01-01 | General Electric Company | Power rectifier with trenches |
JPH03183126A (en) * | 1989-12-13 | 1991-08-09 | Kawasaki Steel Corp | Manufacture of semiconductor device |
JP2629427B2 (en) * | 1990-09-25 | 1997-07-09 | 日産自動車株式会社 | Method of forming aluminum film |
JPH0521387A (en) * | 1991-07-14 | 1993-01-29 | Sony Corp | Method of reduction in resistance of metal thin film |
JPH0590193A (en) * | 1991-09-27 | 1993-04-09 | Sanyo Electric Co Ltd | Manufacture of semiconductor device |
US6709904B2 (en) * | 2001-09-28 | 2004-03-23 | Agere Systems Inc. | Vertical replacement-gate silicon-on-insulator transistor |
US7105048B2 (en) * | 2001-11-30 | 2006-09-12 | Semiconductor Energy Laboratory Co., Ltd. | Laser irradiation apparatus |
JP4000877B2 (en) * | 2002-03-19 | 2007-10-31 | 松下電器産業株式会社 | Chip-type semiconductor device and manufacturing method thereof |
JP2003324197A (en) | 2002-04-30 | 2003-11-14 | Rohm Co Ltd | Semiconductor device and method for manufacturing the same |
JP2004303755A (en) * | 2003-03-28 | 2004-10-28 | Renesas Technology Corp | Process for fabricating semiconductor device and semiconductor device |
US20060027833A1 (en) | 2004-08-04 | 2006-02-09 | Nissan Motor Co., Ltd. | Silicon carbide semiconductor device and method of manufacturing the same |
JP2006074024A (en) | 2004-08-04 | 2006-03-16 | Nissan Motor Co Ltd | Silicon carbide semiconductor apparatus and method of manufacturing the same |
JP2011187753A (en) | 2010-03-10 | 2011-09-22 | Toshiba Corp | Method of manufacturing semiconductor device |
US8502314B2 (en) * | 2011-04-21 | 2013-08-06 | Fairchild Semiconductor Corporation | Multi-level options for power MOSFETS |
DE102011087845B4 (en) * | 2011-12-06 | 2015-07-02 | Infineon Technologies Ag | LATERAL TRANSISTOR COMPONENT AND METHOD FOR THE PRODUCTION THEREOF |
CN103219416A (en) * | 2013-03-22 | 2013-07-24 | 中山大学 | Preparation method for local back surface field of crystalline silicon solar cell |
CN203312314U (en) * | 2013-06-26 | 2013-11-27 | 湖南工程学院 | N type crystal silicon solar battery fully covered with aluminum back emitter junctions |
CN103456796B (en) | 2013-08-28 | 2016-06-15 | 中航(重庆)微电子有限公司 | A kind of groove-shaped Schottky power unit structure and manufacture method thereof |
DE102014107325B4 (en) * | 2014-05-23 | 2023-08-10 | Infineon Technologies Ag | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE |
-
2014
- 2014-07-31 US US15/304,558 patent/US9947544B2/en active Active
- 2014-07-31 WO PCT/JP2014/070246 patent/WO2016017007A1/en active Application Filing
- 2014-07-31 JP JP2016537686A patent/JP6108037B2/en active Active
- 2014-07-31 KR KR1020177002261A patent/KR101895178B1/en active IP Right Grant
- 2014-07-31 DE DE112014006849.7T patent/DE112014006849B4/en active Active
- 2014-07-31 CN CN201480080968.8A patent/CN106663612B/en active Active
-
2018
- 2018-01-19 US US15/875,111 patent/US10325776B2/en active Active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030032227A1 (en) | 2001-08-08 | 2003-02-13 | Masanori Ohara | MOSFET, semiconductor device using the same and production process therefor |
JP2006005245A (en) | 2004-06-18 | 2006-01-05 | Sharp Corp | Semiconductor substrate and method of manufacturing the same |
Also Published As
Publication number | Publication date |
---|---|
KR20170016511A (en) | 2017-02-13 |
JPWO2016017007A1 (en) | 2017-04-27 |
WO2016017007A1 (en) | 2016-02-04 |
JP6108037B2 (en) | 2017-04-05 |
US9947544B2 (en) | 2018-04-17 |
CN106663612B (en) | 2019-07-30 |
DE112014006849T5 (en) | 2017-04-13 |
DE112014006849B4 (en) | 2023-05-04 |
CN106663612A (en) | 2017-05-10 |
US20170040171A1 (en) | 2017-02-09 |
US10325776B2 (en) | 2019-06-18 |
US20180144942A1 (en) | 2018-05-24 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5361861B2 (en) | Semiconductor device | |
JP6077385B2 (en) | Semiconductor device | |
CN106133915B (en) | Semiconductor device and method for manufacturing semiconductor device | |
WO2013145022A1 (en) | Method for manufacturing silicon carbide semiconductor device | |
US9954099B1 (en) | Transistor structure | |
JP2015106695A (en) | Semiconductor device and method for manufacturing the same | |
JP2011066207A (en) | Semiconductor device | |
US20100123194A1 (en) | Semiconductor device and method for fabricating the same | |
KR101895178B1 (en) | Semiconductor device manufacturing method | |
US10153274B2 (en) | Semiconductor device | |
CN110459473B (en) | Semiconductor device and method for manufacturing the same | |
KR101764468B1 (en) | Schottky diode and method of manufacturing the same | |
US8586434B1 (en) | Method of manufacturing semiconductor device | |
WO2013145412A1 (en) | Semiconductor device and method for manufacturing same | |
US20190237537A1 (en) | Field effect transistor and method for manufacturing the same | |
KR101667669B1 (en) | Schottky barrier diode and method for manufacturing the diode | |
JP6427388B2 (en) | Semiconductor device | |
JP6260711B2 (en) | Manufacturing method of semiconductor device | |
JP6337969B2 (en) | Semiconductor device and manufacturing method thereof | |
US8722549B2 (en) | Semiconductor device capable of reducing plasma induced damage and fabrication method thereof | |
JP6192952B2 (en) | Manufacturing method of semiconductor device | |
JP2009278031A (en) | Production process of semiconductor device | |
KR100824132B1 (en) | Method of manufacturing a semiconductor device | |
JP2017143138A (en) | Semiconductor device and manufacturing method of the same | |
KR101371491B1 (en) | Semiconductor device and method manufacturing the same |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant |