KR101891828B1 - Oxide semiconductor thin film, thin film transistor and device comprising the thin film transistor - Google Patents

Abstract

(Problem) A composition capable of reducing the moisture content of a film is disclosed in an IGZO-based oxide semiconductor thin film, and an oxide semiconductor thin film having high reproducibility and suitable for manufacturing a large-area device, particularly a flexible device, is obtained.
(In + Ga + Zn) ≤ 1/3, Ga / (In + Ga + Zn) ≤ 1/3 in In, Ga and Zn in the oxide semiconductor thin film having In, Ga, Zn and O as main constituent elements, Ga + Zn)? 9/11, 4/5? Ga / (In + Ga)? 1, and In / (In + Zn)? 1/2.

Description

TECHNICAL FIELD [0001] The present invention relates to an oxide semiconductor thin film, a thin film transistor, and a thin film transistor including the thin film transistor and the thin film transistor.

The present invention relates to an oxide semiconductor thin film of an In-Ga-Zn-O system (IGZO system) and a thin film transistor including the oxide semiconductor thin film. The present invention also relates to an apparatus such as a display device, an imaging sensor and an X-ray digital photographing apparatus using a thin film transistor.

In recent years, thin film transistors using an oxide semiconductor thin film of an In-Ga-Zn-O system (IGZO system) as a channel layer have been actively developed (Patent Documents 1 to 5, etc.). Since the oxide semiconductor thin film can be formed at a low temperature, exhibits a higher mobility than amorphous silicon, and is transparent to visible light, a flexible transparent thin film transistor can be formed on a substrate such as a plastic plate or a film.

In Patent Documents 1 to 4, a preferable range of the composition ratio of the IGZO system is defined from various viewpoints.

In Patent Document 5, it is reported that, in the TFT using an oxide semiconductor as an active layer (channel layer), the moisture content contained in the active layer is different from the cause of the fluctuation of mobility and on-off ratio.

In Patent Document 5, the upper limit of the amount of water absorption, which is not a problem in practice, is specified in the practical use of a TFT having an oxide semiconductor layer.

On the other hand, it is generally recognized that when the IGZO-based amorphous oxide semiconductor thin film is applied to a thin film transistor, it is necessary to perform post annealing at about 350 ° C to 400 ° C to improve the stability (threshold shift, etc.) .

Japanese Patent Publication No. 4170454 Japanese Patent Application Laid-Open No. 2007-281409 Japanese Published Patent Publication No. 2009-533884 Japanese Laid-Open Patent Publication No. 2009-253204 Japanese Patent Application Laid-Open No. 2008-283046

At present, there is an increasing demand for a flexible TFT in which a thin film transistor (TFT) is formed on a resin substrate with low heat resistance, in particular, a flexible TFT capable of coping with a large-area device. It is required to form a TFT having high characteristics by the low temperature annealing process below. When the temperature is less than 300 ° C, it is possible to form a resin substrate having a relatively high heat resistance such as polyimide. When the temperature is 200 ° C or less, a resin substrate such as PEN or PTFE can be formed.

However, in the low-temperature annealing, the moisture in the amorphous oxide thin film can not be removed sufficiently, and it becomes difficult to make the water content uniform within the film surface. Concretely, when annealing a large-area device, the moisture content in the film becomes uneven by merely varying the annealing temperature by several degrees at the center portion and the portion apart from the center. Also, when annealing a plurality of devices, there is a possibility that the annealing temperature may deviate by several degrees even when there is a slight difference in distance from the heat source of each device or contact state with the heater. In such a case, Unevenness occurs. The irregularity of the water content in the film is equivalent to the characteristic deviation in the plane. Patent Document 5 does not disclose a variation in the amount of water in a plane, and a measure for suppressing in-plane variation has not been studied.

DISCLOSURE OF THE INVENTION The present invention has been made in view of the above circumstances, and it is an object of the present invention to provide an IGZO-based oxide semiconductor thin film which has a composition capable of reducing the moisture content of an IGZO-based amorphous oxide semiconductor thin film and which has a high reproducibility and is suitable for manufacturing a large- And to provide a thin film. Another object of the present invention is to provide a thin film transistor and a thin film transistor including the thin film transistor with small variation in characteristics in the plane.

In the oxide semiconductor thin film of the present invention, the composition ratio of In, Ga, and Zn is Zn / (In + Ga + Zn) ⅓, Ga / (In + Ga + Zn)? 9/11, 4/5? Ga / (In + Ga)? 1, and In / (In + Zn)? 1/2.

Particularly, it is preferable that the composition ratio is 4/5? Ga / (In + Ga)? 9/10.

Here, "main constituent element" means that the total ratio of In, Ga, Zn, and O to the total constituent elements is 98% or more.

The oxide semiconductor thin film is preferably amorphous.

In the case of an amorphous film, it is easy to form a uniform film over a large area, and there is no such a grain boundary as a polycrystal, so it is easy to suppress variation in device characteristics.

Whether or not the oxide semiconductor layer is amorphous can be confirmed by X-ray diffraction measurement. That is, when a clear peak indicating a crystal structure is not detected by X-ray diffraction measurement, it can be judged that the oxide semiconductor layer is amorphous.

In the present invention, the semiconductor thin film generally has a resistivity that functions as a semiconductor. Particularly, it is preferable that the resistivity at room temperature (20 캜) is 1 Ω cm or more and 1 × 10 ⁶ Ω cm or less.

A thin film transistor of the present invention is a thin film transistor having an active layer, a source electrode, a drain electrode, a gate insulating film and a gate electrode on a substrate,

And the active layer is made of the oxide semiconductor thin film of the present invention.

It is preferable that the substrate has flexibility.

Particularly, it is preferable that the substrate is a resin substrate.

The display device of the present invention is characterized by including the thin film transistor of the present invention.

The image sensor of the present invention is characterized by including the thin film transistor of the present invention.

The X-ray sensor of the present invention is characterized by including the thin film transistor of the present invention.

The oxide semiconductor thin film of the present invention does not suck moisture into the film due to its composition ratio, so that the amount of moisture in the oxide semiconductor thin film is small. Therefore, the characteristic deviation does not occur according to the difference in the water content in the film, the reproducibility is high, and the characteristic is uniform over a large area. The thin film transistor using the oxide semiconductor thin film of the present invention can have uniform characteristics over a large area.

As a method for minimizing the variation in the water content in the oxide semiconductor thin film, there is a method in which the water vapor pressure in the deposition chamber at the time of forming the oxide semiconductor thin film is made extremely low, or the moisture in the film is removed by heat treatment at a high temperature after the film formation have.

However, it is very difficult to lower the water vapor pressure in the deposition chamber to such an extent that the electric characteristics do not deviate, and the cost of the vacuum deposition apparatus increases, and the productivity is lowered. Further, when a film is formed on a resin substrate or the like, a large amount of water is desorbed from the substrate, so that it becomes more difficult to lower the water vapor pressure in the film formation chamber.

In addition, the method of heat treatment at a high temperature after film formation not only raises the production cost, but also significantly reduces the choice of materials for the substrate, the electrode material, and the insulating film material. Particularly, in order to obtain a flexible device in which an oxide TFT is formed on a resin substrate that has recently attracted attention, heat treatment at 200 占 폚 or more is difficult because the heat resistance of the resin substrate is low.

According to the oxide semiconductor thin film of the present invention, by controlling the composition ratio, the water content in the film can be made very small even if the water vapor pressure in the film formation chamber is not made too low. Therefore, The device can be easily formed.

In addition, the yield is inevitably improved by these effects, leading to reduction of the production cost.

FIG. 1A is a top gate-top contact type, FIG. 1B is a top gate-bottom contact type, FIG. 1C is a bottom gate-top contact type and FIG. 1D is a bottom gate- 1 is a cross-sectional view schematically showing a configuration.
2 is a schematic cross-sectional view showing a part of a liquid crystal display device according to the embodiment.
3 is a schematic configuration diagram of the electric wiring of the liquid crystal display device of Fig.
4 is a schematic sectional view showing a part of the X-ray sensor array of the embodiment.
Fig. 5 is a schematic configuration diagram of the electric wiring of the X-ray sensor array of Fig. 4;
6 is a plan view (A) and a cross-sectional view (B) showing a manufacturing process of a sample for measuring electrical resistance.
7 is a plan view (A) and a sectional view (B) of a schematic configuration of a sample for measuring electrical resistance.
8 is a graph showing the relationship between the temperature and the resistivity in the IGZO films of Examples 1 and 2 and Comparative Examples 1 to 4 in the temperature rising and temperature decreasing processes.
9 is a graph showing a change in the amount of desorbed gas at the time of temperature rise with respect to M / z = 18 (H ₂ O).
10 is a graph showing the relationship between the temperature and the resistivity in the IGZO films of Examples 1 and 3 and Comparative Examples 5 and 6 during the temperature rise and temperature decrease process.
11 is a graph showing the relationship between the temperature and the resistivity in the IGZO films of Examples 1 and 4 and Comparative Examples 7 to 9 in the temperature increasing and decreasing process.
12 is a graph showing the relationship between the temperature and the resistivity in the IGZO film of Examples 5 and 6 in the temperature rising and temperature decreasing processes.
FIG. 13A is a plan view of the simple type TFT, and FIG. 13B is a sectional view.
14 is a graph showing V _g -I _d characteristics of the TFT 1 of Example.
15 is a graph showing V _g -I _d characteristics of the TFT 2 of Example.
16 is a graph showing V _g -I _d characteristics of the TFT 3 of the embodiment.
17 is a three-state diagram showing a composition ratio range of In, Ga, and Zn of the present invention.

Hereinafter, an embodiment of the oxide semiconductor thin film, the thin film transistor, and the device including the thin film transistor of the present invention will be described.

≪ Oxide semiconductor thin film &

The oxide semiconductor thin film of the present invention contains In, Ga, Zn, and O as main constituent elements and has a composition ratio of Zn / (In + Ga + Zn) 11, 4/5? Ga / (In + Ga)? 1, and In / (In + Zn)? 1/2. More preferably 4/5? Ga / (In + Ga)? 9/10.

Here, the semiconductor thin film may be one having a resistivity functioning as a semiconductor. Particularly, it is assumed that the resistivity at room temperature (20 DEG C) is in a range of 1 OMEGA cm or more and 1 x 10 < ⁶ >

The oxide semiconductor thin film of the present invention is preferably amorphous.

Here, it is assumed that the thin film is about 1 nm or more and 10 占 퐉 or less.

The oxide semiconductor thin film of the present invention can be formed by a deposition method such as sputtering.

Ga / (In + Ga + Zn) < / = 1/3, Ga / (In + Ga + Zn) As a method of forming an IGZO film of In / (In + Zn) < / = 1/2 by sputtering, the composition ratio of In, Ga and Zn in the IGZO film formed is Zn / (In + Ga + Zn) A single sputtering target of a composite oxide target in which Ga / (In + Ga + Zn)? 9/11, and 4/5? Ga / (In + Ga)? 1 and In / Or may be a co-sputtering method using a combination of In, Ga, Zn, oxides thereof, or complex oxide targets thereof.

Further, in order to control the resistivity of the obtained film, the oxygen partial pressure in the film formation chamber at the time of film formation is arbitrarily controlled. A method of controlling the oxygen partial pressure in the deposition chamber may be a method of changing the amount of O ₂ gas introduced into the deposition chamber, or a method of changing the introduction amount of the oxygen radical or the ozone gas. If the oxygen partial pressure is increased, the resistivity of the oxide semiconductor thin film can be increased. If the oxygen partial pressure is lowered, the oxygen defects in the film can be increased and the resistivity of the oxide semiconductor thin film can be lowered.

Further, even when the introduction of the oxygen gas is stopped, when the resistance is high, a reducing gas such as H ₂ or N ₂ may be introduced to further increase the oxygen deficiency in the film.

The substrate temperature during film formation may be arbitrarily selected depending on the substrate, but in the case of using a flexible substrate, the substrate temperature is preferably closer to room temperature.

It is preferable that the oxide semiconductor thin film is annealed after film formation.

The annealing temperature is preferably 100 deg. C or more and 300 deg. C or less in order to suppress the variation of the in-plane electrical characteristics of the oxide semiconductor thin film. When a flexible substrate such as a resin substrate having low heat resistance is used as the substrate on which the thin film is formed, it is preferable that the temperature is not lower than 100 ° C and not higher than 200 ° C.

The atmosphere during annealing is preferably an inert atmosphere or an oxidizing atmosphere. When the annealing treatment is performed in a reducing atmosphere, oxygen in the oxide semiconductor is released, surplus carriers are generated, and electric characteristic deviations are likely to occur. In addition, in the case where the humidity of the annealing atmosphere is very high, moisture is likely to be sucked into the film, and electric characteristics tend to occur. Therefore, the humidity is preferably 50% or less.

The oxide semiconductor thin film of the present invention has a Ga composition ratio higher than that of an IGZO material generally used as an active layer of a thin film transistor. By using the IGZO film of the composition range of the present invention, the amount of water sucked into the film at the time of film formation can be suppressed to a very low level. As a result, it is possible to suppress the deviation of the electric characteristics due to the moisture content in the film to be very small. I found out. The fact that the moisture content in the film is suppressed to be extremely low means that the amount of water released during the post-annealing treatment after film formation is also reduced, and as a result, the generation of carriers accompanied by water desorption is reduced, and the design of electric characteristics is facilitated.

In general, it is known that simply increasing the Ga composition increases the electrical resistance and makes it difficult to use it as a semiconductor.

The inventor of the present invention has come to the present invention by studying in detail a composition range which is low in moisture content in a film and which can be used for a device as a semiconductor.

In the present invention, since it is possible to reduce the moisture content of the film without heat treatment at a high temperature, it is easy to form the resin on a substrate with low heat resistance. Therefore, application to a flexible device becomes easier.

INDUSTRIAL APPLICABILITY The IGZO-based oxide semiconductor thin film of the present invention is useful as an active layer of a thin film transistor applied to a large-area device, since it has a composition that does not suck moisture well in a film and has high in-

<Thin Film Transistor>

1 (A) to 1 (D) are cross-sectional views schematically showing the structures of the thin film transistors 1 to 4 of the first to fourth embodiments of the present invention. In each of the thin film transistors shown in Figs. 1 (A) to 1 (D), common elements are given the same reference numerals.

The thin film transistors 1 to 4 according to the embodiment of the present invention are each provided with the active layer 12, the source electrode 13 and the drain electrode 14, the gate insulating film 15 and the gate electrode 16 ), And the active layer 12 is provided with the oxide semiconductor thin film of the present invention described above.

The thin film transistor 1 of the first embodiment shown in Fig. 1 (A) is a top gate-top contact type transistor and the thin film transistor 2 of the second embodiment shown in Fig. 1 (B) 1B is a bottom contact type transistor and the thin film transistor 3 of the third embodiment shown in Fig. 1C is a bottom gate-top contact type transistor and is a thin film transistor of the fourth embodiment shown in Fig. The transistor 4 is a bottom gate-bottom contact type transistor.

In the embodiment shown in Figs. 1 (A) to 1 (D), the arrangement of the gate electrode, the source electrode, and the drain electrode in the oxide semiconductor layer is different, but the same reference numerals denote the same elements. You can adapt.

Hereinafter, each component will be described in detail.

(Board)

The shape, structure, size, etc. of the substrate 11 for forming the thin film transistor 1 are not particularly limited and can be appropriately selected according to the purpose. The substrate may have a single-layer structure or a stacked-layer structure.

As the substrate 11, for example, a substrate made of an inorganic material such as YSZ (yttrium stabilized zirconium) or glass, or a resin or a resin composite material can be used.

Among them, a substrate made of a resin or a resin composite material is preferable in that it is lightweight and has flexibility. Specific examples thereof include polybutylene terephthalate, polyethylene terephthalate, polyethylene naphthalate, polybutylene naphthalate, polystyrene, polycarbonate, polysulfone, polyether sulfone, polyarylate, allyl diglycol carbonate, polyamide, polyimide, Fluorine resins such as polyamideimide, polyetherimide, polybenzazole, polyphenylene sulfide, polycycloolefin, norbornene resin and polychlorotrifluoroethylene, liquid crystal polymers, acrylic resins, epoxy resins, silicone resins, ionomers A substrate made of a synthetic resin such as a resin, a cyanate resin, a crosslinked fumaric acid diester, a cyclic polyolefin, an aromatic ether, a maleimide-olefin, a cellulose or an episulfide compound, a composite plastic material such as the above- A substrate made of A substrate made of a synthetic resin or the like and a composite plastic material such as metal oxide nanoparticles, inorganic oxide nanoparticles or inorganic nitride nanoparticles, a substrate made of synthetic resin or the like and a composite plastic material of carbon fiber or carbon nanotube as described above, A substrate made of a composite plastic material such as a glass flake, a glass fiber or a glass bead, a substrate made of synthetic resin or the like and a composite plastic material of a clay mineral or a particle having a mica-derived crystal structure, a thin glass, A substrate made of a composite material having barrier properties having at least one bonding interface by alternately laminating an inorganic layer and an organic layer (a synthetic resin described above) alternately with a laminated plastic substrate having at least one bonding interface between the resins, Substrate A metal multilayer substrate in which stainless steel and a dissimilar metal are laminated, an aluminum substrate or an aluminum substrate having an oxide film with improved surface insulation by subjecting the surface to oxidation treatment (for example, anodic oxidation treatment) Can be used.

The resin substrate is preferably excellent in heat resistance, dimensional stability, solvent resistance, electrical insulation, workability, low air permeability, and low hygroscopicity.

The resin substrate may be provided with a gas barrier layer for preventing permeation of water or oxygen, an undercoat layer for improving the flatness of the resin substrate and adhesion with the lower electrode, and the like.

It is also preferable that the thickness of the substrate is 50 占 퐉 or more and 500 占 퐉 or less. When the thickness of the substrate is 50 mu m or more, the flatness of the substrate itself is further improved. When the thickness of the substrate is 500 m or less, the flexibility of the substrate itself is further improved, and the substrate is more easily used as a substrate for a flexible device. In addition, since the thickness of the substrate having sufficient flatness and flexibility differs depending on the material constituting the substrate, it is necessary to set the thickness thereof in accordance with the substrate material, and the range is generally in a range of 50 to 500 mu m.

(Active layer)

And an oxide semiconductor thin film (hereinafter referred to as an oxide semiconductor layer 12) of the present invention is provided as the active layer 12. In other words, the oxide semiconductor layer 12 is made of In, Ga, Zn, O as main constituent elements and the composition ratio thereof is Zn / (In + Ga + Zn) Ga / (In + Ga) &lt; / = Ga / (In + Ga) &lt; ? 9/10.

The thickness of the oxide semiconductor layer 12 is preferably 5 nm or more and 150 nm or less from the viewpoint of the flatness of the thin film and the film formation time.

The oxide semiconductor layer 12 can be formed by sputtering or the like as described above.

(Source and drain electrodes)

The source electrode 13 and the drain electrode 14 are formed of a metal such as Al, Mo, Cr, Ta, Ti, Au or Ag, Al-Nd, Ag alloy, A metal oxide conductive film such as tin, zinc oxide, indium oxide, indium tin oxide (ITO), zinc oxide indium (IZO), or the like can be used as a single layer or a laminated structure of two or more layers.

The source electrode 13 and the drain electrode 14 are all formed by a physical method such as a wet method such as a printing method or a coating method, a vacuum evaporation method, a sputtering method or an ion plating method, a chemical method such as a CVD method or a plasma CVD method The film may be formed in accordance with a method suitably selected in consideration of suitability with a material to be used.

When the source electrode 13 and the drain electrode 14 are formed of the above metal, considering the film forming property, the patterning property by the etching or the lift-off method, the conductivity, etc., the thickness is preferably 10 nm or more and 1000 nm or less More preferably 50 nm or more and 100 nm or less.

(Gate insulating film)

As the gate insulating film 15, it is preferable to have a high insulating property, and for example, an insulating film such as SiO ₂ , SiN _x , SiON, Al ₂ O ₃ , Y ₂ O ₃ , Ta ₂ O ₅ , HfO ₂ , And an insulating film containing at least two or more compounds of the formula

The gate insulating film 15 may be formed by a method such as a wet method such as a printing method or a coating method, a physical method such as a vacuum deposition method, a sputtering method, and an ion plating method, a chemical method such as a CVD method or a plasma CVD method, The film may be formed according to a properly selected method.

In addition, the gate insulating film 15 needs to have a sufficient thickness to reduce the leak current and improve the voltage resistance, while if the thickness is excessively large, the driving voltage is increased. The thickness of the gate insulating film 15 may vary depending on the material, but is preferably 10 nm to 10 mu m, more preferably 50 nm to 1000 nm, and particularly preferably 100 nm to 400 nm.

(Gate electrode)

As the gate electrode 16, a metal such as Al, Mo, Cr, Ta, Ti, Au, Ag, Al-Nd, an Ag alloy, tin oxide, zinc oxide, A metal oxide conductive film such as indium oxide, indium tin oxide (ITO), zinc oxide indium (IZO), or the like can be used as a single layer or a laminated structure of two or more layers.

The gate electrode 16 may be formed by a wet process such as a printing process or a coating process, a physical process such as a vacuum deposition process, a sputtering process or an ion plating process, a chemical process such as a CVD process or a plasma CVD process, The film may be formed according to a method appropriately selected.

When the gate electrode 16 is formed of the above metal, the thickness is preferably 10 nm or more and 1000 nm or less in consideration of the film forming property, the patterning property by the etching or the lift-off method, Or more and 200 nm or less.

<Thin Film Transistor Manufacturing Method>

A manufacturing method of the top gate-top contact type thin film transistor 1 shown in Fig. 1 (A) will be briefly described.

The substrate 11 is prepared and an oxide semiconductor thin film 12 as an active layer is formed on the substrate 11 by a deposition method such as the sputtering method described above.

Then, the oxide semiconductor layer 12 is patterned. The patterning can be performed by photolithography and etching. Specifically, a resist pattern is formed on the remaining portion by photolithography, and a pattern is formed by etching with an acid solution such as hydrochloric acid, nitric acid, dilute sulfuric acid, or a mixed solution of phosphoric acid, nitric acid and acetic acid.

A protective film for protecting the oxide semiconductor layer may be formed on the oxide semiconductor layer 12 when the source and drain electrodes are etched. The protective film may be formed continuously with the oxide semiconductor layer, or may be formed after patterning the oxide semiconductor layer.

Next, a metal film for forming the source / drain electrodes 13 and 14 is formed on the oxide semiconductor layer 12.

Then, the metal film is patterned into a predetermined shape by an etching or a lift-off method to form the source electrode 13 and the drain electrode 14. At this time, it is preferable to simultaneously pattern the source / drain electrodes 13 and 14 and the wirings connected to these electrodes (not shown).

After the source / drain electrodes 13 and 14 and the wiring are formed, the gate insulating film 15 is formed and the gate insulating film 15 is patterned into a predetermined shape by photolithography and etching.

After the gate insulating film 15 is formed, the gate electrode 16 is formed. After forming the electrode film, the gate electrode 16 is formed by patterning in a predetermined shape by etching or lift-off method. At this time, it is preferable to simultaneously pattern the gate electrode 16 and the gate wiring.

(Post annealing)

After the gate electrode patterning, the post annealing process is performed. The post annealing process is not particularly limited as long as the oxide semiconductor layer 12 is formed, and the post annealing process may be performed immediately after the formation of the electrode, the insulating film, and the patterning, as long as it is immediately after the formation of the oxide semiconductor film.

The post anneal temperature is preferably 100 deg. C or higher and 300 deg. C or lower in order to suppress the deviation of the electric characteristics of the semiconductor layer 12. In consideration of the case of using a flexible substrate, desirable. If the temperature is higher than or equal to 100 ° C and lower than or equal to 300 ° C, the characteristics of the thin film transistor can be improved without changing the amount of oxygen deficiency in the film.

It is preferable that the atmosphere during post annealing is an inert atmosphere or an oxidizing atmosphere. If post annealing is performed in a reducing atmosphere, oxygen in the oxide semiconductor layer is released, surplus carriers are generated, and electric characteristic deviations are likely to occur. In addition, when the humidity in the post annealing atmosphere is very high, moisture is liable to be sucked into the film and electric characteristic deviation easily occurs. Therefore, the humidity is preferably 50% or less.

The thin film transistor 1 shown in Fig. 1 (A) can be manufactured by the above procedure.

The use of the thin film transistor of the present invention is not particularly limited, but may be applied to, for example, a driving method in a display device (for example, a liquid crystal display device, an organic EL (Electro Luminescence) It is preferable as an element. In particular, it is preferable for a large-area device because of high uniformity in the plane of characteristics.

The thin film transistor of the present invention can be applied to various devices such as a flexible display device which can be manufactured by a low temperature process using a resin substrate, an image sensor such as a CCD (Charge Coupled Device), a CMOS (Complementary Metal Oxide Semiconductor) (Drive circuit) in various electronic devices, such as sensors, MEMS (Micro Electro Mechanical System), and the like.

The display device and the sensor of the present invention using the thin film transistor of the present invention are all highly uniform in properties. Here, the &quot; characteristic &quot; is a display characteristic in the case of a display device, and a sensitivity characteristic in the case of a sensor.

<Liquid Crystal Display Device>

Fig. 2 shows a schematic cross-sectional view of a part of a liquid crystal display device according to an embodiment of the electro-optical device of the present invention, and Fig. 3 shows a schematic configuration diagram of the electric wiring thereof.

2, the liquid crystal display device 5 according to the present embodiment includes a top gate type thin film transistor 1 shown in FIG. 1A and a thin film transistor 1 which is protected with a passivation layer 54 of the transistor 1 A liquid crystal layer 57 sandwiched between the pixel lower electrode 55 and the opposing upper electrode 56 on the gate electrode 16 and an RGB color filter 58 for coloring different colors in correspondence with each pixel And the polarizing plates 59a and 59b are provided on the substrate 11 side of the TFT 10 and on the color filter 58, respectively.

3, the liquid crystal display device 5 of the present embodiment includes a plurality of gate wirings 51 that are parallel to each other and a plurality of data wirings 52 . Here, the gate wiring 51 and the data wiring 52 are electrically insulated. A thin film transistor 1 is provided near the intersection of the gate wiring 51 and the data wiring 52.

The gate electrode 16 of the thin film transistor 1 is connected to the gate wiring 51 and the source electrode 13 of the thin film transistor 1 is connected to the data wiring 52. The drain electrode 14 of the thin film transistor 1 is connected to the pixel lower electrode 55 through a contact hole 19 formed in the gate insulating film 15 (a conductor is buried in the contact hole 19) . The pixel lower electrode 55 constitutes a capacitor 53 together with the grounded counter electrode 56.

Although the liquid crystal device of this embodiment shown in Figs. 2 and 3 is provided with the top gate type thin film transistor, the thin film transistor used in the liquid crystal device which is the display device of the present invention is not limited to the top gate type , Or a bottom gate type thin film transistor.

The thin film transistor of the present invention is suitable for a large screen in a liquid crystal display device because of its high in-plane uniformity, stability and reliability. In addition, since the thin film transistor of the present invention can be manufactured by annealing at a low temperature to have sufficient characteristics, a resin substrate (plastic substrate) can be used as the substrate, and a large area, uniform, stable, A liquid crystal display device can be provided.

Further, since the thin film transistor of the present invention uses an IGZO film having a high Ga composition ratio as compared with a general IGZO material, the optical bandgap is wide, and as a result, light absorption of a short wavelength region (for example, about 400 nm) It is not necessary to form the shielding means in the transistor, so that the production process is simplified and the EL light emission can be efficiently taken out.

<X-ray sensor>

Fig. 4 shows a schematic sectional view of a part of the X-ray sensor which is one embodiment of the sensor of the present invention, and Fig. 5 shows a schematic configuration diagram of the electric wiring.

4 is a schematic cross-sectional view of an enlarged portion of an X-ray sensor array, more specifically. The X-ray sensor 7 of this embodiment includes a thin film transistor 1 and a capacitor 70 formed on a substrate, a charge collecting electrode 71 formed on the capacitor 70, an X-ray conversion layer 72, And an upper electrode (73). On the thin film transistor 1, a passivation film 75 is formed.

The capacitor 70 has a structure in which the insulating film 78 is interposed between the lower electrode 76 for the capacitor and the upper electrode 77 for the capacitor. The upper electrode 77 for the capacitor is connected to either one of the source electrode 13 and the drain electrode 14 of the thin film transistor 1 through the contact hole 79 formed in the insulating film 78 14).

The charge collecting electrode 71 is formed on the capacitor upper electrode 77 in the capacitor 70 and is in contact with the capacitor upper electrode 77.

The X-ray conversion layer 72 is a layer made of amorphous selenium and is formed so as to cover the thin film transistor 1 and the capacitor 70.

The upper electrode 73 is formed on the X-ray conversion layer 72 and is in contact with the X-ray conversion layer 72.

5, the X-ray sensor 7 of the present embodiment includes a plurality of gate wirings 81 that are parallel to each other, a plurality of data wirings 82 that are parallel to each other and intersect the gate wirings 81, . Here, the gate wiring 81 and the data wiring 82 are electrically insulated. A thin film transistor 1 is provided near the intersection of the gate wiring 81 and the data wiring 82.

The gate electrode 16 of the thin film transistor 1 is connected to the gate wiring 81 and the source electrode 13 of the thin film transistor 1 is connected to the data wiring 82. [ The drain electrode 14 of the thin film transistor 1 is connected to the charge collecting electrode 71 and the charge collecting electrode 71 is connected to the grounded opposing electrode 76 together with the capacitor 70 Respectively.

In the X-ray sensor 7 of this configuration, X-rays are irradiated from the upper portion (on the side of the upper electrode 73) in FIG. 4 to generate electron-hole pairs in the X- By applying a high electric field to the X-ray conversion layer 72 by the upper electrode 73, the generated electric charge is accumulated in the capacitor 70 and is read by sequentially scanning the thin film transistor 1 .

Since the X-ray sensor of the present invention includes the thin film transistor 1 having high in-plane uniformity and excellent reliability, an image with excellent uniformity can be obtained.

Although the X-ray sensor of this embodiment shown in Fig. 4 includes the top gate type thin film transistor, the thin film transistor used in the sensor of the present invention is not limited to the top gate type, Of a thin film transistor.

Example

For each of the oxide semiconductor thin films, samples of Examples and Comparative Examples were prepared and electrical characteristics were measured. In addition, examples of the thin film transistor provided with the oxide semiconductor thin film of the composition range of the present invention were fabricated, and the TFT characteristics were evaluated.

<Verification test 1: In-situ electrical measurement of the IGZO film changed in In-Ga ratio>

The following samples were prepared and evaluated for the relationship between the annealing temperature and electrical characteristics of the IGZO film having different In and Ga composition ratios.

As a sample for electrical resistance measurement, an IGZO film of a predetermined size was formed on a substrate under the conditions of each of the following examples and comparative examples, and an electrode was formed thereon.

A method of manufacturing a sample for measuring electrical resistance will be described with reference to Figs. 6 and 7. Fig. 6 and 7, (A) is a plan view and (B) is a cross-sectional view.

A synthetic quartz glass substrate (product number: T-4040, manufactured by Covalent Matrix Co., Ltd., 1 inch x 1 mmt) was used as the substrate 100, and an oxide semiconductor thin film 101 was formed on the substrate 100 Sputtering was performed under the conditions of each of the Examples and Comparative Examples. 6, an oxide semiconductor thin film 101 having a pattern of 3 mm x 9 mm was formed on a 1 inch square substrate 100 using a metal mask at the time of film formation.

The film formation was carried out by co-sputtering using In ₂ O ₃ target, Ga ₂ O ₃ target and ZnO target, and the composition ratio was adjusted by changing the electric power ratio applied to each target.

The electrode 102 was formed on the obtained oxide semiconductor thin film 101 by sputtering. The electrode 102 is made of a laminated film of Ti and Au. On the oxide semiconductor thin film 101, 10 nm of Ti was deposited, and then 40 nm of Au was deposited. Also in the electrode film formation, patterning was performed using a metal mask to form a four-terminal electrode (see Fig. 7).

(Example 1)

As Example 1, an IGZO film was formed as an oxide semiconductor thin film under the following sputter deposition conditions.

Cation composition ratio In: Ga: Zn = 0.2: 1.8: 1.0

Film thickness 50 nm

The degree of vacuum reached the deposition chamber was 6 × 10 ^-6 Pa

When the film formation pressure 4.4 × 10 ^-1 ㎩

Ar flow rate 30 sccm

O ₂ flow rate 0 sccm

As Example 2 and Comparative Examples 1 to 4, an IGZO film having a different cation composition ratio from that of Example 1 was produced. Also, since the initial resistivity of the film is changed when the cationic composition ratio is changed, it is difficult to compare the amount of the carrier, so the oxygen flow rate at the time of film formation is adjusted so that the initial resistivity of the film is in the range of 10 ⁺² to 10 ⁺ . Here, the initial resistivity (initial value) is the resistivity at room temperature (20 캜) before the heat treatment. The cation composition ratio and the oxygen flow rate (O ₂ flow rate) as the film forming conditions of the respective Examples and Comparative Examples are shown below. As described above, the film formation is carried out by co-sputtering using an In ₂ O ₃ target, a Ga ₂ O ₃ target, and a ZnO target, and the electric power ratio applied to each target is varied Respectively. The other conditions were the same as those of Example 1.

(Example 2)

Conditions for forming the oxide semiconductor thin film in Example 2 are as follows.

Cation composition ratio In: Ga: Zn = 0.4: 1.6: 1.0

O ₂ flow rate 0 sccm

(Comparative Example 1)

Conditions for forming the oxide semiconductor thin film in Comparative Example 1 are as follows.

Cation composition ratio In: Ga: Zn = 0.5: 1.5: 1.0

O ₂ flow rate 0 sccm

(Comparative Example 2)

Conditions for forming the oxide semiconductor thin film in Comparative Example 2 are as follows.

Cation composition ratio In: Ga: Zn = 0.8: 1.2: 1.0

O ₂ flow rate 0.1 sccm

(Comparative Example 3)

The film formation conditions of the oxide semiconductor thin film in Comparative Example 3 are as follows.

Cation composition ratio In: Ga: Zn = 1.0: 1.0: 1.0

O ₂ flow rate 0.15 sccm

(Comparative Example 4)

The film formation conditions of the oxide semiconductor thin film in Comparative Example 4 are as follows.

Cation composition ratio In: Ga: Zn = 1.5: 0.5: 1.0

O ₂ flow rate 0.45 sccm

<Measurement of temperature change of resistivity>

The six kinds of samples (Examples 1 and 2 and Comparative Examples 1 to 4) were set in an apparatus capable of controlling the atmosphere and capable of measuring electric resistance while being subjected to heat treatment, Change was measured. The atmosphere in the chamber was Ar 160 sccm and O ₂ 40 sccm, and the temperature was raised to 200 占 폚 at 10 占 폚 / min, held at 200 占 폚 for 10 minutes, and then cooled to room temperature by furnace cooling.

Fig. 8 shows the relationship between the temperature and the resistivity in Examples 1 and 2 and Comparative Examples 1 to 4 in the heating and cooling process.

In Examples 1 and 2 in which the Ga composition ratio is relatively high, the resistivity of the film after the temperature increase / decrease process is close to the initial value (when the resistivity before the heat treatment process is ρ _a and the resistivity after the heat treatment process is ρ _b , 0.1ρ _a ≤ ρ _b ≤ 10ρ _a ). On the other hand, for Comparative Examples 1, 2, 3 and 4 in which the In composition ratio is relatively large, rapid resistance is generated during the temperature raising process, , The resistivity did not increase and it was confirmed that the resistivity was returned while maintaining a resistivity at 200 캜.

In the case of producing a semiconductor thin film having a large area, it is difficult to maintain the temperature uniformly in the surface, and temperature unevenness generally occurs in the surface at the time of annealing. As in Comparative Examples 1 to 4, in the case where the resistivity is changed with temperature rise and the resistivity at the reaching temperature (here, 200 占 폚) is substantially maintained even after the temperature is lowered, The irregularity of the resistivity, that is, the irregularity of the electric characteristics, occurs. On the other hand, in the case where there is little history of the resistivity in the heating and cooling process as in Examples 1 and 2, even if temperature unevenness occurs in the surface at the time of annealing, It is possible to obtain a semiconductor thin film having high in-plane uniformity. In addition, a method of uniformly maintaining the temperature in the surface by preparing a special apparatus such as using a large heater according to the size of the semiconductor thin film is also conceivable, but the apparatus cost is very high. On the other hand, if a semiconductor thin film having high in-plane uniformity can be obtained even if some temperature unevenness occurs as in Examples 1 and 2, it is not necessary to prepare a special apparatus, and the increase in cost can be suppressed.

<Verification test 2: Analysis of temperature elevation degassing of IGZO film>

In the process of heat-treating the IGZO film having different In-Ga composition ratios, evaluation of the difference in the gas to be desorbed was performed using the temperature-rising desalination gas analyzer. In other words, an experiment was conducted to find out where the factors of the electric characteristics at the post annealing differ depending on the composition ratio.

The composition ratio of In: Ga: Zn = 1.5: 0.5: 1.0 (corresponding to Comparative Example 4), In: Ga: Zn = 0.5: 1.5: Phosphorus oxide semiconductor thin films were each formed on a Si substrate to have a thickness of 100 nm. The temperature of the stage was elevated from room temperature to 800 DEG C at a temperature rise rate of 1 DEG C / sec, and the difference of the desorbed gas at that time was evaluated for each sample using a temperature elevation desorption gas analyzer EMD-WA1000S manufactured by Electronic Science Co., Respectively.

As a result of evaluating the desorbed gas having a mass of M / z = 2 to 199, it was found that the difference in the amount of desorbed gas was M / z = 18 (H ₂ O) and 17 (OH) lost.

9 is a graph showing changes in the amount of desorbed gas at the time of temperature rise relative to M / z = 18 (H ₂ O) for each sample.

As can be seen from the graph of FIG. 9, it was confirmed that the amount of moisture (H ₂ O) released from the sample was smaller in the sample having a high Ga composition ratio. The same phenomenon was confirmed for M / z = 17 (OH).

From the above results, it can be considered that the difference in the trend in the heat treatment process shown in Fig. 8 is a factor of occurrence of carriers accompanying the desorption of water from the inside of the film. In the sample having a high Ga composition ratio, since the water content in the film is originally small, the amount of water in the heat treatment is small and the amount of the carrier in the film does not greatly change. Thus, the resistivity of the film after the heat treatment process is almost unchanged to the initial value On the other hand, in a sample having a high In composition ratio, since a large amount of moisture is contained in the film, a large amount of water is eliminated in the heat treatment process and a large amount of carriers are generated, It is presumed that even if it is cooled to room temperature, it remains low resistance.

<Verification experiment 3: Measurement of in-situ electrical characteristics of IGZO films having different Zn composition ratios>

Next, the relationship between the post annealing temperature and the electrical characteristics of the IGZO film having different Zn composition ratios was made in the same manner as the verification experiment 1, and the electrical resistance measurement samples were prepared and the temperature change of the resistivity was measured.

IGZO films were prepared under the sputter conditions of Example 3 and Comparative Examples 5 and 6 as samples for electrical resistance measurement.

The conditions not described in the sputter conditions of each of the examples and comparative examples were the same as those of the sample for electrical resistance measurement according to Example 1, and the method and conditions for measuring the temperature change of the resistivity were the same as those in the verification test 1.

(Example 3)

Conditions for forming the oxide semiconductor thin film in Example 3 are as follows.

Cation composition ratio In: Ga: Zn = 0.2: 1.8: 0.5

O ₂ flow rate 0 sccm

(Comparative Example 5)

The film formation conditions of the oxide semiconductor thin film in Comparative Example 5 are as follows.

Cation composition ratio In: Ga: Zn = 0.2: 1.8: 2.0

O ₂ flow rate 0.03 sccm

(Comparative Example 6)

The film formation conditions of the oxide semiconductor thin film in Comparative Example 6 are as follows.

Cation composition ratio In: Ga: Zn = 0.2: 1.8: 3.5

O ₂ flow rate 0.1 sccm

The samples (Example 3, Comparative Examples 5 and 6) were subjected to measurement of the change in resistivity during the heating and cooling processes. The measuring apparatus and the measurement conditions were the same as in the verification test 1.

10 is a graph showing the relationship between the temperature and the resistivity in Example 3 and Comparative Examples 5 and 6 in the temperature rising and falling conditions. FIG. 10 also shows the data of the first embodiment for comparison.

The resistivity of the film was found to return to the initial value after the temperature rise and decline steps in the same manner as in Example 1 for Comparative Example 3 where the Zn composition ratio was relatively low. On the other hand, for Comparative Examples 5 and 6 in which the Zn composition ratio was relatively high, In the same manner as in Comparative Examples 1 to 4, the resistance was rapidly reduced during the temperature raising process, and thereafter, the resistivity did not return to the resistance value during the raising process.

It is easy to imagine that the difference in the electric characteristic trends is caused by the difference in the moisture content among the above-mentioned films, that is, the IGZO film having a high Zn composition ratio is easy to suck moisture into the film, Can be considered to be degraded.

<Verification test 4: In-situ electrical measurement of IGZO film having different oxygen flow rates at the time of film formation>

As for the relationship between the annealing temperature and the electrical characteristics when the oxygen flow rate at the time of film formation of the IGZO film was different, a sample for electrical resistance measurement was prepared in the same manner as in the verification test 1, and the temperature change of the resistivity was measured.

IGZO films were prepared under the sputter conditions of Example 4 and Comparative Examples 7, 8 and 9 as samples for electrical resistance measurement.

The conditions not described in the sputter conditions of each of the examples and comparative examples were the same as those of the sample for electrical resistance measurement according to Example 1, and the method and conditions for measuring the temperature change of the resistivity were the same as those in the verification test 1.

(Example 4)

Conditions for forming the oxide semiconductor thin film in Example 4 are as follows.

Example 4 is the same cation composition ratio as in Example 1, and only the oxygen flow rate at the time of film formation is different.

Cation composition ratio In: Ga: Zn = 0.2: 1.8: 1.0

O ₂ flow rate 0.03 sccm

(Comparative Example 7)

The conditions for forming the oxide semiconductor thin film in Comparative Example 7 are as follows.

Comparative Example 7 is the same cation composition ratio as that of Comparative Example 3, and only the oxygen flow rate at the time of film formation is different.

Cation composition ratio In: Ga: Zn = 1.0: 1.0: 1.0

O ₂ flow rate 0.1 sccm

(Comparative Example 8)

The film formation conditions of the oxide semiconductor thin film in Comparative Example 8 are as follows.

Comparative Example 8 is the same cation composition ratio as Comparative Examples 3 and 7, and only the oxygen flow rate at the time of film formation is different.

Cation composition ratio In: Ga: Zn = 1.0: 1.0: 1.0

O ₂ flow rate 0.2 sccm

(Comparative Example 9)

The film formation conditions of the oxide semiconductor thin film in Comparative Example 9 are as follows.

Comparative Example 9 is the same cation composition ratio as Comparative Examples 3, 7, and 8, and differs only in the oxygen flow rate at the time of film formation.

Cation composition ratio In: Ga: Zn = 1.0: 1.0: 1.0

O ₂ flow rate 0.3 sccm

The samples (Example 4 and Comparative Examples 7 to 9) were subjected to measurement of change in resistivity during the heating and cooling process. The measuring apparatus and the measurement conditions were the same as in the verification test 1.

11 is a graph showing the relationship between the temperature and the resistivity in Example 4 and Comparative Examples 7 to 9 in the temperature rising and falling conditions. 11 shows data of Example 1 and Comparative Example 3 for comparison.

It was confirmed that the resistivity of the film was returned to the initial value after the temperature raising and lowering process in the same manner as in Example 1 while the comparative example 7, 8, and 9, which had a relatively large In composition ratio, 3, the resistivity was not increased even during the temperature lowering process, and it was confirmed that the temperature was returned while maintaining the value at 200 ° C.

From these results, it was found that the sample showing the tendency of returning to the initial resistance by the temperature lowering and lowering process and the sample not shown are determined by the cation composition and are not determined by the oxygen flow rate at the time of film formation. In other words, this result means that the moisture content in the film is determined by the composition ratio without depending on the oxygen flow rate at the time of film formation.

<Verification test 5: In-situ electrical measurement of IGZO film having different In, Ga, and Zn composition ratios>

A sample for electrical resistance measurement was prepared in the same manner as the verification test 1 and the temperature change of the resistivity was measured for the relationship between the post annealing temperature and the electrical characteristics of the IGZO film having different In, Ga, and Zn composition ratios.

IGZO films were prepared under the sputter conditions of Examples 5 and 6 below as samples for electrical resistance measurement.

The conditions not described in the sputter conditions of each of the examples and comparative examples were the same as those of the sample for electrical resistance measurement according to Example 1, and the method and conditions for measuring the temperature change of the resistivity were the same as those in the verification test 1.

(Example 5)

Conditions for forming the oxide semiconductor thin film in Example 5 are as follows.

Cation composition ratio In: Ga: Zn = 0.2: 1.8: 0.2

O ₂ flow rate 0 sccm

(Example 6)

Conditions for forming the oxide semiconductor thin film in Example 6 are as follows.

Cation composition ratio In: Ga: Zn = 0.4: 1.6: 0.4

O ₂ flow rate 0 sccm

The samples (Examples 5 and 6) were subjected to measurement of change in resistivity during the temperature rise and fall temperature. The measuring apparatus and the measurement conditions were the same as in the verification test 1.

12 is a graph showing the relationship between the temperature and the resistivity in the heating and cooling processes of Examples 5 and 6. FIG. It was confirmed that the resistivity of the film was returned to the initial value after the temperature increase and the temperature decrease process in Examples 5 and 6.

The cation composition ratio in each of the examples and comparative examples in the above Verification Experiments 1 to 5 indicates the composition ratio of the film after film formation. The composition ratio of the film after the film formation was evaluated using a fluorescent X-ray analyzer (Axios, manufactured by Pneumatic). As a result of the X-ray diffraction measurement, no peak showing a crystal structure was observed in any of the examples, and all of them were amorphous.

<Verification test 6: Evaluation of TFT characteristics>

TFTs (Example TFTs 1 to 3) using an IGZO film having a large Ga composition ratio were fabricated and their characteristics were evaluated.

A simple type TFT using a p-type Si substrate with a thermal oxide film as a substrate and using a thermal oxide film as a gate insulating film was fabricated. FIG. 13A is a plan view of a simple type TFT, and FIG. 13B is a sectional view.

(Example TFT 1)

The simple TFT of Example TFT 1 was fabricated as follows (see Fig. 13).

On the p-type Si 1 inch? Substrate 110 having the 100 nm thermal oxide film 111 on the surface thereof, the IGZO film 112 was patterned to form 50 nm and 3 mm x 4 mm patterns under the film forming conditions of Example 1 Respectively. Subsequently, post annealing was performed in an electric furnace capable of controlling the atmosphere. The post anneal atmosphere was set to Ar 160 sccm and O ₂ 40 sccm, and the temperature was raised to 200 ° C at 10 ° C / min, held at 200 ° C for 10 minutes,

Thereafter, source / drain electrodes 113 were formed on the IGZO film 112 by sputtering. The source and drain electrode films were formed by patterning using a metal mask. After forming a film of 10 nm of Ti, a film of Au having a thickness of 40 nm was used as the source / drain electrode 113. The source and drain electrode sizes were each 1 mm and the interelectrode distance was 0.2 mm.

(Example TFT 2)

A TFT was fabricated in the same manner as in Example TFT 1 except that the IGZO film was formed under the film formation conditions of Example 2. [

(Example TFT 3)

A TFT was fabricated in the same manner as in Example TFT 1 except that the IGZO film was formed under the film formation conditions of Example 8. [

The transistor characteristics (V _g -I _d characteristics) and the mobility (μ) of the simple TFTs of the example TFTs 1 to 3 thus obtained were measured using a semiconductor parameter analyzer 4156C (manufactured by Agilent Technologies) .

The V _g -I _d characteristic was measured by fixing the drain voltage V _d to 5 V and varying the gate voltage V _g within the range of -15 V to +40 V, _g was measured by measuring the drain current I _d .

Figs. 14, 15 and 16 show V _g -I _d characteristics of the TFTs 1, 2 and 3, respectively.

All off current is 10 ^-10 A order, and the On / Off ratio is ~ 10 ⁶ , and it was driven in the normally off type. In addition, all of the field effect mobilities were not less than 3 cm 2 / Vs and exhibited good transistor characteristics with low temperature formation and sufficiently high mobility compared to amorphous silicon.

17 is a plot of the composition ratios of the IGZO films of Examples 1 to 6 and Comparative Examples 1 to 9 in a three-state state diagram. In the three-state diagram, the composition ranges specified in the present invention and the composition ranges defined for the respective patent documents 1 to 4 that specify the composition ratio of the IGZO reported so far are also shown. In FIG. 17, the composition range of the IGZO film of the present invention is represented by region A, and the preferable composition range thereof is represented by region B. The composition range of the IGZO film described in Patent Document 1 is region C, the composition range of the IGZO film described in Patent Document 2 is region D, the composition range of the IGZO film described in Patent Document 3 is region E, Patent Document 4 And the composition range of the IGZO film described in Fig.

In each of Patent Documents 1 to 4, various composition ranges are reported from the viewpoints of mobility, S value, and light irradiation characteristics when used as a TFT. However, the stability of electric characteristics at the time of post annealing, There is no report to examine the optimum composition for the present invention.

As a result of a detailed study by the present inventors, it has been found that an IGZO film having a composition range that has not been reported so far is optimum from the standpoint of stability of electric characteristics. Basically, since the Ga composition ratio is high, that is, the In composition ratio and the Zn composition ratio are low, the water content in the film is reduced and the electrical characteristic variation due to the moisture content variation in the film can be suppressed to be very small. If the Ga composition ratio becomes too high, the insulating film becomes difficult to be used for a transistor. However, since the composition of the present invention exhibits high mobility in addition to the effect of suppressing the moisture content variation in the film, Lt; / RTI &gt;

1, 2, 3, 4: Thin film transistor
11: substrate
12: active layer (oxide semiconductor thin film)
13: source electrode
14: drain electrode
15: Gate insulating film
16: gate electrode

Claims (10)

(In + Ga + Zn) &lt; / = 1/3 and Ga / (In + Ga + Zn) &lt; 9/11, 4/5? Ga / (In + Ga)? 9/10, and In / (In + Zn)? 2/7. delete The method according to claim 1,
Wherein the oxide semiconductor thin film is amorphous. The method according to claim 1,
Wherein the resistivity is 1 cm or more and 1 x 10 &lt; ⁶ &gt; cm or less. A thin film transistor having an active layer, a source electrode, a drain electrode, a gate insulating film and a gate electrode on a substrate,
Wherein the active layer is made of the oxide semiconductor thin film according to any one of claims 1, 3 and 4. 6. The method of claim 5,
Wherein the substrate has flexibility. The method according to claim 6,
Wherein the substrate is a resin substrate. A display device comprising the thin film transistor according to claim 5. An image sensor comprising the thin film transistor according to claim 5. An X-ray sensor comprising the thin film transistor according to claim 5.

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