KR101862603B1 - Light emitting display device - Google Patents

Abstract

The present invention relates to a light emitting display device capable of improving image quality by minimizing a current drivability deviation between drive switching elements for each pixel, and more particularly, to a light emitting display device including a plurality of pixels for displaying an image; Each pixel being controlled in accordance with a scan signal from a scan line and being connected between a data line and a first node; A reference switching element connected between a reference power supply line for transmitting a reference voltage and the first node, the reference switching element being controlled according to a sensing signal from the sensing line; A light emission control switching element controlled in accordance with a light emission control signal from the light emission control line and connected between the first node and the second node; A driving switching element controlled between a voltage of the second node and connected between a first driving power supply line and a third node for transmitting a first driving power supply; An initial switching element controlled in accordance with an initialization signal from an initialization line and connected between the third node and an initial power supply line for transmitting an initial voltage; A first storage capacitor connected between the first node and the third node; A second storage capacitor connected between the first node and the second node; And a light emitting diode having an anode electrode connected to the third node and a cathode electrode connected to a second driving power supply line for transmitting a second driving power supply; Wherein the scan signal, the initialization signal, the emission control signal, and the sensing signal change to an active state or an inactive state based on sequentially generated initialization period, threshold voltage detection period, data writing period, and light emission period; During the initialization period, the initialization signal, the sensing signal, and the emission control signal are kept active, while the scan signal is kept inactive; The initialization signal, the scan signal, and the emission control signal remain inactive while the sense signal remains active during the threshold voltage detection period; The scan signal remains active during the data write period, while the initialization signal, the sense signal, and the emission control signal remain inactive; A data signal is supplied to the data line during the data writing period; During the light emission period, the emission control signal sequentially has an active state and an inactive state, while the scan signal, the initialization signal, and the sense signal are kept inactive.

Description

[0001] LIGHT EMITTING DISPLAY DEVICE [0002]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light emitting display device, and more particularly, to a light emitting display device capable of improving image quality by minimizing a current drivability deviation between drive switching elements for respective pixels.

The pixels of the light emitting display include a drive switching element which is a constant current element. The current drive capability of these drive switching elements is greatly affected by their threshold voltages.

Therefore, it is an important factor in improving the picture quality of the display device to correct the current drivability deviation between the pixel-by-pixel driving switching elements.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a light emitting display device capable of improving the image quality of a display device by reducing a current drivability deviation between the driving switching devices.

According to an aspect of the present invention, there is provided a light emitting display including a plurality of pixels for displaying an image; Each pixel being controlled in accordance with a scan signal from a scan line and being connected between a data line and a first node; A reference switching element connected between a reference power supply line for transmitting a reference voltage and the first node, the reference switching element being controlled according to a sensing signal from the sensing line; A light emission control switching element controlled in accordance with a light emission control signal from the light emission control line and connected between the first node and the second node; A driving switching element controlled between a voltage of the second node and connected between a first driving power supply line and a third node for transmitting a first driving power supply; An initial switching element controlled in accordance with an initialization signal from an initialization line and connected between the third node and an initial power supply line for transmitting an initial voltage; A first storage capacitor connected between the first node and the third node; A second storage capacitor connected between the first node and the second node; And a light emitting diode having an anode electrode connected to the third node and a cathode electrode connected to a second driving power supply line for transmitting a second driving power supply; Wherein the scan signal, the initialization signal, the emission control signal, and the sensing signal change to an active state or an inactive state based on sequentially generated initialization period, threshold voltage detection period, data writing period, and light emission period; During the initialization period, the initialization signal, the sensing signal, and the emission control signal are kept active, while the scan signal is kept inactive; The initialization signal, the scan signal, and the emission control signal remain inactive while the sense signal remains active during the threshold voltage detection period; The scan signal remains active during the data write period, while the initialization signal, the sense signal, and the emission control signal remain inactive; A data signal is supplied to the data line during the data writing period; During the light emission period, the emission control signal has an active state and an inactive state sequentially, or is maintained in an active state, while the scan signal, the initialization signal, and the detection signal are kept inactive.

The pulse width of the scan signal in the active state is equal to the pulse width of the initialization signal in the active state; The pth (p is a natural number) pixel and the p + xth (x is a natural number) pixel are located on different pixel rows; A scan signal supplied to the p-th pixel and a scan signal supplied to the p + x-th pixel are different in phase from each other; A scan signal supplied to the p-th pixel and an initialization signal supplied to the p + x-th pixel are the same in phase; And a scan line connected to the data switching element of the pth pixel and a sense line connected to the emission control switching element of the p + xth pixel are connected to each other.

According to another aspect of the present invention, there is provided a light emitting display including a plurality of pixels for displaying an image; Each pixel being controlled in accordance with a scan signal from a scan line and being connected between a data line and a first node; A first reference switching element connected between a reference power supply line for transmitting a reference voltage and the first node, the first reference switching element being controlled according to a sensing signal from the sensing line; A second reference switching element controlled in accordance with an initialization signal from an initialization line, the second reference switching element being connected between the reference power supply line and a second node; A light emission control switching element controlled in accordance with a light emission control signal from the light emission control line and connected between the first node and the second node; A driving switching element controlled between a voltage of the second node and connected between a first driving power supply line and a third node for transmitting a first driving power supply; An initial switching device controlled in accordance with an initialization signal from the initialization line and connected between the third node and an initial power supply line for transmitting an initial voltage; A first storage capacitor connected between the first node and the third node; A second storage capacitor connected between the first node and the second node; And a light emitting diode having an anode electrode connected to the third node and a cathode electrode connected to a second driving power supply line for transmitting a second driving power supply; Wherein the scan signal, the initialization signal, the emission control signal, and the sensing signal change to an active state or an inactive state based on sequentially generated initialization period, threshold voltage detection period, data writing period, and light emission period; During the initialization period, the initialization signal and the sense signal are kept active, while the scan signal and the emission control signal are kept inactive. The initialization signal, the scan signal, and the emission control signal remain inactive while the sense signal remains active during the threshold voltage detection period; The scan signal remains active during the data write period, while the initialization signal, the sense signal, and the emission control signal remain inactive; A data signal is supplied to the data line during the data writing period; During the light emission period, the emission control signal has an active state and an inactive state sequentially, or is maintained in an active state, while the scan signal, the initialization signal, and the detection signal are kept inactive.

The pulse width of the light emission control signal in the active state is equal to the pulse width of the detection signal in the active state; the pth (p is a natural number) pixel and the (p + x) th (x is a natural number) pixel are located on different pixel rows; A scan signal supplied to the p-th pixel and a scan signal supplied to the p + x-th pixel are different in phase from each other; The emission control signal supplied to the p-th pixel and the detection signal supplied to the p + x-th pixel are the same in phase; A light emission control line connected to the light emission control switching element of the pth pixel and a sensing line connected to the sensing switching element of the p + xth pixel are connected to each other.

Each of the pixels being controlled according to the scan signal, and a third reference switching element connected between the reference power line and the second node.

And a gate-source capacitor connected between the second node and the third node.

The initial voltage is smaller than the reference voltage, the reference voltage is smaller than the second driving voltage, and the second driving voltage is smaller than the first driving voltage.

According to another aspect of the present invention, there is provided a light emitting display including a plurality of pixels for displaying an image; Each pixel being controlled in accordance with a scan signal from a scan line and being connected between a data line and a first node; A reference switching element connected between a reference power supply line for transmitting a reference voltage and the first node, the reference switching element being controlled according to a sensing signal from the sensing line; A light emission control switching element controlled in accordance with a light emission control signal from the light emission control line and connected between the first node and the second node; A driving switching element controlled in accordance with the voltage of the second node and connected between the cathode electrode of the light emitting diode and the third node; An initial switching element controlled in accordance with an initialization signal from an initialization line and connected between the third node and an initial power supply line for transmitting an initial voltage; A first storage capacitor connected between the first node and the third node; And a second storage capacitor connected between the first node and the second node; An anode electrode of the light emitting diode is connected to the first driving power supply line; Wherein the scan signal, the initialization signal, the emission control signal, and the sensing signal change to an active state or an inactive state based on sequentially generated initialization period, threshold voltage detection period, data writing period, and light emission period; During the initialization period, the initialization signal, the sensing signal, and the emission control signal are kept active, while the scan signal is kept inactive; The initialization signal, the scan signal, and the emission control signal remain inactive while the sense signal remains active during the threshold voltage detection period; The scan signal remains active during the data write period, while the initialization signal, the sense signal, and the emission control signal remain inactive; A data signal is supplied to the data line during the data writing period; During the light emission period, the emission control signal has an active state and an inactive state sequentially, or is maintained in an active state, while the scan signal, the initialization signal, and the detection signal are kept inactive.

According to another aspect of the present invention, there is provided a light emitting display including a plurality of pixels for displaying an image; Each pixel being controlled in accordance with a scan signal from a scan line and being connected between a data line and a first node;

A first reference switching element connected between a reference power supply line for transmitting a reference voltage and the first node, the first reference switching element being controlled according to a sensing signal from the sensing line; A second reference switching element controlled in accordance with an initialization signal from an initialization line, the second reference switching element being connected between the reference power supply line and a second node; A light emission control switching element controlled in accordance with a light emission control signal from the light emission control line and connected between the first node and the second node; A driving switching element controlled in accordance with the voltage of the second node and connected between the cathode electrode of the light emitting diode and the third node; An initial switching device controlled in accordance with an initialization signal from the initialization line and connected between the third node and an initial power supply line for transmitting an initial voltage; A first storage capacitor connected between the first node and the third node; And a second storage capacitor connected between the first node and the second node; An anode electrode of the light emitting diode is connected to the first driving power supply line; Wherein the scan signal, the initialization signal, the emission control signal, and the sensing signal change to an active state or an inactive state based on sequentially generated initialization period, threshold voltage detection period, data writing period, and light emission period; During the initialization period, the initialization signal and the sense signal are kept active, while the scan signal and the emission control signal are kept inactive. The initialization signal, the scan signal, and the emission control signal remain inactive while the sense signal remains active during the threshold voltage detection period; The scan signal remains active during the data write period, while the initialization signal, the sense signal, and the emission control signal remain inactive; A data signal is supplied to the data line during the data writing period; During the light emission period, the emission control signal has an active state and an inactive state sequentially, or is maintained in an active state, while the scan signal, the initialization signal, and the detection signal are kept inactive.

Each of the pixels further includes a third reference switching element controlled in accordance with the scan signal and connected between the reference power line and the second node.

Wherein the data switching element, the reference switching element, the emission control switching element, the driving switching element, and the initial switching element are both composed of an n-type transistor and a p-type transistor.

The data switching element, the first reference switching element, the second reference switching element, the emission control switching element, the driving switching element, and the initial switching element are all formed of an n-type transistor or a p-type transistor.

The data switching element, the first reference switching element, the second reference switching element, the third reference switching element, the light emission control switching element, the driving switching element, and the initial switching element are all formed of either an n-type transistor or a p- .

The light emitting display device according to the present invention has the following effects.

First, since the number of parasitic capacitors of each switching element seen from the first to third nodes is small, the amount of charge lost by these parasitic capacitors is small. Therefore, the compensating period of the threshold voltage is improved, and the compensating rate of the threshold voltage is high and the compensating range of the threshold voltage is also large.

Second, since the current generated by the first driving voltage in the initialization period is synchronized with the initial voltage source from the driving switching device, the threshold voltage compensation capability is excellent even when the threshold voltage of the driving switching device is less than zero.

Thirdly, a compensating pixel in the normally off state because the sensing switching element is located at the next stage of the light emission control switching element in the light emitting period. Therefore, the reliability of the data switching element can be increased.

Fourth, since the first and second nodes or the first to third nodes are initialized simultaneously with the constant voltage in the initialization period, the initialization timing problem between these nodes can be eliminated. Therefore, it is a structure suitable for mass production.

Fifth, during the data writing period in which the data signal is applied to the first node, the constant voltage, that is, the reference voltage is supplied to the second node, thereby eliminating the gradation influence due to the data signal. Accordingly, the deviation between the threshold voltages of the pixel-by-pixel driving switching elements can be reduced.

1 is a view illustrating a light emitting display device according to an embodiment of the present invention.
2 is a diagram showing a circuit configuration of a pixel according to the first embodiment of the present invention;
3 is a timing chart of scan signals, initialization signals, emission control signals, and sense signals supplied to the pixels of FIG. 2
FIG. 4 is a timing chart of applied signals for respective pixels when the signals of FIG. 3 are supplied to a plurality of vertically arranged pixels
5 is a timing chart of a set of signals supplied to an n-th pixel and a set of signals supplied to an (n + x) -th pixel;
6A to 6D are diagrams for explaining the operation of the pixel according to the first embodiment of the present invention;
7 is a diagram showing a circuit configuration of a pixel according to a second embodiment of the present invention;
8 is a timing chart of scan signals, initialization signals, emission control signals, and sense signals supplied to the pixels in FIG. 7;
FIG. 9 is a timing chart of applied signals for each pixel when the signals of FIG. 8 are supplied to a plurality of vertically arranged pixels; FIG.
10 is a timing diagram showing a timing diagram between a set of signals supplied to the n-th pixel and a set of signals supplied to the (n + x) -th pixel
11A to 11D are diagrams for explaining the operation of the pixel according to the second embodiment of the present invention
12 is a diagram showing a circuit configuration of a pixel according to the third embodiment of the present invention
13A to 13D are diagrams for explaining the operation of the pixel according to the third embodiment of the present invention
14 is a diagram showing a circuit configuration of a pixel according to a fourth embodiment of the present invention;
FIG. 15 is a timing chart of scan signals, initialization signals, emission control signals, and sense signals supplied to the pixels in FIG. 14; FIG.
16 is a diagram showing a circuit configuration of a pixel according to a fifth embodiment of the present invention;
FIG. 17 is a timing chart of the scan signal, the initialization signal, the emission control signal, and the detection signal supplied to the pixel of FIG. 16
18 is a diagram showing a circuit configuration of a pixel according to the sixth embodiment of the present invention;
19 is a view for explaining a compensating effect of a threshold voltage for each gradation of a driving switching element provided in a pixel according to an embodiment of the present invention;
20 is a graph showing a voltage drop of a first drive voltage and a current change due to a voltage rise of a second drive voltage in a display unit having pixels of the present invention

1 is a view illustrating a light emitting display according to an embodiment of the present invention.

1, a light emitting display according to an exemplary embodiment of the present invention includes a display unit DSP, a system SYS, a control driver CD, a data driver DD, a timing controller TC, (PS).

The display unit DSP includes a plurality of pixels PXL, a plurality of scan lines SL1 to SLi for transmitting a plurality of scan signals for sequentially driving the pixels PXL on a horizontal line basis, Lines DL1 to DLj, and power supply lines. On the other hand, although not shown, the display unit DSP further includes a plurality of initialization lines, emission control lines and sense lines. Here, the number of scan lines, the number of initialization lines, the number of emission control lines, and the number of sense lines may be the same.

These pixels PXL are arranged in a matrix on the display unit DSP. The pixels PXL are divided into a red pixel PXL for displaying red, a green pixel PXL for displaying green, and a blue pixel PXL for displaying blue.

The system SYS outputs a vertical synchronizing signal, a horizontal synchronizing signal, a clock signal, and image data through an interface circuit through a Low Voltage Differential Signaling (LVDS) transmitter of a graphic controller. The vertical / horizontal synchronizing signal and the clock signal output from the system SYS are supplied to the timing controller TC. In addition, the image data sequentially output from the system SYS is supplied to the timing controller TC.

The timing controller TC generates a data control signal, a scan control signal, and a light emission control signal by using a horizontal synchronizing signal, a vertical synchronizing signal, and a clock signal input to the timing controller TC, Supply.

The data driver DD samples the image data according to the data control signal from the timing controller TC and then outputs the sampling image corresponding to one horizontal line per horizontal period (1H, 2H, ...) Latches the data and supplies the latched image data to the data lines DL1 to DLj. That is, the data driver DD converts the video data from the timing controller TC into an analog pixel signal (data signal) by using the gamma voltage inputted from the power supply unit PS and supplies the converted video data to the data lines DL1 to DLj Supply.

The control driver CD outputs scan pulses, initialization signals, emission control signals, and sense signals in accordance with a control signal from the timing controller TC. At this time, the control driver sequentially outputs i scan signals from the first scan signal to the i < th > scan signal every frame, and sequentially outputs i initialization signals from the first initialization signal to the i < th & Sequentially outputs i emission control signals from the first emission control signal to the i < th > emission control signal every frame, and sequentially outputs i detection signals from the first detection signal to the i < th > .

The power supply unit PS generates a gamma voltage, a first driving voltage VDD, a second driving voltage VSS, a reference voltage Vref, and an initial voltage Vinit necessary for driving the pixel PXL. At this time, the initial voltage Vinit is smaller than the reference voltage Vref, the reference voltage Vref is smaller than the second driving voltage VSS, and the second driving voltage VSS is the first driving voltage VDD . For example, the first driving voltage VDD may be a constant voltage of about 10 V or more, the second driving voltage VSS may be a constant voltage of 0 [V], and the reference voltage Vref may be about The initial voltage Vinit may be a constant voltage having a magnitude of -2 [V] to 0 [V], and the initial voltage Vinit may be a constant voltage having a magnitude of -7 [V] to -6 [V]. Since the first driving voltage VDD is determined in consideration of the threshold voltage Vth of the light emitting diode OLED, the first driving voltage VDD is changed according to the threshold voltage of the light emitting diode OLED used in the circuit.

1st Example

Fig. 2 is a circuit diagram of a pixel according to the first embodiment of the present invention. Fig. 2 is a diagram showing a circuit configuration provided in any one pixel PXL of Fig. 1. In Fig.

One pixel PXL includes a data switching element Tr_DS, a reference switching element Tr_RE, an emission control switching element Tr_EC, a driving switching element Tr_DR, an initial switching element Tr_IT ), A first storage capacitor Cst, a second storage capacitor Cem, a gate-source capacitor Cgss, and a light emitting diode OLED. Here, the data switching element Tr_DS, the reference switching element Tr_RE, the light emission control switching element Tr_EC, the driving switching element Tr_DR, and the initial switching element Tr_IT are all n-type transistors.

The data switching element Tr_DS is controlled according to the scan signal SC from the scan line and is connected between the data line DL and the first node N1.

The reference switching element Tr_RE is controlled according to the sense signal SS from the sense line and is connected between the reference power supply line for transmitting the reference voltage Vref and the first node N1.

The light emission control switching element Tr_EC is controlled in accordance with the light emission control signal EM from the light emission control line and is connected between the first node N1 and the second node N2.

The driving switching element Tr_DR is controlled according to the voltage of the second node N2 and is connected between the first driving power supply line for transmitting the first driving voltage VDD and the third node N3. Here, the first driving power supply line transmits the first driving voltage (VDD) from the first driving power supply.

The initial switching element Tr_IT is controlled according to the initialization signal INT from the initialization line and is connected between the third node N3 and the initial power supply line for transmitting the initial voltage Vinit.

The first storage capacitor Cst is connected between the first node N1 and the third node N3.

The second storage capacitor Cem is connected between the first node N1 and the second node N2.

The gate-source capacitor Cgss is connected between the second node N2 and the third node N3. When the size of the driving switching element Tr_DR is sufficiently large so that the capacitance of the parasitic capacitor formed between the gate electrode and the source electrode of the driving switching element Tr_DR is sufficiently large, this parasitic capacitor replaces this gate-source capacitor Cgss can do. In other words, when the size of the drive switching element Tr_DR is sufficiently large, the gate-source capacitor Cgss can be removed from the circuit of Fig.

The light emitting diode OLED is connected between the third node N3 and the second driving power supply line. At this time, the anode electrode of the light emitting diode OLED is connected to the third node N3, and the cathode electrode is connected to the second driving power supply line. And the second driving power supply line transmits the second driving voltage VSS from the second driving power supply.

FIG. 3 is a timing chart of the scan signal SC, the initialization signal INT, the emission control signal EM, and the sense signal SS supplied to the pixel of FIG.

3, the scan signal SC, the initialization signal INT, the emission control signal EM and the sense signal SS are sequentially generated in an initialization period Ti, a threshold voltage detection period Tth, The data writing period Td, and the light emitting period Te. Here, the active state of a signal means a state of a level at which the switching element can be turned on when the signal is supplied to the switching element. On the other hand, the inactive state of a signal means a state of a level at which the switching element can be turned off when a signal is supplied to the switching element. For example, when the switching element is of the n type, the active state of the signal supplied thereto means a relatively high level voltage. On the other hand, the inactive state means a relatively low-level voltage.

During the initialization period Ti, the initialization signal INT, the sense signal SS, and the emission control signal EM are maintained in the active state. On the other hand, the scan signal SC remains inactive.

During the threshold voltage detection period Tth, the sense signal SS is maintained in the active state. On the other hand, the initialization signal INT, the scan signal SC and the emission control signal EM are kept inactive.

During the data writing period Td, the scan signal SC remains active. At this time, the scan signal SC is not completely maintained in the active state for the entire period of the data write period Td, and is maintained in the active state for a certain period of the data write period Td, as shown in FIG. And remain inactive for the remainder of the period. At this time, the period during which the scan signal SC is maintained in the active state during the data write period Td may be set to be larger than the period during which the scan signal SC remains in the inactive state. On the other hand, the initialization signal INT, the sense signal SS, and the emission control signal EM remain inactive during this data writing period Td. Meanwhile, the data signal Vdata is supplied to the data line DL during the data writing period Td.

During the light emission period Te, the emission control signal EM sequentially has an active state and an inactive state. That is, the emission control signal EM is maintained in the active state at the start of the emission period Te, and then transitions to the inactive state after a certain period of time. At this time, the period during which the emission control signal EM is maintained in the inactive state during the emission period Te is set to be larger than the period during which the emission control signal EM is maintained in the active state. On the other hand, the initialization signal INT, the sense signal SS, and the scan signal SC remain inactive during the light emission period Te.

Meanwhile, as another embodiment, the light emission control signal EM may be maintained in the active state during the light emission period Te.

Meanwhile, the signals of one set shown in FIG. 3 are applied at different timings for the pixels arranged in the vertical direction, which will be described in more detail with reference to FIG.

FIG. 4 is a timing diagram of application signals for each pixel when the signals of FIG. 3 are supplied to a plurality of vertically arranged pixels.

The set of signals IT_n, SS_n, SC_n and EM_n shown in FIG. 4A are signals supplied to the n-th pixel, and the set of signals IT_n + 1, SS_n + 1, SC_n + 1 and EM_n + 1 are signals supplied to the (n + 1) th pixel and the set of signals IT_n + 2, SS_n + SC_n + 2, EM_n + 2) are signals supplied to the (n + 2) th pixel. The nth pixel means any one of j pixels (connected in common to the nth scan line), and the (n + 1) th pixel means any one of j pixels Th scan line), and the (n + 2) -th pixel is any one of j pixels connected in common to the (n + 2) th scan line Quot; pixels ".

As shown in FIG. 4, the scan signals SC_n, SC_n + 1, and SC_n + 2 to be supplied to the respective pixels are sequentially output. More specifically, the scan signal SC_n + 1 supplied to the (n + 1) th pixel is supplied later than the scan signal SC_n supplied to the (n + 1) 1) than the scan signal SC_n + 2 supplied to the (n + 2) -th pixel. Thus, the scan signals SC_n, SC_n + 1, and SC_n + 2 for each pixel are delayed by a pulse width in the active state thereof. Similarly, the other signals, i.e., the initialization signals INT_n, INT_n + 1, INT_n + 2, the emission control signals EM_n, EM_n + 1, EM_n + 2 and the sensing signals SS_n, SS_n + Is also delayed by one pulse width of the scan signal for each pixel.

The output timing of the scan signal supplied to any one of the pixels and the output timing of the initialization signal supplied to any one of the other pixels may coincide with each other as the signals of one set are delayed and outputted every horizontal period In this case, signals of two different types can be commonly output through one line. This will be described in detail with reference to FIG.

5 is a diagram showing a timing diagram between a set of signals supplied to an n-th pixel and a set of signals supplied to an (n + x) -th pixel.

5, when the output timing of the scan signal SC_n supplied to the n-th pixel and the output timing of the initialization signal INT_n + x supplied to the (n + x) -th pixel located further behind the pixel are opposite to each other And the pulse width of the scan signal SC_n in the active state is equal to the pulse width of the initialization signal INT_n + x in the active state. This x is a natural number and can be varied depending on the output timing of the signals. When the output timings of signals of different kinds supplied to two different pixels coincide with each other and their pulse widths are equal to each other, for example, the scan signal SC_n supplied to the n-th pixel and the scan signal SC_n supplied to the The supplied initialization signal INT_n + x can be supplied through the same line. That is, the scan signal SC_n supplied to the n-th pixel is transferred by the n-th scan line and the initialization signal INT_n + x supplied to the (n + x) th pixel is transferred by the (n + x) , The scan signal SC_n and the initialization signal INT_n + x may be transmitted simultaneously using only the nth scan line and the n + x initialization lines. In this case, any one of the unused lines is removed from the circuit, thereby generating a side effect that reduces the size and cost of the circuit.

Hereinafter, the operation of the pixel according to the first embodiment of the present invention will be described in detail with reference to FIGS. 3 and 6A to 6D.

6A to 6D are diagrams for explaining the operation of the pixel according to the first embodiment of the present invention. Here, the switching elements shown by the dotted lines in FIGS. 6A to 6D indicate the turned-off state, and the switching elements surrounded by the circular dotted lines indicate the turned-on state.

1) Initialization period ( Ti )

First, with reference to FIG. 3 and FIG. 6A, let us consider the operation of the pixel PXL in the initialization period Ti.

During the initialization period Ti, as shown in Fig. 3, the initialization signal INT, the sense signal SS, and the emission control signal EM are maintained in the active state. On the other hand, the scan signal SC remains inactive.

6A, an initial switching element Tr_IT receives a reference switching element Tr_RE supplied with an active state detection signal INT and an active state initialization signal INT, And the emission control switching element Tr_EC receiving the emission control signal EM in the active state is turned on. On the other hand, the data switching element Tr_DS supplied with the scan signal SC in an inactive state is turned off.

Then, the reference voltage Vref is supplied to the first node N1 through the turn-on reference switching element Tr_RE. The reference voltage Vref is also supplied to the second node N2 through the turn-on emission control switching element Tr_EC. Thus, both the first node N1 and the second node N2 are maintained at the level of the reference voltage Vref.

On the other hand, the initial voltage Vinit is supplied to the third node N3 through the turn-on initial switching element Tr_IT. Accordingly, the third node N3 is maintained at the level of the initial voltage Vinit. Here, the level of the initial voltage Vinit applied to the third node N3 is determined by the ratio of the internal resistance of the drive switching element Tr_DR to the internal resistance of the initial switching element Tr_IT. At this time, since the initial voltage Vinit is smaller than the second driving voltage VSS and smaller than the threshold voltage of the light emitting diode OLED, the light emitting diode OLED is biased in the reverse direction, and the light emitting diode OLED is turned off Lt; / RTI >

The second node N2 connected to the gate electrode of the driving switching element Tr_DR is maintained at the level of the reference voltage Vref during the initialization period Ti and the third node N3 connected to the source electrode thereof. Is maintained at the level of the initial voltage Vinit and the drive switching element Tr_DR is initialized as the drain electrode is maintained at the level of the first drive voltage VDD. At this time, the driving switching element Tr_DR is turned on because the voltage difference between its gate electrode and the source electrode exceeds its threshold voltage, and the turn-on driving switching element Tr_DR is turned on, Current flows. At this time, as described above, since the light emitting diode OLED forms a reverse bias, the current generated by the driving switching element Tr_DR can not flow to the light emitting diode OLED, and the initial voltage Vinit It is sinked into a voltage (Vinit) circle. Thus, the light emitting diode (OLED) remains off.

As described above, in the initialization period Ti, the light emitting diode OLED is kept turned off, and the drive switching element Tr_DR is also initialized.

Particularly, by discharging the third node N3 to an initial voltage Vinit having a low value during the initialization period Ti, even when the driving switching element Tr_DR is turned on, the voltage of the third node N3 rises The threshold voltage detection compensation range of the drive switching device Tr_DR is considerably widened.

2) Threshold voltage detection period ( Tth )

Next, the operation of the pixel PXL in the threshold voltage detection period Tth will be described with reference to Figs. 3 and 6B.

During the threshold voltage detection period Tth, as shown in Fig. 3, the sense signal SS is kept in an active state. On the other hand, the initialization signal INT, the scan signal SC and the emission control signal EM are kept inactive.

Accordingly, as shown in FIG. 6B, the reference switching element Tr_RE, which receives the sense signal SS in the active state, maintains the turn-on state. On the other hand, the data switching element Tr_DS, the initial switching element Tr_IT and the emission control switching element Tr_EC, which are supplied with the scan signal SC, the initialization signal INT and the emission control signal EM in the inactive state, - Off.

At this time, the driving switching element Tr_DR has a difference voltage between the gate electrode (the second node N2) and the source electrode (the third node N3) (i.e., the second node N2 and the third node N3 ) Between the first and second electrodes (not shown). A current path is formed through the turn-on drive switching element Tr_DR and the sense switching element Tr_SS. That is, as shown in Fig. 6B, a current path composed of the second node N2, the driving switching element Tr_DR, the third node N3 and the gate-source capacitor Cgss is formed. As a result, the voltages of the second node N2 and the third node N3 start to rise. At this time, the voltage of the third node N3 changes in the direction of the voltage of the second node N2, so that the threshold voltage Vth of the drive switching device Tr_DR is detected in the source follower manner. At this time, since the voltage of the second node N2 is held by the second storage capacitor Cem and the reference voltage Vref is turned on to fix the value of the second storage capacitor Cem And is supplied to the first node N1 through the reference switching element Tr_RE. Here, the voltage of the second node N2 is determined by the ratio between the capacitance of the second storage capacitor Cem and the capacitance of the gate-source capacitor Cgss, And a different value depending on the threshold voltage Vth of the element Tr_DR. The voltage of the third node N3 increases more rapidly than the voltage of the second node N2. Accordingly, when the voltage difference between the second node N2 and the third node N3 reaches the threshold voltage of the driving switching element Tr_DR, the driving switching element Tr_DR is turned off and the above-described current path is cut off. That is, when the amount of charge corresponding to the threshold voltage of the driving switching device Tr_DR is accumulated in the gate-source capacitor Cgss, the voltage rise of the second node N2 and the third node N3 is stopped. At this time, Tr_DR is also cut off, and the threshold voltage of the drive switching element Tr_DR is detected and stored in the gate-source capacitor Cgss. At this time, the voltage of the third node N3 includes the threshold voltage Vth of the driving switching element Tr_DR. That is, the voltage of the third node N3 is a value [Vref-Vth (Vref-Vth)] obtained by multiplying the value Vref-Vth obtained by subtracting the threshold voltage of the drive switching element Tr_DR from the reference voltage Vref, ) * [alpha]. This alpha represents an amplification value of the threshold voltage. In the present invention, by amplifying the threshold voltage of the driving switching element Tr_DR using the circuit configuration as shown in FIG. 2 and the signals shown in FIG. 3, The compensation range can be widened. Thus, the threshold voltage of the driving switching element Tr_DR is amplified and detected during the threshold voltage detection period Tth.

3) Data entry period ( Td )

Next, the operation of the pixel PXL in the data writing period Td will be described with reference to Figs. 3 and 6C.

During the data writing period Td, as shown in Fig. 3, the scan signal SC is kept in the active state. At this time, the scan signal SC is not completely maintained in the active state for the entire period of the data write period Td, and is maintained in the active state for a certain period of the data write period Td, as shown in FIG. And remain inactive for the remainder of the period. On the other hand, the initialization signal INT, the sense signal SS, and the emission control signal EM remain inactive during this data writing period Td. During this data writing period Td, the data signal Vdata is supplied to the data line DL.

Accordingly, as shown in FIG. 6C, the data switching element Tr_DS supplied with the scan signal SC in an active state is turned on. On the other hand, the initial switching device Tr_IT, the reference switching device Tr_RE and the emission control switching device Tr_EC, which are supplied with the initialization signal INT, the detection signal SS and the emission control signal EM in the inactive state, - Off. On the other hand, the driving switching element Tr_DR maintains the turn-off state.

Then, the data signal Vdata is supplied to the first node N1 through the turn-on data switching element Tr_DS. The data signal Vdata supplied to the first node N1 is applied to the storage capacitor Cst when the data switching element Tr_DS is turned off as the scan signal SC transits to the inactive state. Lt; / RTI >

4) Light emitting period ( Te )

Next, the operation of the pixel PXL in the light emission period Te will be described with reference to Figs. 3 and 6D.

During the light emission period Te, as shown in Fig. 3, the light emission control signal EM sequentially has an active state and an inactive state. That is, the emission control signal EM is maintained in the active state at the start of the emission period Te, and then transitions to the inactive state after a certain period of time. On the other hand, the initialization signal INT, the sense signal SS, and the scan signal SC remain inactive during the light emission period Te.

Thereby, the light emission control switching element Tr_EC supplied with the light emission control signal EM in the active state is turned on. On the other hand, the initial switching element Tr_IT, the reference switching element Tr_RE and the data switching element Tr_DS, which are supplied with the initialization signal INT, the sense signal SS and the scan signal SC in an inactive state, do.

Then, the data signal (Vdata) of the first node (N1) is applied to the second node (N2) through the turn-on emission control switching element (Tr_EC). Therefore, the driving switching element Tr_DR is turned on, and the turned-on driving switching element Tr_DR generates a driving current corresponding to the data signal Vdata supplied thereto. As this driving current is supplied to the light emitting diode (OLED), the light emitting diode (OLED) starts to emit light. At this time, as the voltage of the third node N3 is held by the parasitic capacitor of the gate-source capacitor Cgss and the driving switching element Tr_DR, the light emitting diode stably emits light for one frame .

Second Example

7 is a circuit diagram of a pixel according to a second embodiment of the present invention. FIG. 7 is a diagram showing a circuit configuration provided in any one pixel PXL in FIG.

One pixel PXL includes a data switching element Tr_DS, a first reference switching element Tr_RE, a second reference switching element Tr_RE, an emission control switching element Tr_EC, And includes a switching element Tr_DR, an initial switching element Tr_IT, a first storage capacitor Cst, a second storage capacitor Cem, a gate-source capacitor Cgss, and a light emitting diode OLED. Here, the data switching element Tr_DS, the first reference switching element Tr_RE, the second reference switching element Tr_RE, the light emission control switching element Tr_EC, the driving switching element Tr_DR and the initial switching element Tr_IT type transistor.

The data switching element Tr_DS is controlled according to the scan signal SC from the scan line and is connected between the data line DL and the first node N1.

The first reference switching element Tr_RE is controlled according to the sense signal SS from the sense line and is connected between the reference power supply line for transmitting the reference voltage Vref and the first node N1.

The second reference switching element Tr_RE is controlled in accordance with the initialization signal INT from the initialization line and is connected between the reference power supply line for transmitting the reference voltage Vref and the second node N2.

The light emission control switching element Tr_EC is controlled in accordance with the light emission control signal EM from the light emission control line and is connected between the first node N1 and the second node N2.

The driving switching element Tr_DR is controlled according to the voltage of the second node N2 and is connected between the first driving power supply line for transmitting the first driving voltage VDD and the third node N3.

The initial switching element Tr_IT is controlled according to the initialization signal INT from the initialization line and is connected between the third node N3 and the initial power supply line for transmitting the initial voltage Vinit.

The first storage capacitor Cst is connected between the first node N1 and the third node N3.

The second storage capacitor Cem is connected between the first node N1 and the second node N2.

The gate-source capacitor Cgss is connected between the second node N2 and the third node N3. When the size of the driving switching element Tr_DR is sufficiently large so that the capacitance of the parasitic capacitor formed between the gate electrode and the source electrode of the driving switching element Tr_DR is sufficiently large, this parasitic capacitor replaces this gate-source capacitor Cgss can do. In other words, when the size of the drive switching element Tr_DR is sufficiently large, the gate-source capacitor Cgss can be removed from the circuit of Fig.

The light emitting diode OLED is connected between the third node N3 and the second driving power supply line. At this time, the anode electrode of the light emitting diode OLED is connected to the third node N3, and the cathode electrode is connected to the second driving power supply line.

8 is a timing chart of the scan signal SC, the initialization signal INT, the emission control signal EM and the sense signal SS supplied to the pixel of FIG.

8, the scan signal SC, the initialization signal INT, the emission control signal EM and the sense signal SS are sequentially generated in an initialization period Ti, a threshold voltage detection period Tth, The data writing period Td, and the light emitting period Te. Here, the active state of a signal means a state of a level at which the switching element can be turned on when the signal is supplied to the switching element. On the other hand, the inactive state of a signal means a state of a level at which the switching element can be turned off when a signal is supplied to the switching element. For example, when the switching element is of the n type, the active state of the signal supplied thereto means a relatively high level voltage. On the other hand, the inactive state means a relatively low-level voltage.

During the initialization period Ti, the initialization signal INT and the sense signal SS are maintained in the active state. On the other hand, the scan signal SC and the emission control signal EM are kept inactive.

During the threshold voltage detection period Tth, the sense signal SS is maintained in the active state. On the other hand, the initialization signal INT, the scan signal SC and the emission control signal EM are kept inactive.

During the data writing period Td, the scan signal SC remains active. At this time, the scan signal SC is not completely maintained in the active state for the entire period of the data write period Td, and is maintained in the active state for a certain period of the data write period Td, as shown in FIG. And remain inactive for the remainder of the period. At this time, the period during which the scan signal SC is maintained in the active state during the data write period Td may be set to be larger than the period during which the scan signal SC remains in the inactive state. On the other hand, the initialization signal INT, the sense signal SS, and the emission control signal EM remain inactive during this data writing period Td. Meanwhile, the data signal Vdata is supplied to the data line DL during the data writing period Td.

During the light emission period Te, the emission control signal EM sequentially has an active state and an inactive state. That is, the emission control signal EM is maintained in the active state at the start of the emission period Te, and then transitions to the inactive state after a certain period of time. At this time, the period during which the emission control signal EM is maintained in the inactive state during the emission period Te is set to be larger than the period during which the emission control signal EM is maintained in the active state. On the other hand, the initialization signal INT, the sense signal SS, and the scan signal SC remain inactive during the light emission period Te.

Meanwhile, as another embodiment, the light emission control signal EM may be maintained in the active state during the light emission period Te.

8 is applied at different timings to the pixels arranged in the vertical direction. This will be described in more detail with reference to FIG. 9 as follows.

FIG. 9 is a timing diagram of application signals for each pixel when the signals of FIG. 8 are supplied to a plurality of vertically arranged pixels.

The set of signals IT_n, SS_n, SC_n and EM_n shown in FIG. 9A are signals supplied to the n-th pixel, and the set of signals IT_n + 1, SS_n + 1, SC_n + 1 and EM_n + 1 are signals supplied to the (n + 1) th pixel and the set of signals IT_n + 2, SS_n + SC_n + 2, EM_n + 2) are signals supplied to the (n + 2) th pixel. The nth pixel means any one of j pixels (connected in common to the nth scan line), and the (n + 1) th pixel means any one of j pixels Th scan line), and the (n + 2) -th pixel is any one of j pixels connected in common to the (n + 2) th scan line Quot; pixels ".

As shown in FIG. 9, it can be seen that the scan signals SC_n, SC_n + 1, and SC_n + 2 to be supplied to each pixel are sequentially output. More specifically, the scan signal SC_n + 1 supplied to the (n + 1) th pixel is supplied later than the scan signal SC_n supplied to the (n + 1) 1) than the scan signal SC_n + 2 supplied to the (n + 2) -th pixel. Thus, the scan signals SC_n, SC_n + 1, and SC_n + 2 for each pixel are delayed by a pulse width in the active state thereof. Similarly, the other signals, i.e., the initialization signals INT, the emission control signals EM, and the sensing signals SS are delayed by one pulse width of the scan signal SC for each pixel.

As one set of signals is delayed for every horizontal period, the output timing of the emission control signal supplied to one pixel may coincide with the output timing of the sense signal supplied to any one of the pixels In this case, two kinds of signals of different kinds can be commonly outputted through one line. This will be described in detail with reference to FIG.

10 is a diagram showing a timing diagram between a set of signals supplied to an n-th pixel and a set of signals supplied to an (n + x) -th pixel.

10, the output timing of the emission control signal EM_n supplied to the n-th pixel and the output timing of the sense signal SS_n + x supplied to the (n + x) -th pixel located further behind the pixel And the pulse width of the emission control signal EM_n in the active state is equal to the pulse width of the detection signal SS_n + x in the active state. This x is a natural number and can be varied depending on the output timing of the signals. When the output timings of different kinds of signals supplied to two different pixels coincide with each other and their pulse widths are equal to each other, for example, the emission control signal EM_n supplied to the n-th pixel and the emission control signal EM_n supplied to the (SS_n + x) to be supplied to the scan line driver 40 through the same line. That is, the emission control signal EM_n supplied to the n-th pixel is transmitted by the n-th emission control line, and the sense signal SS_n + x supplied to the (n + x) It is possible to simultaneously transmit the emission control signal EM_n and the sense signal SS_n + x using only one of the n-th emission control line and the n + x-sense lines. In this case, any one of the unused lines is removed from the circuit, thereby generating a side effect that reduces the size and cost of the circuit.

Hereinafter, the operation of the pixel according to the second embodiment of the present invention will be described in detail with reference to FIGS. 8 and 11A to 11D.

11A to 11D are diagrams for explaining the operation of the pixel according to the second embodiment of the present invention. Here, the switching element shown by a dotted line in FIGS. 11A to 11D means a turned-off state, and a switching element surrounded by a circular dotted line means a turned-on state.

1) Initialization period ( Ti )

First, with reference to FIG. 8 and FIG. 11A, let us consider the operation of the pixel PXL in the initialization period Ti.

During the initialization period Ti, the initialization signal INT, the sense signal SS, and the emission control signal EM are maintained in an active state, as shown in Fig. On the other hand, the scan signal SC remains inactive.

According to such signals, as shown in FIG. 11A, the first reference switching element Tr_RE1, which is supplied with the sense signal INT of the active state, is turned on, and the initialization signal INT of the active state is supplied The receiving initial switching element Tr_IT and the second reference switching element Tr_RE2 are turned on. On the other hand, the data switching element Tr_DS supplied with the scan signal SC in an inactive state is turned off.

Then, the reference voltage Vref is supplied to the first node N1 through the turned-on first reference switching element Tr_RE1. The reference voltage Vref is also supplied to the second node N2 through the turn-on second reference switching element Tr_RE2. Thus, both the first node N1 and the second node N2 are maintained at the level of the reference voltage Vref.

On the other hand, the initial voltage Vinit is supplied to the third node N3 through the turn-on initial switching element Tr_IT. Accordingly, the third node N3 is maintained at the level of the initial voltage Vinit. Here, the level of the initial voltage Vinit applied to the third node N3 is determined by the ratio of the internal resistance of the drive switching element Tr_DR to the internal resistance of the initial switching element Tr_IT. At this time, since the initial voltage Vinit is smaller than the second driving voltage VSS and smaller than the threshold voltage of the light emitting diode OLED, the light emitting diode OLED is biased in the reverse direction, and the light emitting diode OLED is turned off Lt; / RTI >

The second node N2 connected to the gate electrode of the driving switching element Tr_DR is maintained at the level of the reference voltage Vref during the initialization period Ti and the third node N3 connected to the source electrode thereof. Is maintained at the level of the initial voltage Vinit and the drive switching element Tr_DR is initialized as the drain electrode is maintained at the level of the first drive voltage VDD. At this time, the driving switching element Tr_DR is turned on because the voltage difference between its gate electrode and the source electrode exceeds its threshold voltage, and the turn-on driving switching element Tr_DR is turned on, Current flows. At this time, as described above, since the light emitting diode OLED forms a reverse bias, the current generated by the driving switching element Tr_DR can not flow to the light emitting diode OLED, and the initial voltage Vinit It is sinked into a voltage (Vinit) circle. Thus, the light emitting diode (OLED) remains off.

As described above, in the initialization period Ti, the light emitting diode OLED is kept turned off, and the drive switching element Tr_DR is also initialized.

Particularly, by discharging the third node N3 to an initial voltage Vinit having a low value during the initialization period Ti, even when the driving switching element Tr_DR is turned on, the voltage of the third node N3 rises The threshold voltage detection compensation range of the drive switching device Tr_DR is considerably widened.

2) Threshold voltage detection period ( Tth )

Next, the operation of the pixel PXL in the threshold voltage detection period Tth will be described with reference to Figs. 8 and 11B.

During the threshold voltage detection period Tth, as shown in Fig. 8, the sense signal SS is kept in an active state. On the other hand, the initialization signal INT, the scan signal SC and the emission control signal EM are kept inactive.

Accordingly, as shown in FIG. 11B, the first reference switching element Tr_RE1, which is supplied with the sense signal SS in the active state, maintains the turn-on state. On the other hand, the data switching element Tr_DS, the initial switching element Tr_IT, the second reference switching element Tr_RE2 and the data switching element Tr_DS, which are supplied with the scan signal SC, the initialization signal INT and the emission control signal EM in an inactive state, The light emission control switching element Tr_EC is turned off.

At this time, the driving switching element Tr_DR has a difference voltage between the gate electrode (the second node N2) and the source electrode (the third node N3) (i.e., the second node N2 and the third node N3 ) Between the first and second electrodes (not shown). A current path is formed through the turn-on drive switching element Tr_DR and the sense switching element Tr_SS. That is, as shown in Fig. 6B, a current path composed of the second node N2, the driving switching element Tr_DR, the third node N3 and the gate-source capacitor Cgss is formed. As a result, the voltages of the second node N2 and the third node N3 start to rise. At this time, the voltage of the third node N3 changes in the voltage direction of the second node N2, so that the threshold voltage Vth of the drive switching device Tr_DR is detected in the source follower manner. At this time, since the voltage of the second node N2 is held by the second storage capacitor Cem and the reference voltage Vref is turned on to fix the value of the second storage capacitor Cem And is supplied to the first node N1 through the reference switching element Tr_RE. Here, the voltage of the second node N2 is determined by the ratio between the capacitance of the second storage capacitor Cem and the capacitance of the gate-source capacitor Cgss, And a different value depending on the threshold voltage Vth of the element Tr_DR. The voltage of the third node N3 increases more rapidly than the voltage of the second node N2. Accordingly, when the voltage difference between the second node N2 and the third node N3 reaches the threshold voltage of the driving switching element Tr_DR, the driving switching element Tr_DR is turned off and the above-described current path is cut off. That is, when the amount of charge corresponding to the threshold voltage of the driving switching device Tr_DR is accumulated in the gate-source capacitor Cgss, the voltage rise of the second node N2 and the third node N3 is stopped. At this time, Tr_DR is also cut off, and the threshold voltage of the drive switching element Tr_DR is detected and stored in the gate-source capacitor Cgss. At this time, the voltage of the third node N3 includes the threshold voltage Vth of the driving switching element Tr_DR. That is, the voltage of the third node N3 is a value [Vref-Vth (Vref-Vth)] obtained by multiplying the value Vref-Vth obtained by subtracting the threshold voltage of the drive switching element Tr_DR from the reference voltage Vref, ) * [alpha]. In the present invention, by amplifying the threshold voltage of the driving switching device Tr_DR using the circuit configuration as shown in FIG. 7 and the signals shown in FIG. 8, the threshold voltage The compensation range can be widened. Thus, the threshold voltage of the driving switching element Tr_DR is amplified and detected during the threshold voltage detection period Tth.

3) Data entry period ( Td )

Next, the operation of the pixel PXL in the data writing period Td will be described with reference to Figs. 8 and 11C.

During the data writing period Td, as shown in Fig. 8, the scan signal SC is kept in the active state. At this time, the scan signal SC is not completely maintained in the active state for the entire period of the data write period Td, and is maintained in the active state for a certain period of the data write period Td, as shown in FIG. And remain inactive for the remainder of the period. On the other hand, the initialization signal INT, the sense signal SS, and the emission control signal EM remain inactive during this data writing period Td. During this data writing period Td, the data signal Vdata is supplied to the data line DL.

Thus, as shown in Fig. 11C, the data switching element Tr_DS supplied with the scan signal SC in an active state is turned on. On the other hand, the initial switching element Tr_IT, the second reference switching element Tr_RE2, the first reference switching element Tr_RE1, the first reference switching element Tr_RE1, and the second reference switching element Tr_RE1 are supplied with the initialization signal INT, the sensing signal SS and the light emission control signal EM, And the emission control switching element Tr_EC are turned off. On the other hand, the driving switching element Tr_DR maintains the turn-off state.

Then, the data signal Vdata is supplied to the first node N1 through the turn-on data switching element Tr_DS. The data signal Vdata supplied to the first node N1 is applied to the storage capacitor Cst when the data switching element Tr_DS is turned off as the scan signal SC transits to the inactive state. Lt; / RTI >

4) Light emitting period ( Te )

Next, the operation of the pixel PXL in the light emission period Te will be described with reference to Figs. 8 and 11D.

During the light emission period Te, as shown in Fig. 8, the light emission control signal EM sequentially has an active state and an inactive state. That is, the emission control signal EM is maintained in the active state at the start of the emission period Te, and then transitions to the inactive state after a certain period of time. On the other hand, the initialization signal INT, the sense signal SS, and the scan signal SC remain inactive during the light emission period Te.

Thereby, the light emission control switching element Tr_EC supplied with the light emission control signal EM in the active state is turned on. On the other hand, the initial switching element Tr_IT, the reference switching element Tr_RE and the data switching element Tr_DS, which are supplied with the initialization signal INT, the sense signal SS and the scan signal SC in an inactive state, do.

Then, the data signal (Vdata) of the first node (N1) is applied to the second node (N2) through the turn-on emission control switching element (Tr_EC). Therefore, the driving switching element Tr_DR is turned on, and the turned-on driving switching element Tr_DR generates a driving current corresponding to the data signal Vdata supplied thereto. As this driving current is supplied to the light emitting diode (OLED), the light emitting diode (OLED) starts to emit light. At this time, as the voltage of the third node N3 is held by the parasitic capacitor of the gate-source capacitor Cgss and the driving switching element Tr_DR, the light emitting diode stably emits light for one frame .

Third Example

FIG. 12 is a diagram showing a circuit configuration of a pixel according to a third embodiment of the present invention, and FIG. 12 is a diagram showing a circuit configuration provided in any one pixel PXL in FIG.

12, the circuit configuration of the pixel according to the third embodiment of the present invention includes a data switching element Tr_DS, a first reference switching element Tr_RE, a second reference switching element Tr_RE, A first storage capacitor Cst, a second storage capacitor Cem, a gate-source capacitor Cst, and a gate electrode of the reference switching element Tr_RE3, the emission control switching element Tr_EC, the driving switching element Tr_DR, the initial switching element Tr_IT, Cgss) and a light emitting diode (OLED). Here, the data switching element Tr_DS, the first reference switching element Tr_RE, the second reference switching element Tr_RE, the light emission control switching element Tr_EC, the driving switching element Tr_DR and the initial switching element Tr_IT type transistor.

The pixel according to the third embodiment of the present invention has a circuit configuration in which the above-described structure of Fig. 7 further includes a third reference switching element Tr_RE3. The third reference switching element Tr_RE3 is controlled according to the scan signal SC from the scan line and is connected between the reference power supply line for transmitting the reference voltage Vref and the first node N1. The remaining components included in the pixel according to the third embodiment of the present invention are the same as those included in the pixel of Fig. 7 described above.

Further, the pixel according to the third embodiment of the present invention is provided with the signals shown in Figs. 8 to 10 described above.

Hereinafter, the operation of the pixel according to the second embodiment of the present invention will be described in detail with reference to FIGS. 8 and 13A to 13D.

13A to 13D are diagrams for explaining the operation of the pixel according to the third embodiment of the present invention. Here, the switching elements shown by dotted lines in FIGS. 13A to 13D indicate the turned-off state, and the switching elements surrounded by the circular dotted lines indicate the turned-on state.

1) Initialization period ( Ti )

First, with reference to FIG. 8 and FIG. 13A, let us consider the operation of the pixel PXL in the initialization period Ti.

During the initialization period Ti, the initialization signal INT, the sense signal SS, and the emission control signal EM are maintained in an active state, as shown in Fig. On the other hand, the scan signal SC remains inactive.

According to such signals, as shown in FIG. 13A, the first reference switching element Tr_RE1 supplied with the sense signal INT in the active state is turned on, and the initialization signal INT in the active state is supplied The receiving initial switching element Tr_IT and the second reference switching element Tr_RE2 are turned on. On the other hand, the data switching element Tr_DS supplied with the scan signal SC in an inactive state is turned off.

Then, the reference voltage Vref is supplied to the first node N1 through the turned-on first reference switching element Tr_RE1. The reference voltage Vref is also supplied to the second node N2 through the turn-on second reference switching element Tr_RE2. Thus, both the first node N1 and the second node N2 are maintained at the level of the reference voltage Vref.

On the other hand, the initial voltage Vinit is supplied to the third node N3 through the turn-on initial switching element Tr_IT. Accordingly, the third node N3 is maintained at the level of the initial voltage Vinit. Here, the level of the initial voltage Vinit applied to the third node N3 is determined by the ratio of the internal resistance of the drive switching element Tr_DR to the internal resistance of the initial switching element Tr_IT. At this time, since the initial voltage Vinit is smaller than the second driving voltage VSS and smaller than the threshold voltage of the light emitting diode OLED, the light emitting diode OLED is biased in the reverse direction, and the light emitting diode OLED is turned off Lt; / RTI >

The second node N2 connected to the gate electrode of the driving switching element Tr_DR is maintained at the level of the reference voltage Vref during the initialization period Ti and the third node N3 connected to the source electrode thereof. Is maintained at the level of the initial voltage Vinit and the drive switching element Tr_DR is initialized as the drain electrode is maintained at the level of the first drive voltage VDD. At this time, the driving switching element Tr_DR is turned on because the voltage difference between its gate electrode and the source electrode exceeds its threshold voltage, and the turn-on driving switching element Tr_DR is turned on, Current flows. At this time, as described above, since the light emitting diode OLED forms a reverse bias, the current generated by the driving switching element Tr_DR can not flow to the light emitting diode OLED, and the initial voltage Vinit It is sinked into a voltage (Vinit) circle. Thus, the light emitting diode (OLED) remains off.

As described above, in the initialization period Ti, the light emitting diode OLED is kept turned off, and the drive switching element Tr_DR is also initialized.

Particularly, by discharging the third node N3 to an initial voltage Vinit having a low value during the initialization period Ti, even when the driving switching element Tr_DR is turned on, the voltage of the third node N3 rises The threshold voltage detection compensation range of the drive switching device Tr_DR is considerably widened.

2) Threshold voltage detection period ( Tth )

Next, the operation of the pixel PXL in the threshold voltage detection period Tth will be described with reference to Figs. 8 and 13B.

During the threshold voltage detection period Tth, as shown in Fig. 8, the sense signal SS is kept in an active state. On the other hand, the initialization signal INT, the scan signal SC and the emission control signal EM are kept inactive.

Accordingly, as shown in FIG. 13B, the first reference switching element Tr_RE1, which is supplied with the sense signal SS in the active state, maintains the turn-on state. On the other hand, the data switching element Tr_DS, the initial switching element Tr_IT, the second reference switching element Tr_RE2 and the data switching element Tr_DS, which are supplied with the scan signal SC, the initialization signal INT and the emission control signal EM in an inactive state, The light emission control switching element Tr_EC is turned off.

At this time, the driving switching element Tr_DR has a difference voltage between the gate electrode (the second node N2) and the source electrode (the third node N3) (i.e., the second node N2 and the third node N3 ) Between the first and second electrodes (not shown). A current path is formed through the turn-on drive switching element Tr_DR and the sense switching element Tr_SS. That is, as shown in Fig. 6B, a current path composed of the second node N2, the driving switching element Tr_DR, the third node N3 and the gate-source capacitor Cgss is formed. As a result, the voltages of the second node N2 and the third node N3 start to rise. At this time, the voltage of the third node N3 changes in the voltage direction of the second node N2, so that the threshold voltage Vth of the drive switching device Tr_DR is detected in the source follower manner. At this time, since the voltage of the second node N2 is held by the second storage capacitor Cem and the reference voltage Vref is turned on to fix the value of the second storage capacitor Cem And is supplied to the first node N1 through the reference switching element Tr_RE. Here, the voltage of the second node N2 is determined by the ratio between the capacitance of the second storage capacitor Cem and the capacitance of the gate-source capacitor Cgss, And a different value depending on the threshold voltage Vth of the element Tr_DR. The voltage of the third node N3 increases more rapidly than the voltage of the second node N2. Accordingly, when the voltage difference between the second node N2 and the third node N3 reaches the threshold voltage of the driving switching element Tr_DR, the driving switching element Tr_DR is turned off and the above-described current path is cut off. That is, when the amount of charge corresponding to the threshold voltage of the driving switching device Tr_DR is accumulated in the gate-source capacitor Cgss, the voltage rise of the second node N2 and the third node N3 is stopped. At this time, Tr_DR is also cut off, and the threshold voltage of the drive switching element Tr_DR is detected and stored in the gate-source capacitor Cgss. At this time, the voltage of the third node N3 includes the threshold voltage Vth of the driving switching element Tr_DR. That is, the voltage of the third node N3 is a value [Vref-Vth (Vref-Vth)] obtained by multiplying the value Vref-Vth obtained by subtracting the threshold voltage of the drive switching element Tr_DR from the reference voltage Vref, ) * [alpha]. This alpha represents an amplification value of the threshold voltage. In the present invention, by amplifying the threshold voltage of the driving switching element Tr_DR using the circuit configuration as shown in FIG. 12 and the signals shown in FIG. 8, The compensation range can be widened. Thus, the threshold voltage of the driving switching element Tr_DR is amplified and detected during the threshold voltage detection period Tth.

3) Data entry period ( Td )

Next, the operation of the pixel PXL in the data writing period Td will be described with reference to Figs. 8 and 13C.

During the data writing period Td, as shown in Fig. 8, the scan signal SC is kept in the active state. At this time, the scan signal SC is not completely maintained in the active state for the entire period of the data write period Td, and is maintained in the active state for a certain period of the data write period Td, as shown in FIG. And remain inactive for the remainder of the period. On the other hand, the initialization signal INT, the sense signal SS, and the emission control signal EM remain inactive during this data writing period Td. During this data writing period Td, the data signal Vdata is supplied to the data line DL.

Thus, as shown in FIG. 13C, the data switching element Tr_DS and the third reference switching element Tr_RE3, which are supplied with the scan signal SC in the active state, are turned on. On the other hand, the initial switching element Tr_IT, the second reference switching element Tr_RE2, the first reference switching element Tr_RE1, the first reference switching element Tr_RE1, and the second reference switching element Tr_RE1 are supplied with the initialization signal INT, the sensing signal SS and the light emission control signal EM, And the emission control switching element Tr_EC are turned off. On the other hand, the driving switching element Tr_DR maintains the turn-off state.

Then, the data signal Vdata is supplied to the first node N1 through the turn-on data switching element Tr_DS. The data signal Vdata supplied to the first node N1 is applied to the storage capacitor Cst when the data switching element Tr_DS is turned off as the scan signal SC transits to the inactive state. Lt; / RTI >

On the other hand, the reference voltage Vref is supplied to the second node N2 through the turned-on third reference switching device Tr_RE3, whereby the threshold voltage Vdf corresponding to the coupling phenomenon in the data writing period Td Compensation loss can be prevented. That is, the voltage of the second node N2 is changed by the coupling of the data signal Vdata applied to the first node N1 and the second storage capacitor Cem during the data writing period Td . Since the structure of the present invention is of the source follower type, the voltage change of this second node N2 eventually causes the voltage change of the third node N3. At this time, the voltage change of the second node N2 varies in accordance with the gradation of the data signal Vdata. This means that the voltages of the second node N2 vary depending on the data signals supplied by the pixels PXL supplied with the data signals Vdata of different gradations during the data writing period Td, This means that a deviation between the threshold voltages of the driving switching elements of the respective pixels PXL occurs. In other words, the voltage of the second node N2 may be influenced by the gradation of the data signal Vdata. In the third embodiment of the present invention, by supplying a constant positive voltage, that is, the reference voltage Vref, to the second node N2 during the data writing period Td during which the data signal Vdata is applied to the first node N1, It is possible to eliminate the influences of gradation by the data signal.

4) Light emitting period ( Te )

Next, the operation of the pixel PXL in the light emission period Te will be described with reference to Figs. 8 and 13D.

During the light emission period Te, as shown in Fig. 8, the light emission control signal EM sequentially has an active state and an inactive state. That is, the emission control signal EM is maintained in the active state at the start of the emission period Te, and then transitions to the inactive state after a certain period of time. On the other hand, the initialization signal INT, the sense signal SS, and the scan signal SC remain inactive during the light emission period Te.

Thereby, the light emission control switching element Tr_EC supplied with the light emission control signal EM in the active state is turned on. On the other hand, the initial switching element Tr_IT, the reference switching element Tr_RE and the data switching element Tr_DS, which are supplied with the initialization signal INT, the sense signal SS and the scan signal SC in an inactive state, do.

Then, the data signal (Vdata) of the first node (N1) is applied to the second node (N2) through the turn-on emission control switching element (Tr_EC). Therefore, the driving switching element Tr_DR is turned on, and the turned-on driving switching element Tr_DR generates a driving current corresponding to the data signal Vdata supplied thereto. As this driving current is supplied to the light emitting diode (OLED), the light emitting diode (OLED) starts to emit light. At this time, as the voltage of the third node N3 is held by the parasitic capacitor of the gate-source capacitor Cgss and the driving switching element Tr_DR, the light emitting diode stably emits light for one frame .

Fourth Example

Fig. 14 is a diagram showing a circuit configuration of a pixel according to a fourth embodiment of the present invention. Fig. 14 is a diagram showing a circuit configuration provided in any one pixel PXL in Fig.

14, the circuit configuration of a pixel according to the fourth embodiment of the present invention includes a data switching element Tr_DS, a reference switching element Tr_RE, an emission control switching element Tr_EC, a driving switching element Tr_DR ), An initial switching device Tr_IT, a first storage capacitor Cst, a second storage capacitor Cem, a gate-source capacitor Cgss, and a light emitting diode OLED. Here, the data switching element Tr_DS, the reference switching element Tr_RE, the light emission control switching element Tr_EC, the driving switching element Tr_DR) and the initial switching element Tr_IT are composed of p-type transistors. The anode electrode of the light emitting diode OLED is connected to the first driving power supply line for transmitting the first driving voltage VDD, and the cathode electrode is connected to the driving switching element Tr_DR. The remaining components are the same as those of the first embodiment described above.

FIG. 15 is a timing chart of the scan signal SC, the initialization signal INT, the emission control signal EM, and the sense signal SS supplied to the pixel of FIG.

15, the initialization signal INT, the sense signal SS, the scan signal SC and the emission control signal EM are sequentially generated in an initialization period Ti, a threshold voltage detection period Tth, The data writing period Td, and the light emitting period Te. The active state of each signal in Fig. 15 means the level of the low voltage, and the timing chart shown in Fig. 15 is substantially the same as the timing in Fig. 3, and the active state is set to the low voltage. On the other hand, as another embodiment, the emission control signal EM may be maintained in the active state during the emission period Te in Fig.

Fifth Example

FIG. 16 is a diagram showing a circuit configuration of a pixel according to a fifth embodiment of the present invention, and FIG. 16 is a diagram showing a circuit configuration provided in any one pixel PXL in FIG.

As shown in FIG. 16, the circuit configuration of a pixel according to the fifth embodiment of the present invention includes a data switching element Tr_DS, a first reference switching element Tr_RE, a second reference switching element Tr_RE, The first switching transistor Tr_IT, the first storage capacitor Cst, the second storage capacitor Cem, the gate-source capacitor Cgss, and the light emitting diode OLED are connected to the switching element Tr_EC, the driving switching element Tr_DR, . Here, the data switching element Tr_DS, the first reference switching element Tr_RE, the second reference switching element Tr_RE, the emission control switching element Tr_EC, the driving switching element Tr_DR and the initial switching element Tr_IT and a p-type transistor. The anode electrode of the light emitting diode OLED is connected to the first driving power supply line for transmitting the first driving voltage VDD, and the cathode electrode is connected to the driving switching element Tr_DR. The remaining components are the same as those of the second embodiment described above.

FIG. 17 is a timing chart of the scan signal SC, the initialization signal INT, the emission control signal EM, and the sense signal SS supplied to the pixel of FIG.

17, the initialization signal INT, the sense signal SS, the scan signal SC and the emission control signal EM are sequentially generated in the initialization period Ti, the threshold voltage detection period Tth, The data writing period Td, and the light emitting period Te. The active state of each signal in FIG. 15 means the level of the low voltage, and the timing chart shown in FIG. 15 is substantially the same as the timing of FIG. 8, and the active state is set to the low voltage. On the other hand, as another embodiment, the emission control signal EM may be kept in the active state during the emission period Te in Fig.

6th Example

FIG. 18 is a diagram showing a circuit configuration of a pixel according to the sixth embodiment of the present invention, and FIG. 18 is a diagram showing a circuit configuration provided in any one pixel PXL of FIG.

The circuit configuration of the pixel according to the sixth embodiment of the present invention is the same as the configuration of the pixel shown in FIG. 18 except that the data switching element Tr_DS, the first reference switching element Tr_RE, the second reference switching element Tr_RE, A first storage capacitor Cst, a second storage capacitor Cem, a gate-source capacitor Cst, and a gate electrode of the reference switching element Tr_RE3, the emission control switching element Tr_EC, the driving switching element Tr_DR, the initial switching element Tr_IT, Cgss) and a light emitting diode (OLED). Here, the data switching element Tr_DS, the first reference switching element Tr_RE, the second reference switching element Tr_RE, the third reference switching element Tr_RE3, the emission control switching element Tr_EC, the driving switching element Tr_DR, And the initial switching element Tr_IT are all p-type transistors. The anode electrode of the light emitting diode OLED is connected to the first driving power supply line for transmitting the first driving voltage VDD, and the cathode electrode is connected to the driving switching element Tr_DR. The remaining components are the same as those of the third embodiment described above.

On the other hand, the pixel according to the sixth embodiment is supplied with signals as shown in Fig.

19A and 19B are diagrams for explaining the compensating effect of threshold voltage for each gradation of the driving switching element Tr_DR provided in the pixel according to the embodiment of the present invention. FIG. 19B is a view for explaining the compensation effect of the threshold voltage for each gradation of the drive switching element Tr_DR provided in each pixel of the driving switching element Tr_DR according to each gradation of the driving switching element Tr_DR Fig. 5 is a diagram for explaining the compensation effect of the threshold voltage. Fig.

19, the X axis represents the threshold voltage Vth of the driving switching element Tr_DR and the Y axis represents the rate of current change of the normalized light emitting diode OLED.

19 (a), when the current change rate of the light emitting diode OLED is 95% to 105% (5%), the threshold voltage of the drive switching device Tr_DR is -1.8 [V] to 5.5 It can be seen that the rate of current change in each gradation is almost constant even when shifted within a wide range (7.3 [V]) in [V].

19 (b), when the threshold voltage of the drive switching element Tr_DR is changed from -0.7 [V] to 5.5 [V], when the current change rate of the light emitting diode OLED is 95% to 105% It can be seen that the rate of current change in each gradation is almost constant even when shifted within a wide range (range of 6.2 [V]) from [V].

20 is a graph showing a relationship between a voltage drop (IR Drop) of a first driving voltage (VDD) and a current change (compensation ability) according to a voltage rising (IR Rising) of a second driving voltage (VSS) 20A is a diagram showing a current change according to the voltage drop of the first driving voltage VDD in the display unit having the pixels shown in FIG. 12, and FIG. 12 is a diagram showing a current change according to a voltage increase of the second driving voltage VSS in the display unit having the pixels shown in FIG.

20, the X axis represents the first driving voltage VDD and the Y axis represents the rate of current change of the normalized light emitting diode OLED.

20A, when the voltage drop (IR Drop) of the first driving voltage VDD is 3 [V] based on 64 gradations (2/8 gradation), the light emitting diodes OLED ) Current (OLED current) is compensated to a high level of 99.9% from the initial value.

20B, when the voltage rising (IR Rising) of the second driving voltage VSS is 0.8 [V] based on 64 gradations (2/8 gradation), the light emitting diodes OLED ) Current (OLED current) is compensated to a high level of 87% from the initial value. Considering that the light emitting diode OLED is connected to the source electrode of the driving switching element Tr_DR, which is an n-type transistor, such a value (91%) is a compensation level at which luminance uniformity in the display unit does not become a significant problem Ability.

The switching elements shown in FIGS. 2, 7, 12, 14, 16, and 18 may be either n-type transistors or p-type transistors.

For example, when the data switching element Tr_DS, the reference switching element Tr_RE, the emission control switching element TR_EC, the driving switching element Tr_DR and the initial switching element TrIT in FIG. 2 are all n-type transistors and p Type transistors.

The data switching element Tr_DS, the reference switching element Tr_RE, the emission control switching element TR_EC, the driving switching element Tr_DR and the initial switching element TrIT in FIG. 14 are both n-type transistors and p-type transistors It should be understood that the present invention is not limited to the above-described embodiment and the accompanying drawings, and that various substitutions, modifications, and alterations are possible within the scope of the technical idea of the present invention And will be apparent to those skilled in the art to which the present invention pertains.

Tr_DS: Data switching element Tr_EC: Emission control switching element
Tr_RE: reference switching element Tr_IT: initial switching element
DL: Data line Tr_DR: Driving switching element
OLED: Light Emitting Diode N #: Primary Node
Cgds: Gate-drain capacitors Cgss: Gate-source capacitors
Cst: storage capacitor SC: scan signal
INT: initialization signal EM: emission control signal
SS: detection signal Vdata; Data signal
VDD: first drive voltage VSS: second drive voltage
Vref; Reference voltage Vinit: Initial voltage

Claims (13)

A plurality of pixels for displaying an image;
Each pixel has,
A data switching element controlled in accordance with a scan signal from the scan line and connected between the data line and the first node;
A reference switching element connected between a reference power supply line for transmitting a reference voltage and the first node, the reference switching element being controlled according to a sensing signal from the sensing line;
A light emission control switching element controlled in accordance with a light emission control signal from the light emission control line and connected between the first node and the second node;
A driving switching element controlled between a voltage of the second node and connected between a first driving power supply line and a third node for transmitting a first driving voltage;
An initial switching element controlled in accordance with an initialization signal from an initialization line and connected between the third node and an initial power supply line for transmitting an initial voltage;
A first storage capacitor connected between the first node and the third node;
A second storage capacitor connected between the first node and the second node; And
And an anode electrode connected to the third node, and a cathode electrode connected to a second driving power supply line for transmitting a second driving voltage;
Wherein the scan signal, the initialization signal, the emission control signal, and the sensing signal change to an active state or an inactive state based on sequentially generated initialization period, threshold voltage detection period, data writing period, and light emission period;
During the initialization period, the initialization signal, the sensing signal, and the emission control signal are kept active, while the scan signal is kept inactive;
The initialization signal, the scan signal, and the emission control signal remain inactive while the sense signal remains active during the threshold voltage detection period;
The scan signal remains active during the data write period, while the initialization signal, the sense signal, and the emission control signal remain inactive;
A data signal is supplied to the data line during the data writing period;
Wherein the scan signal, the reset signal, and the sense signal are maintained in an inactive state while the emission control signal is in an active state or an inactive state sequentially or in an active state during the light emission period, Device. The method according to claim 1,
The pulse width of the scan signal in the active state is equal to the pulse width of the initialization signal in the active state; And,
the pth (p is a natural number) pixel and the (p + x) th (x is a natural number) pixel are located on different pixel rows;
A scan signal supplied to the p-th pixel and a scan signal supplied to the p + x-th pixel are different in phase from each other;
A scan signal supplied to the p-th pixel and an initialization signal supplied to the p + x-th pixel are the same in phase;
And a scan line connected to the data switching element of the pth pixel and a sense line connected to the emission control switching element of the p + xth pixel are connected to each other. A plurality of pixels for displaying an image;
Each pixel has,
A data switching element controlled in accordance with a scan signal from the scan line and connected between the data line and the first node;
A first reference switching element connected between a reference power supply line for transmitting a reference voltage and the first node, the first reference switching element being controlled according to a sensing signal from the sensing line;
A second reference switching element controlled in accordance with an initialization signal from an initialization line, the second reference switching element being connected between the reference power supply line and a second node;
A light emission control switching element controlled in accordance with a light emission control signal from the light emission control line and connected between the first node and the second node;
A driving switching element controlled between a voltage of the second node and connected between a first driving power supply line and a third node for transmitting a first driving voltage;
An initial switching device controlled in accordance with an initialization signal from the initialization line and connected between the third node and an initial power supply line for transmitting an initial voltage;
A first storage capacitor connected between the first node and the third node;
A second storage capacitor connected between the first node and the second node; And
And an anode electrode connected to the third node, and a cathode electrode connected to a second driving power supply line for transmitting a second driving voltage;
Wherein the scan signal, the initialization signal, the emission control signal, and the sensing signal change to an active state or an inactive state based on sequentially generated initialization period, threshold voltage detection period, data writing period, and light emission period;
During the initialization period, the initialization signal and the sense signal are kept active, while the scan signal and the emission control signal are kept inactive.
The initialization signal, the scan signal, and the emission control signal remain inactive while the sense signal remains active during the threshold voltage detection period;
The scan signal remains active during the data write period, while the initialization signal, the sense signal, and the emission control signal remain inactive;
A data signal is supplied to the data line during the data writing period;
Wherein the scan signal, the reset signal, and the sense signal are maintained in an inactive state while the emission control signal is in an active state or an inactive state sequentially or in an active state during the light emission period, Device. The method of claim 3,
The pulse width of the light emission control signal in the active state is equal to the pulse width of the detection signal in the active state;
the pth (p is a natural number) pixel and the (p + x) th (x is a natural number) pixel are located on different pixel rows;
A scan signal supplied to the p-th pixel and a scan signal supplied to the p + x-th pixel are different in phase from each other;
The emission control signal supplied to the p-th pixel and the detection signal supplied to the p + x-th pixel are the same in phase;
Wherein the emission control line connected to the emission control switching element of the pth pixel and the sensing line connected to the sensing switching element of the p + xth pixel are connected to each other. The method of claim 3,
Each pixel has,
Further comprising a third reference switching element controlled according to the scan signal and connected between the reference power line and the second node. The method according to claim 1 or 3,
And a gate-source capacitor connected between the second node and the third node. The method according to claim 1 or 3,
Wherein the initial voltage is less than a reference voltage, the reference voltage is less than the second driving voltage, and the second driving voltage is less than the first driving voltage. A plurality of pixels for displaying an image;
Each pixel has,
A data switching element controlled in accordance with a scan signal from the scan line and connected between the data line and the first node;
A reference switching element connected between a reference power supply line for transmitting a reference voltage and the first node, the reference switching element being controlled according to a sensing signal from the sensing line;
A light emission control switching element controlled in accordance with a light emission control signal from the light emission control line and connected between the first node and the second node;
A driving switching element controlled in accordance with the voltage of the second node and connected between the cathode electrode of the light emitting diode and the third node;
An initial switching element controlled in accordance with an initialization signal from an initialization line and connected between the third node and an initial power supply line for transmitting an initial voltage;
A first storage capacitor connected between the first node and the third node; And
And a second storage capacitor connected between the first node and the second node;
An anode electrode of the light emitting diode is connected to a first driving power supply line for transmitting a first driving voltage;
Wherein the scan signal, the initialization signal, the emission control signal, and the sensing signal change to an active state or an inactive state based on sequentially generated initialization period, threshold voltage detection period, data writing period, and light emission period;
During the initialization period, the initialization signal, the sensing signal, and the emission control signal are kept active, while the scan signal is kept inactive;
The initialization signal, the scan signal, and the emission control signal remain inactive while the sense signal remains active during the threshold voltage detection period;
The scan signal remains active during the data write period, while the initialization signal, the sense signal, and the emission control signal remain inactive;
A data signal is supplied to the data line during the data writing period;
Wherein the scan signal, the initialization signal, and the sensing signal are maintained in an inactive state while the emission control signal is in an active state or an inactive state sequentially or in an active state during the light emission period, Device. A plurality of pixels for displaying an image;
Each pixel has,
A data switching element controlled in accordance with a scan signal from the scan line and connected between the data line and the first node;
A first reference switching element connected between a reference power supply line for transmitting a reference voltage and the first node, the first reference switching element being controlled according to a sensing signal from the sensing line;
A second reference switching element controlled in accordance with an initialization signal from an initialization line, the second reference switching element being connected between the reference power supply line and a second node;
A light emission control switching element controlled in accordance with a light emission control signal from the light emission control line and connected between the first node and the second node;
A driving switching element controlled in accordance with the voltage of the second node and connected between the cathode electrode of the light emitting diode and the third node;
An initial switching device controlled in accordance with an initialization signal from the initialization line and connected between the third node and an initial power supply line for transmitting an initial voltage;
A first storage capacitor connected between the first node and the third node; And
And a second storage capacitor connected between the first node and the second node;
An anode electrode of the light emitting diode is connected to a first driving power supply line for transmitting a first driving voltage;
Wherein the scan signal, the initialization signal, the emission control signal, and the sensing signal change to an active state or an inactive state based on sequentially generated initialization period, threshold voltage detection period, data writing period, and light emission period;
During the initialization period, the initialization signal and the sense signal are kept active, while the scan signal and the emission control signal are kept inactive.
The initialization signal, the scan signal, and the emission control signal remain inactive while the sense signal remains active during the threshold voltage detection period;
The scan signal remains active during the data write period, while the initialization signal, the sense signal, and the emission control signal remain inactive;
A data signal is supplied to the data line during the data writing period;
Wherein the scan signal, the reset signal, and the sense signal are maintained in an inactive state while the emission control signal is in an active state or an inactive state sequentially or in an active state during the light emission period, Device. 10. The method of claim 9,
Each pixel has,
Further comprising a third reference switching element controlled according to the scan signal and connected between the reference power line and the second node. The method according to claim 1 or 8,
Wherein the data switching element, the reference switching element, the emission control switching element, the driving switching element, and the initial switching element are all formed of an n-type transistor or a p-type transistor. 10. The method according to claim 3 or 9,
Wherein the data switching element, the first reference switching element, the second reference switching element, the emission control switching element, the driving switching element, and the initial switching element are all formed of an n-type transistor or a p-type transistor. 11. The method according to claim 5 or 10,
The data switching element, the first reference switching element, the second reference switching element, the third reference switching element, the light emission control switching element, the driving switching element, and the initial switching element are all formed of either an n-type transistor or a p- .

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