KR101850990B1 - Display device and driving method thereof - Google Patents

Display device and driving method thereof Download PDF

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KR101850990B1
KR101850990B1 KR1020110067027A KR20110067027A KR101850990B1 KR 101850990 B1 KR101850990 B1 KR 101850990B1 KR 1020110067027 A KR1020110067027 A KR 1020110067027A KR 20110067027 A KR20110067027 A KR 20110067027A KR 101850990 B1 KR101850990 B1 KR 101850990B1
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South Korea
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scan
gate
intervals
interval
display device
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KR1020110067027A
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Korean (ko)
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KR20130005557A (en
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황현식
최욱철
박철우
김종희
임경호
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삼성디스플레이 주식회사
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Priority to KR1020110067027A priority Critical patent/KR101850990B1/en
Priority to US13/305,277 priority patent/US9324281B2/en
Publication of KR20130005557A publication Critical patent/KR20130005557A/en
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/3433—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using light modulating elements actuated by an electric field and being other than liquid crystal devices and electrochromic devices
    • G09G3/348—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using light modulating elements actuated by an electric field and being other than liquid crystal devices and electrochromic devices based on the deformation of a fluid drop, e.g. electrowetting
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3622—Control of matrices with row and column drivers using a passive matrix
    • G09G3/3644—Control of matrices with row and column drivers using a passive matrix with the matrix divided into sections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0469—Details of the physics of pixel operation
    • G09G2300/0478—Details of the physics of pixel operation related to liquid crystal pixels
    • G09G2300/0482—Use of memory effects in nematic liquid crystals
    • G09G2300/0486—Cholesteric liquid crystals, including chiral-nematic liquid crystals, with transitions between focal conic, planar, and homeotropic states
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202—Addressing of scan or signal lines
    • G09G2310/0221—Addressing of scan or signal lines with use of split matrices
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/06—Details of flat display driving waveforms
    • G09G2310/067—Special waveforms for scanning, where no circuit details of the gate driver are given
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

A display device according to an embodiment of the present invention includes a display panel on which a plurality of pixels, a plurality of gate lines, and a plurality of data lines are disposed, a first gate driver for applying a gate-on voltage to a gate line of a first gate line set among a plurality of gate lines in each of a first scan period of a first scan period of the first frame, A second gate driver for applying the gate-on voltage to a gate line of a second one of the plurality of gate lines during each of the plurality of gate lines, a data driver for applying a data voltage to the plurality of data lines, A second gate driver, and a signal controller for transmitting a control signal to the data driver, wherein the interval between the n first scan section start points is a point And the interval between the n second scanning section starting points gradually increases with time.

Description

DISPLAY DEVICE AND DRIVING METHOD THEREOF [0002]

The present invention relates to a display device and a driving method thereof, and more particularly to a display device driven by a time division pulse width modulation method and a driving method thereof.

A general display device includes a display panel having a plurality of pixels and a display signal line, a gate driver for applying a gate signal to a gate line of the display signal line, and a data driver for applying a data voltage corresponding to the input video signal to a data line of the display signal line . Each pixel may include a switching element connected to a display signal line and a pixel electrode connected to the switching element. The pixel electrode receives the data voltage corresponding to the gate signal through the switching element.

On the other hand, in order to implement color display, each pixel of the display device uniquely displays one of basic colors such as red (R), green (G) and blue (B), or alternately displays basic colors with time.

When the gate driver applies a gate-on voltage to the gate line, the switching element connected thereto is turned on and the data voltage applied to the data line is applied to the corresponding pixel through the turned-on switching element. When the gate-on voltage is sequentially applied to all the gate lines and all the pixels receive the data voltage, one frame of the image is displayed. At this time, the input image signal corresponding to the image to be displayed by each pixel has information on the luminance of one frame, that is, the gradation of the pixel. When the pixels display two images, the display device can be driven by a pulse width modulation (PWM) method in order to display images of various gradations.

However, as the size of such a display device increases, the number of gate lines increases and the time required to display an image of one frame increases, which makes it difficult to increase the driving speed of the display device.

A problem to be solved by the present invention is to increase the driving speed of a display device driven by a time division pulse width modulation method.

A display device according to an embodiment of the present invention includes a display panel on which a plurality of pixels, a plurality of gate lines, and a plurality of data lines are disposed, a display panel on which n (n is a natural number) A first gate driver for applying a gate-on voltage to a gate line of a first gate line group of a plurality of gate lines, a second gate driver for applying a gate-on voltage to a first gate line group of the plurality of gate lines, A second gate driver for applying the gate-on voltage to a gate line of the line set, a data driver for applying a data voltage to the plurality of data lines, and a second gate driver for transmitting a control signal to the first and second gate drivers and the data driver. Wherein the interval between the n first scan section start points gradually decreases with time, and the interval between the n second scan section start points gradually decreases with time, Prices will gradually increase over time.

A method of driving a display device according to an embodiment of the present invention includes a display panel having a plurality of pixels, a plurality of gate lines and a plurality of data lines, a first gate driver and a second gate driver, a data driver, and a signal controller A method of driving a display device, comprising: a first gate driver for applying a gate-on voltage (n) to a first one of the plurality of gate lines in a section of n (n is a natural number) On voltage is applied to the gate line of the second gate line of the plurality of gate lines in each of the n second scan periods for the first frame by the second gate driver Wherein the interval between the n first scan section start points gradually decreases with time, and the interval between the n second scan section start points It will gradually increase over time.

The n first scan periods and the n second scan periods may not overlap with each other.

The temporal difference between the start point of the first scan period of the n first scan intervals and the start point of the first scan period of the n second scan intervals for the first frame for the first frame is smaller than one frame time .

Wherein each of the n first scan intervals and the n second scan intervals each last for one scan time (1T), and an interval between the n first scan intervals and an interval on the n second scan intervals May be a multiple of one scanning time (1T).

Wherein the interval between the start points of the neighboring first scan intervals of the n first scan intervals is reduced by 1 / k times (k is a natural number) May be increased by k times with respect to time.

The start point of the first scan period of the n first scan intervals may be earlier than the start point of the first scan period of the n second scan intervals.

The start point of the first scan period of the n first scan intervals may be slower than the start point of the first scan period of the n second scan intervals.

The signal controller may output a first scan start signal and a first gate clock signal to the first gate driver and a second scan start signal and a second gate clock signal to the second gate driver.

The output order of the pulses of the first scan start signal may be opposite to the output order of the pulses of the second scan start signal.

The first gate clock signal and the second gate clock signal may be the same clock signal.

The data voltage applied to the pixel during each of the n first scan periods and the n second scan periods may be maintained until the end of each scan period and the start of the next scan period.

A third gate driver for applying the gate-on voltage to the gate line of the third gate line of the plurality of gate lines in each of the n (n is a natural number) third scan period for the first frame .

The n first scan periods, the n second scan periods, and the n third scan periods may not overlap with each other.

Wherein each of the n first scan periods, each of the n second scan periods, and the n third scan periods each last for one scan time (1T), and the interval between the n first scan periods, an interval on the n second scanning intervals, and an interval on the n number of third scanning intervals may be a multiple of the one scanning time (1T).

The number of the ratios of the intervals between the start points of the neighboring first scan intervals among the n first scan intervals may not be a multiple of the number.

When n is 3, the ratio of the interval between the start points of the neighboring first scan periods of the n first scan intervals may be 1: 3: 7.

The signal control unit may include a first gate driver for supplying a first scan start signal and a first gate clock signal to the first gate driver and a second gate driver for outputting a second scan start signal and a second gate clock signal to the second gate driver, 3 scan start signal and a third gate clock signal.

The display device can display an image by an electrowetting display method.

And may further include a reset scan period at the end of the first frame.

The data voltage may have more than two values.

According to the embodiment of the present invention, it is possible to reduce the idle time of two or more gate drivers, thereby reducing the driving time and increasing the charging time for the pixels.

In addition, the number of gate drivers can be further increased by appropriately adjusting the time interval between the scan intervals of the plurality of gate drivers according to the driving method of the pulse width modulation method, thereby increasing the resolution of the display device.

Further, the number of gradations of the image displayed by the display device can be increased by using the pulse width modulation method and the pulse amplitude modulation method together, and the time interval between the scan periods of the plurality of gate drivers according to the driving method of the pulse width modulation method It is possible to further increase the number of expressible gradations by appropriately adjusting it.

1 is a block diagram of a display device according to an embodiment of the present invention,
FIG. 2 is a diagram illustrating a method of applying a gate-on voltage according to a time division pulse width modulation driving method of two gate drivers of a display device according to an embodiment of the present invention,
FIG. 3 is a table showing a method of applying a data voltage according to a method of applying a gate-on voltage according to a time division pulse width modulation driving method of the two gate driving units shown in FIG. 2,
FIGS. 4, 5, and 6 are diagrams illustrating a method of applying a gate-on voltage according to a time division pulse width modulation driving method of two gate drivers of a display device according to an embodiment of the present invention,
7 is a cross-sectional view of an electrowetting display according to an embodiment of the present invention when the pixel electrode is in a first state in which no voltage is applied,
8 is a cross-sectional view of an electrowetting display device according to an embodiment of the present invention when a voltage is applied to a pixel electrode in a second state,
FIG. 9 is a view showing a method of applying a gate-on voltage according to a time division pulse width modulation driving method of two gate drivers of an electrowetting display device according to an embodiment of the present invention,
10 is a diagram illustrating a method of applying a gate-on voltage according to a time division pulse width modulation driving method of two gate drivers of a display device according to an embodiment of the present invention,
11 is a diagram illustrating a method of applying a gate-on voltage according to a time division pulse width modulation driving method of a gate driver of a display device according to an embodiment of the present invention,
12 is a block diagram of a display device according to an embodiment of the present invention,
13 is a diagram illustrating a method of applying a gate-on voltage according to a pulse width modulation driving method of three gate driving units of a display device according to an embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily carry out the present invention. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein.

In the drawings, the thickness is enlarged to clearly represent the layers and regions. Like parts are designated with like reference numerals throughout the specification. Whenever a portion of a layer, film, region, plate, or the like is referred to as being "on" another portion, it includes not only the case where it is "directly on" another portion, but also the case where there is another portion in between. Conversely, when a part is "directly over" another part, it means that there is no other part in the middle.

First, a display device according to an embodiment of the present invention will be described with reference to FIG.

1 is a block diagram of a display device according to an embodiment of the present invention.

1, a display device according to an exemplary embodiment of the present invention includes a display panel 300 and a first gate driver 400a, a second gate driver 400b, and a data driver 500 connected thereto, And a signal controller 600.

The display panel 300 is divided into a first display panel portion 300a and a second display panel portion 300b and includes a plurality of display signal lines G1 to Gk and D1 to Dm and a plurality of pixels (PX).

The display signal lines G1-Gk and D1-Dm include a plurality of gate lines G1-Gk for transferring gate signals and a plurality of data lines D1-Dm for transferring data voltages.

The entire gate lines G1 to Gk are divided into a first gate line set Gset1 located at the first display panel portion 300a and a second gate line set Gset2 located at the second display panel portion 300b. The first gate line set Gset1 includes gate lines G1-Gj (j <k) sequentially connected to the first gate driver 400a and the second gate line set Gset2 includes And a gate line G (j + 1) -Gk connected to the two-gate driving unit 400b and arranged in order. The gate lines G1-Gk and the data lines D1-Dm may intersect with each other.

Each pixel PX includes a switching element connected to the display signal lines G1-Gk and D1-Dm and a pixel circuit connected thereto. The switching element is a three-terminal element such as a thin film transistor. The control terminal is connected to the gate lines G1 to Gk. The input terminal is connected to the data lines D1 to Dm. . On the other hand, in order to implement color display, each pixel PX uniquely displays one of primary colors (space division), or each pixel PX alternately displays a basic color (time division) So that the desired color is recognized by the spatial and temporal sum of these basic colors. Examples of basic colors include red, green, and blue. As an example of the spatial division, a color filter indicating one of the basic colors may be provided in an area corresponding to each pixel PX. In a backlight unit for supplying light to each pixel PX as an example of time division, It is possible to supply light of a varying color.

The data driver 500 is connected to the data lines D1-Dm of the display panel 300 and applies a data voltage to the data lines D1-Dm.

The first gate driver 400a is connected to the gate lines G1-Gj of the first gate line Gset1 and includes a gate-on voltage Von for turning on the switching element and a gate- (Voff) is applied to the gate lines G1 to Gj.

The second gate driver 400b is connected to the gate line G (j + 1) -Gk of the second gate line set Gset2 to apply a gate signal to the gate line G (j + 1) -Gk .

The signal controller 600 controls the operations of the first and second gate drivers 400a and 400b and the data driver 500. [

The operation of the display device will now be described with reference to FIG. 1, FIG. 2, FIG. 3, FIG. 4, FIG. 5, and FIG.

FIGS. 2, 4, 5, and 6 are diagrams illustrating a method of applying gate-on voltage according to a pulse width modulation (PWM) scheme of a time division scheme of two gate drivers of a display device according to an embodiment of the present invention. Showing how. FIG. 3 is a table showing a method of applying a data voltage according to a method of applying a gate-on voltage according to a time division pulse width modulation driving method of the two gate driving units shown in FIG.

Referring first to FIG. 1, a signal controller 600 receives input image signals R, G, and B and an input control signal from the outside. The input image signals R, G and B contain luminance information of each pixel PX and the luminance has a predetermined number, for example, 16 (= 2 4 ) gray levels. The signal controller 600 suitably processes the input image signals R, G and B based on the input image signals R, G and B and the input control signals and supplies the data control signals CONT to the data driver 500. [ And the processed image data DAT, and outputs a gate control signal to the first and second gate drivers 400a and 400b.

The gate control signal is supplied to the first gate driver 400a and the second gate driver 400b by the first scan start signal STV1 and the first gate clock signal CPV1 input to the first gate driver 400a, Signal STV2 and at least one second gate clock signal CPV2. The first and second scan start signals STV1 and STV2 indicate the start of scanning of the gate on voltage Von and the first and second gate clock signals CPV1 and CPV2 indicate the output timing of the gate on voltage Von. . Alternatively, the first and second gate drivers 400a and 400b may use the same gate clock signal (CPV). That is, the first and second gate clock signals CPV1 and CPV2 may be the same signal. The gate control signal may further include at least one output enable signal OE that defines the duration of the gate on voltage Von.

A first gate line of the gate driver (400a) and the second gate driving unit (400b) are each 2 n gradations (n is a natural number) to n times the first gate line set (Gset1) for one frame in order to express the image having ( On voltage Von is sequentially applied to the gate line G (j + 1) -Gk of the first gate line set G1-Gj and the second gate line set Gset2. The application of the gate-on voltage is performed according to the first and second scan start signals STV1 and STV2 from the signal controller 600 and the first and second gate clock signals CPV1 and CPV2. Referring to FIG. 2, n (for example, four) scan periods for one frame are respectively applied to the first and second gate clock signals (STV1 and STV2) while the first and second scan start signals STV1 and STV2 are high, CPV1, CPV2).

FIGS. 2, 4, 5, and 6 illustrate examples in which images having 2 4 (= 16) gradations are represented, respectively. According to the present embodiment, four scanning periods may be included in one frame, and scanning for the first gate line set Gset1 or scanning for the second gate line set Gset2 is performed in each scanning period. When the gate-on voltage is sequentially applied to the gate lines G1-Gj and G (j + 1) -Gk, the switching elements of the pixels PX connected to the gate lines G1-Gk are turned on, Dm is applied to the corresponding pixel PX through the turned-on switching element.

(N-1) scan period S (n-1) in the case of the first gate driver 400a, n scan periods (n = ), ... And the second gate driver 400b includes the first scan period L1, the second scan period L2, ..., and the first scan period S1. And an nth scan period Ln. Each scanning period S1, S2, ..., Sn (L1, L2, ..., Ln) is performed for one scanning time 1T.

Referring to FIGS. 2, 4, 5, and 6, it is assumed that the number of the n scan periods L1, L2, ..., Ln for one frame of the second gate driver 400b according to one embodiment of the present invention, The arrangement order is opposite to that of the first gate driver 400a. That is, the n scan periods Sn, S (n-1), ..., S1 for one frame of the first gate driver 400a are sequentially supplied to the nth scan period Sn, the (n-1) S (n-1)), ... The scan periods L1, L2, ..., and Ln of one frame of the second gate driver 400b are sequentially performed in the order of the first scan period S2, the second scan period S2, and the first scan period S1, The scan period L1, the second scan period L2, ... , The (n-1) th scan period L (n-1), and the n th scan period Ln. That is, the pulse output order for each of the scan periods Sn, S (n-1), ..., S1 of the first scan start signal STV1 input to the first gate driver 400a and the pulse output order for the second gate driver 400b The pulse outputting order of the second scan start signal STV2 input to each of the scan periods L1, L2, ..., Ln is opposite to that of the second scan start signal STV2.

In order to display an image having 2 n (for example, 16) gradations according to the time division pulse width modulation (PWM) method according to an embodiment of the present invention, each scan period Sn, S (n- ..., S1) The time from the end of one scanning time (1T) to the start of the next scanning period (L1, L2, ..., Ln) (L1, L2, ..., Ln). For example, the interval between the n scan periods (Sn, S (n-1), ..., S1) (L1, L2, ..., Ln) may gradually increase or decrease.

For example, in the case of the first gate driver 400a, the start point of each scan period Sn, S (n-1), ..., S2 and the start point of the next scan period S (n- (N-1) T, 2 (n-2) T, ..., Sn) of the respective subfields , 2 1 T, and 1 T, respectively. In the case of the second gate driver 400b, the temporal distance from the start point of each scan period L1, L2, ..., Ln to the start point of the next scan period L2, ..., Ln, 1 T, ... , 2 (n-2) T, and 2 (n-1) T. In other words, when the number of bits of the video signal is n (the number of gradations of the image is 2 n ), the start points of the respective scan periods Sn, S (n-1), ..., S2 The ratio of the temporal distance to the start point of the next scan period (S (n-1), ..., S1, Sn of the next frame (L2, ..., Ln, L1 of the next frame) the ratio of the digit value to the 1: 2 1 : ... : 2 (n-2) : 2 (n-1), or vice versa. The total length of a frame in accordance with may be a (2 n- 1) T. However, the temporal distance between each of the scan periods Sn, S (n-1), ..., S2 (L1, L2, ..., Ln) is not limited to this and may vary.

The next scan period S (n-1), ..., S1, Sn of the next frame after one scanning period Sn, S (n-1), ..., The data voltage applied to the pixel PX is maintained until the data lines L2, ..., Ln and L1 of the next frame are started, and the data voltage is maintained through voltage holding means such as an organic capacitor. .

Therefore, as shown exemplarily in Fig. 3, the first data (n = 1, 2, ..., n) An image having 2 n (for example, 16) gradations can be displayed by applying a voltage (for example, 30 V) and a second data voltage (for example, 0 V). For example, if the gradation 4 is expressed through four scan periods S1, S2, S3, and S4, a first data voltage (for example, 30V) is applied only in the third scan periods S3 and L3, A second data voltage (for example, 0 V) may be applied in the scan periods S1, S2, and S4 (L1, L2, and L4) to represent a desired gray level as a temporal sum or average of one frame. At this time, if the first data voltage is applied in each scan period (Sn, S (n-1), ..., S1) (L1, L2, ..., Ln), white or a first color is displayed, It is possible to display black or a second color. The first color and the second color may be different colors.

According to an embodiment of the present invention, the scan periods Sn, n (n-1), ..., S1 of the first gate driver 400a and the scan periods L1, L2, ..., And Ln are not overlapped with each other, the start point of the first scan period for one frame of the first and second gate drivers 400a and 400b is appropriately adjusted.

For example, in the embodiment shown in FIGS. 2 and 4, the start point of the first scan period L1, which is the first scan period of one frame of the second gate driver 400b, Which is later than the start point of the fourth scan period S4, which is the first scan period. 2, the start point of the first scan period L1, which is the first scan period of one frame of the second gate driver 400b, and the start point of the first scan period L1 of the first gate driver 400a, , The temporal distance between the start points of the fourth scan period S4 may be 2T. 4, the start point of the first scan period L1, which is the first scan period for one frame of the second gate driver 400b, and the start point of the fourth scan period L1, which is the first scan period of the first gate driver 400a, The temporal distance between the start points of the scan period S4 may be 4T.

5 and 6, the start point of the first scan period L1, which is the first scan period of one frame of the second gate driver 400b, is the first scan period of the first gate driver 400a, Is higher than the start point of the fourth scan period S4. 5, the start point of the first scan period L1, which is the first scan period of one frame of the second gate driver 400b, and the start point of the first scan period L1 of the first gate driver 400a, And the start point of the fourth scan period S4 may be 5T. 6, the start point of the first scan period L1, which is the first scan period for one frame of the second gate driver 400b, and the start point of the fourth scan period L1, which is the first scan period of the first gate driver 400a, The temporal distance between the start points of the scan period S4 may be 9T.

If the time from the start point of the first scan period Sn to the end of the last scan period S1 of the first gate driver 400a is one frame time 1F, The temporal difference between the start point of the first scan period L1 for the first frame and the start point of the first scan period Sn for the first frame of the first gate driver 400a is smaller than the one frame time 1F .

According to the embodiment of the present invention, when the display device is driven by the time division pulse width modulation (PWM) method using the two gate drivers 400a and 400b, the second gate driver 400a, The arrangement order of the n scan periods with respect to one frame of the first gate driver 400b is opposite to the arrangement order of the n scan periods with respect to one frame of the first gate driver 400a, It is possible to reduce the total time required for displaying an image of one frame by adjusting the start point of n scan periods for one frame so that the scan intervals do not overlap with each other. That is, the overall idle time of the two gate drivers 400a and 400b can be reduced.

Therefore, compared to the case where the n scan periods of the two gate drivers 400a and 400b are the same, the gate lines G1 to Gk of the entire display panel 300 are not entirely The driving time can be reduced to about half, and the driving frequency can be doubled. In addition, when the driving frequency is not increased, the application time of the gate-on voltage can be increased, so that the charging time for the data voltage of the pixel PX can be increased.

In the embodiments shown in FIGS. 2, 4, 5 and 6, the arrangement order of the n scan periods of the first gate driver 400a and the second gate driver 400b may be reversed, respectively.

A display device according to an embodiment of the present invention will now be described with reference to FIGS. 7 and 8. FIG.

FIG. 7 is a cross-sectional view of an electrowetting display according to an embodiment of the present invention, in which a voltage is not applied to a pixel electrode, and FIG. 8 is a cross-sectional view of an electrowetting display according to an embodiment of the present invention. Sectional view when a voltage is applied to the pixel electrode.

7, an electrowetting display device according to an exemplary embodiment of the present invention includes a reflective electrode (not shown) that can be made of a metal such as aluminum (Al) on a first substrate 110 that can be made of glass, 120 are formed. A first transparent electrode 130 made of a transparent conductive material such as ITO or IZO is disposed on the reflective electrode 120 and a hydrophobic insulating layer 140 is coated thereon. Although not shown, a barrier rib (not shown) may be further formed on the hydrophobic insulating layer 140 to separate the pixels PX. A first fluid 150 and a second fluid 160 are formed on the hydrophobic insulating layer 140 of each pixel PX. The first fluid 150 and the second fluid 160 may be made of a material that can not be mixed with each other and may have different electrical conductivity or polarity. For example, the first fluid 150 may have an electrical insulation and the second fluid 160 may have electrical conductivity. The second fluid 160 having electrical conductivity may be an electrolyte solution, and water may be used as the solvent. The first fluid 150 may be oil that is electrically insulative and does not mix with the second fluid 160. The first fluid 150 may have a first color (e.g., black) and the second fluid 160 may be transparent. The second fluid 160 is covered with a second substrate 180 facing the first substrate 110. A second transparent electrode 160 made of a transparent conductive material such as ITO or IZO is formed on the second substrate 180 170 are formed. Thus, the second fluid 160 is in contact with the second transparent electrode 170.

7 shows a first state in which no voltage is applied to the first transparent electrode 130 and the second transparent electrode 170 of the electrowetting display device according to an embodiment of the present invention. At this time, since the first fluid 150 having the first color covers most of the pixels PX, the light coming from the outside becomes the first colored light Ra1 when reflected from the reflective electrode 120. [

8 illustrates a second state in which a voltage is applied between the first transparent electrode 130 and the second transparent electrode 170 of the electrowetting display device according to an embodiment of the present invention. At this time, as the first fluid 150 having the first color is pushed to the edge of the pixel PX, the light reflected from the reflective electrode 120 passes through the portion where the first fluid 150 is absent, And becomes light (Ra2). The second color may be the same as the color of the light incident from the outside to the reflective electrode 120, or may be the same as the color of the color filter (not shown). When the electrowetting display device according to an embodiment of the present invention includes a color filter, the color filter may be disposed on the first substrate 110 or on the second substrate 180.

7 and 8, the reflective electrode 120 may be omitted. In this case, the display device according to the present embodiment becomes a transmissive display device, and an internal light source (not shown) is disposed under the first substrate 110 (Not shown) may be positioned to supply light to the upper portion of the first substrate 110. In this case, the second color may be the same as the color of the light emitted by the internal light source in the absence of the color filter. Or the second color may be the same as the color of the color filter if a color filter (not shown) exists and the color of light of the internal light source is white.

In this case, the color of the light passing through the first fluid 150 may be the same as the color of the first fluid 150, And the saturation may be high.

As described above, the electro-wet display device according to an embodiment of the present invention uses the first and second transparent electrodes 130 and 170 located in each pixel PX as a pixel electrode, The first state and the second state are defined as two different states, respectively. The first state may indicate black, and the second state may indicate white.

The electrowetting display device according to an embodiment of the present invention can be driven by the driving method according to the embodiment shown in Figs. 1 to 6 described above. In this case, the first state is the second data voltage (for example, 0V) is applied, and the second state may be when the first data voltage (for example, 30V) described above is applied.

The electro-wet display device according to an embodiment of the present invention may be configured such that a voltage applied to the first and second transparent electrodes 130 and 170 is maintained after the first fluid 150 is pushed to one side of the pixel PX. The first fluid 150 may have a property of being back flowed to its original position. In order to prevent this, the first and second gate drivers 400a and 400b are provided in addition to the n scan periods Sn, S (n-1), ..., S1 (L1, L2, May be required. This will be described with reference to Fig. 9 and Figs. 1 to 6 described above.

9 is a diagram illustrating a method of applying a gate-on voltage according to a time division pulse width modulation driving method of two gate drivers of an electrowetting display device according to an embodiment of the present invention.

The driving method according to the embodiment shown in Fig. 9 is almost the same as the driving method according to the embodiment shown in Figs. 2, 4, 5 and 6 described above. 9, the scan period for one frame of the first gate driver 400a and the second gate driver 400b is the n-th scan period (Sn, Ln), the (n-1) The sections S (n-1), L (n-1), ... In addition to the first scan periods S1 and L1, the reset scan periods Sr and Lr (n = 4 in FIG. 9 as an example) may be further included at the end of each frame. The reset scan periods Sr and Lr may be maintained for one scan time 1T as in the first scan periods S1 and L1 and may be performed immediately after the end of the first scan period S1 or L1 or just before the start thereof .

The data voltage applied through the data lines D1 to Dm during the reset scan periods Sr and Lr may be equal to or different from the first data voltage (for example, 30 V) as the reset data voltage. When the reset data voltage is applied to all the pixels PX through the data lines D1 to Dm during the reset scan periods Sr and Lr, the first fluid 150 pushed to one side is expected to be back flowed Can be prevented.

In addition, the driving method according to the embodiment shown in FIG. 9 may have various features of the driving method according to the embodiment shown in FIGS. 2 to 6 described above.

According to another embodiment of the present invention, in the time division pulse width modulation driving method according to the above-described various embodiments, the data voltage applied to the pixel PX during each scan period is divided into a first data voltage (for example, 30 V) But it is not limited to two values of voltage (for example, 0 V) and may have one of three or more values. For example, the data voltage can have seven values such as -15V, -10V, -5V, 0V, 5V, 10V, and 15V. Such a driving method of expressing different gradations by varying the magnitude of the data voltage is referred to as a pulse amplitude modulation method. Therefore, in the method of driving the display device according to the embodiments of the present invention described above, if the gradation is expressed by varying the data voltage magnitude by three or more, the pulse width modulation method and the pulse amplitude modulation method can be used together, It is possible to further increase the number of gradations. In other words, the gradation of the image represented by the pixel PX is proportional to the product of the applied data voltage and the applied data voltage, i.e., the time of data application and holding time or subframe time, so that the gradation range is further increased . However, in the embodiment shown in Figs. 1 to 9 described above, the data application and hold time of each scan period Sn, S (n-1), ..., S1 (L1, L2, ..., Ln) In this order 1: 2: 2 2 , ... Or vice versa, there may be a limit to the number of gradations proportional to the product of the sub-frame time and the applied data voltage.

For example, if the data voltages applied to the pixels PX are four, such as 0V, 5V, 10V, and 15V, and the data application and hold times are represented by 2n (n = 0, 1, 2, The gradation expressed when the applied data voltage is 20V and the data application and holding time of the scanning section is 2 0 (= 1), the gradation expressed when the applied data voltage is 10V and the data application and holding time of the scanning section is 2 1 Can be the same.

A driving method of a display apparatus according to another embodiment of the present invention will be described with reference to FIGS. 10, 11, and 7 to 9 described above. FIG. The same reference numerals are given to the same constituent elements as those of the above-described embodiment, and the same explanations are omitted.

10 is a view showing another example of a method of applying a gate-on voltage according to a time division pulse width modulation driving method of two gate drivers of a display device according to an embodiment of the present invention. FIG. 5 is a diagram illustrating a method of applying a gate-on voltage according to a time division pulse width modulation driving method of a gate driving unit of a display device according to an embodiment of the present invention.

The driving method shown in FIG. 10 is almost the same as the driving method shown in FIG. 9, but three scanning periods S1, S2, and S3 (FIG. 10) are performed during one frame of the first gate driver 400a and the second gate driver 400b L1, L2, and L3 and one reset scan period Sr and Lr are included. Also in this embodiment, each reset scan period Sr and Lr may be maintained for one scan time 1T as in the first scan period S1 and L1, and may be maintained immediately after the end of the first scan period S1 or L1, It can be done just before. In this embodiment, the reset scan intervals Sr and Lr may be omitted, and scan intervals may be added in addition to the three scan intervals S1, S2, and S3 (L1, L2, and L3).

In the embodiment shown in FIG. 10, the arrangement order of the scan periods S1, S2, and S3 with respect to the first gate driver 400a and the arrangement order of the scan periods L3, L2, and L1 with respect to the second gate driver 400b The arrangement order may be opposite to that shown in Fig. That is, in the embodiment shown in FIG. 10, the temporal distance between the scan periods S1, S2, and S3 for the first gate driver 400a gradually increases and the scan intervals L3, L2 , L1 may gradually decrease.

10, the start point of the third scan period L3, which is the first scan period of one frame of the second gate driver 400b, is the first scan period of the first gate driver 400a, 1 scan period (S1). Specifically, the start point of the third scan period L3 of the second gate driver 400b may be 2T ahead of the start point of the first scan period S1 of the first gate driver 400a.

Referring to FIG. 11, the scan period S1, the scan period S1, and the scan period S2 during one frame of the gate driver of the display device according to an exemplary embodiment of the present invention, for example, the first gate driver 400a or the second gate driver 400b, S2, and S3 and the reset scan interval S4 is different from the embodiment shown in FIG.

The duration of the first scan period S1 of the gate driver is referred to as the first sub frame period SF1 and the time interval between the start point of the third scan period S3 and the start point of the second scan period S2 The second sub frame period SF2 and the time interval between the start point of the reset scan period Sr and the start point of the third scan period S3 is referred to as a third sub frame period SF3, Let the duration of the reset period be reset.

In the embodiment shown in FIG. 11, the ratios of the first, second, and third sub-frame times SF1, SF2, and SF3 may be a number that is not a multiple of each other. For example, the ratio of the first, second and third sub-frame times SF1, SF2 and SF3 may be 1: 3: 7. That is, when the duration of each of the scan periods S1, S2, and S3 and the reset scan period S4 is 1T, the first sub frame period SF1 is 1T, the second sub frame period SF2 is 3T, 3 The subframe time SF3 may be 7T, and the reset time may be 1T. If more scan intervals are added, each subframe time is 1: 3: 7: ... And a ratio of the number of non-multiples to the number of non-multiples.

As described above, when the ratio of the subframe time with respect to each of the scan periods S1, S2, and S3 is 1: 3: 7 ... The number of gradation ranges that can be expressed by driving by the pulse amplitude modulation method can be further increased. For example, in the case where the data voltages are 5V, 10V, and 15V, except for the case where the subframe time is 1k (k is a natural number) and the data voltage is 15V, the case where the subframe time is 3k and the data voltage is 5V The gradation proportional to the product of the sub-frame time and the data voltage may have different values. On the other hand, if the ratio of the subframe time is 1: 2: 4 ... The number of gradations that can be expressed is smaller than that in the embodiment shown in FIG. 11, because the overlapping gradations are generated.

Of course, if the data voltage is adjusted so that there is no common divisor between the magnitudes of the applied data voltages, the number of gradations that can be represented in the embodiment shown in FIG. 11 can be further increased.

In addition, various features of the embodiment shown in FIG. 9 can be similarly applied to the embodiments shown in FIG. 10 and FIG.

Next, a display device according to another embodiment of the present invention will be described with reference to FIG. The same constituent elements as those of the embodiment shown in Fig. 1 described above are denoted by the same reference numerals and the description thereof is omitted.

12 is a block diagram of a display device according to an embodiment of the present invention.

Referring to FIG. 12, a display device according to an embodiment of the present invention includes a display panel 300, a plurality of gate drivers connected thereto, and at least one data driver 500.

12, the plurality of gate drivers include the first gate driver 400a, the second gate driver 400b, and the third gate driver 400c, but the number of gate drivers is not limited thereto.

The display panel 300 may be divided into a plurality of display panel portions according to the number of the gate driving portions. For example, as shown in FIG. 12, the display panel 300 may be divided into a first display panel portion 300a, a second display panel portion 300b, and a third display panel portion 300c. Each of the display panel portions 300a, 300b, and 300c includes a plurality of display signal lines and a plurality of pixels connected to the display panel 300a and arranged in a matrix. The display signal line may include a plurality of gate lines G1-Gk for transferring gate signals and a plurality of data lines (not shown) for transferring data voltages.

In the embodiment shown in Fig. 12, the entire gate lines G1 to Gk are connected to the first gate line sets G1 to Gi located in the first display panel portion 300a, ..., Gk) located in the third display panel portion 300c and a second gate line set G (i + 1), ..., Gk located in the third display panel portion 300c have. The first gate line set G1 is connected to the first gate driver 400a and the second gate line set G (i + 1) is connected to the second gate driver 400b, And the third gate line set G (j + 1), ..., Gk is connected to the third gate driver 400c. The pixel and data driver connected to the gate lines G1 to Gk and the data lines and the first, second and third gate drivers 400a, 400b and 400c will be described in detail with reference to FIG. So it is omitted here.

The first, second, and third gate drivers 400a, 400b, and 400c may be coupled to a signal transmission line on a printed circuit board (PCB) 440 to receive a gate control signal, The driving unit 500 may be connected to a signal transmission line provided on the printed circuit board 550 to receive a data control signal. The gate control signal and the data control signal may be transmitted from the signal controller 600 shown in FIG.

The gate control signal includes a first scan start signal STV1 and at least one first gate clock signal CPV1 input to the first gate driver 400a, a second scan start signal STV1 input to the second gate driver 400b, At least one first gate clock signal STV2 and at least one second gate clock signal CPV2 and a third scan start signal STV3 input to the third gate driver 400c and at least one third gate clock signal CPV3, . Second, and third scan start signals STV1, STV2, and STV3 that are transmitted to the first, second, and third gate drivers 400a, 400b, and 400c, respectively, as in the embodiment shown in FIG. The pulses may not overlap each other. Accordingly, the first, second and third gate drivers 400a, 400b and 400c are turned on and off according to the first, second and third scan start signals STV1, STV2 and STV3, The gate-on voltage Von can be transmitted to the gate electrodes Gk.

The operation of the display device of the display device shown in Fig. 12 will now be described with reference to Fig. 13 together with Fig. 12 described above. The same reference numerals are given to the same constituent elements as those of the above-described embodiment, and the same explanations are omitted.

13 is a diagram illustrating a method of applying a gate-on voltage according to a pulse width modulation driving method of a three-gate driving unit of a display device according to an embodiment of the present invention.

13, the first gate driver 400a, the second gate driver 400b, and the third gate driver 400c are connected to the gate line (n-1) connected to each other n times (for example, three times) On voltages Von are sequentially applied to the gate electrodes G1-Gk. The first, second and third gate drivers 400a, 400b and 400c sequentially turn on the gate lines G1 to Gk connected to the (n + 1) th gate when the one frame includes the reset scan period Sr. [ A turn-on voltage Von can be applied. That is, the first, second, and third gate drivers 400a, 400b, and 400c may apply the gate-on voltage Von to the respective gate lines during the respective scan periods S1, S2, and S3.

The first sub frame time SF1, the start point of the second scan interval S2 and the third scan interval S3, which are time intervals between the start point of the first scan interval S1 and the start point of the second scan interval S2, The start time of the third scan period S3 and the reset scan period Sr or the reset scan period Sr do not exist in the first frame period SF1, (SF3), which is a time interval between the start points of the first sub frame periods (S1), may gradually increase, and may be a number that is not a multiple relation relation, for example, 1: 3: 7.

Referring to FIG. 13, the scan periods S1, S2, and S3 and the reset scan period Sr of the first, second, and third gate drivers 400a, 400b, and 400c according to the embodiment of the present invention are time- Do not overlap each other. For this, the arrangement order of the scan periods S1, S2, and S3 of the first, second, and third gate drivers 400a, 400b, and 400c may be different from each other.

For example, as shown in FIG. 13, in the case of the first gate driver 400a, the first scan period S1, the second scan period S2, the third scan period S3, It is possible to include the section Sr in order in time. In the case of the second gate driver 400b, the third scan period S3, the second scan period S2, the first scan period S1, and the reset scan period Sr may be sequentially included in one frame for one frame. have. The third gate driver 400c may sequentially include the second scan period S2, the first scan period S1, the third scan period S3, and the reset scan period Sr for one frame in a time- have. Each of the scan periods S1, S2, and S3 and the reset scan period Sr lasts for one scan time 1T.

When the gate-on voltage Von is applied to the gate lines G1-Gk in each of the scan periods S1, S2, and S3 and the reset scan period Sr, data is applied to the switching elements of the pixels connected to the gate lines G1- Voltage is applied and the corresponding data voltage is applied to each pixel. At this time, as described above, the display device can be driven by a pulse amplitude modulation method with three or more data voltage levels for expressing more gradations.

In the driving method of the time division pulse width modulation method as in the embodiment of the present invention, since three or more gate driving units can be used by appropriately adjusting the temporal interval between several sequential scanning intervals of each of the plurality of gate driving units, Can be further increased. That is, as shown in FIG. 11, when the interval between the start points of the scan periods S1, S2, and S3 is appropriately adjusted to 1: 3: 7 or the like during one frame, three gate drivers 400a 400b and 400c can be used, and the resolution can be increased by 50% as compared with the embodiment using the two gate drivers 400a and 400b.

In the various embodiments of the present invention, an electrowetting display device is exemplified as an example of a display device, but the present invention is not limited thereto, and various display devices that can be driven by the driving method of the time division pulse width modulation method according to the embodiment of the present invention, A display device using a cholesteric liquid crystal display device or a MEMS (MEMS) device.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, Of the right.

110: insulating substrate 120: reflective electrode
130: first transparent electrode 140: hydrophobic insulating layer
150: first fluid 160: second fluid
170: second transparent electrode 180: second substrate
300: Display panel
400a, 400b, and 400c:
500: Data driver 600: Signal controller

Claims (39)

A display panel in which a plurality of pixels, a plurality of gate lines and a plurality of data lines are located,
A first gate driver for applying a gate-on voltage to a gate line of a first gate line of a plurality of gate lines in each of n (n is a natural number) first scan intervals for the first frame,
A second gate driver for applying the gate-on voltage to a gate line of a second one of the plurality of gate lines during a period of each of the n second scan periods for the first frame,
A data driver for applying a data voltage to the plurality of data lines,
A signal controller for transmitting a control signal to the first and second gate drivers and the data driver,
Lt; / RTI &gt;
The interval between the n first scanning section starting points gradually decreases with time, and the interval between the n second scanning section starting points gradually increases with time
Display device. The method of claim 1,
Wherein the n first scan periods and the n second scan periods do not overlap with each other. 3. The method of claim 2,
Wherein a temporal difference between a start point of a first scan period of the n first scan intervals and a start point of a first scan period of the n second scan intervals for the first frame for the first frame is less than one frame time Display device. 4. The method of claim 3,
Each of the n first scan periods and the n second scan periods each last for one scan time (1T)
Wherein an interval between the n first scanning intervals and an interval on the n second scanning intervals is a multiple of the one scanning time (1T)
Display device. 5. The method of claim 4,
Wherein the interval between the start points of the neighboring first scan intervals of the n first scan intervals is decreased by 1 / k (k is a natural number) times according to time, and the interval between the start points of the neighboring second scan intervals The spacing between starting points increases by k times with time
Display device. 3. The method of claim 2,
Wherein a start point of a first scan period of the n first scan intervals precedes a start point of a first scan period of the n second scan intervals. 3. The method of claim 2,
Wherein the start point of the first scan period of the n first scan intervals is later than the start point of the first scan period of the n second scan intervals. 3. The method of claim 2,
The signal control unit
A first scan start signal and a first gate clock signal to the first gate driver,
And a second gate driver for outputting a second scan start signal and a second gate clock signal to the second gate driver
Display device. 9. The method of claim 8,
Wherein the output order of the pulses corresponding to the n first scan periods of the first scan start signal is opposite to the output order of the pulses corresponding to the n second scan periods of the second scan start signal. 9. The method of claim 8,
Wherein the first gate clock signal and the second gate clock signal are the same clock signal. 3. The method of claim 2,
Wherein the data voltage applied to the pixel during each of the n first scan period and the n second scan period is maintained until the end of each scan period and the start of the next scan period. The method of claim 1,
The signal control unit
A first scan start signal and a first gate clock signal to the first gate driver,
And a second gate driver for outputting a second scan start signal and a second gate clock signal to the second gate driver
Display device. The method of claim 1,
A third gate driver for applying the gate-on voltage to the gate line of the third gate line of the plurality of gate lines in each of the n (n is a natural number) third scan period for the first frame A display comprising. The method of claim 13,
Wherein the n first scan period, the n second scan period, and the n third scan period do not overlap each other. The method of claim 14,
Each of the n first scan periods, the n second scan periods, and the n third scan periods each last for one scan time (1T)
Wherein an interval between the n first scan intervals, an interval on the n second scan intervals, and an interval on the n third scan intervals are a multiple of the 1 scan time (1T)
Display device. 16. The method of claim 15,
And the number of the ratios of the intervals between the start points of the neighboring first scan periods among the n first scan regions is not a multiple of the number. 17. The method of claim 16,
A reset scan interval is further included at the end of the first frame,
Wherein when n is 3, a time interval between a start point of a first first scan interval and a start point of a second first scan interval of the n first scan intervals, a start point of the second first scan interval, Wherein the ratio of the time interval between the start point of the first scan period and the start point of the third scan period to the start point of the reset scan period is 1: 3: 7. 17. The method of claim 16,
The signal control unit
A first scan start signal and a first gate clock signal to the first gate driver,
And a second gate driver for outputting a second scan start signal and a second gate clock signal to the second gate driver
A third scan start signal and a third gate clock signal to the third gate driver,
Display device. The method of claim 1,
Wherein the display device is an electrowetting display. The method of claim 1,
And a reset scan period at the end of the first frame. The method of claim 1,
Wherein the data voltage has two or more values. A method of driving a display device including a display panel in which a plurality of pixels, a plurality of gate lines and a plurality of data lines are disposed, a first gate driver and a second gate driver, a data driver, and a signal controller,
Applying a gate-on voltage to a first one of the plurality of gate lines in each of n (n is a natural number) first scan intervals for the first frame by the first gate driver, and
Applying the gate-on voltage to the gate line of the second gate line of the plurality of gate lines in each of the n second scan periods for the first frame by the second gate driver
Lt; / RTI &gt;
The interval between the n first scanning section starting points gradually decreases with time, and the interval between the n second scanning section starting points gradually increases with time
A method of driving a display device. The method of claim 22,
Wherein the n first scan periods and the n second scan periods do not overlap with each other. 24. The method of claim 23,
Wherein a temporal difference between a start point of a first scan period of the n first scan intervals and a start point of a first scan period of the n second scan intervals for the first frame for the first frame is less than one frame time A method of driving a display device. 25. The method of claim 24,
Each of the n first scan periods and the n second scan periods each last for one scan time (1T)
Wherein an interval between the n first scanning intervals and an interval on the n second scanning intervals is a multiple of the one scanning time (1T)
A method of driving a display device. 26. The method of claim 25,
Wherein the interval between the start points of the neighboring first scan intervals of the n first scan intervals is decreased by 1 / k (k is a natural number) times according to time, and the interval between the start points of the neighboring second scan intervals The spacing between starting points increases by k times with time
A method of driving a display device. 24. The method of claim 23,
Wherein a start point of a first scan period of the n first scan intervals precedes a start point of a first scan period of the n second scan intervals. 24. The method of claim 23,
Wherein a start point of a first scan period of the n first scan intervals is later than a start point of a first scan period of the n second scan intervals. 24. The method of claim 23,
Outputting a first scan start signal and a first gate clock signal to the first gate driver by the signal controller, and
And outputting a second scan start signal and a second gate clock signal to the second gate driver by the signal controller
And a driving circuit for driving the display device. The method of claim 22,
Applying a data voltage to the data line during each of the n first scan intervals and the n second scan intervals by the data driver;
Maintaining the data voltage applied to the plurality of pixels connected to the data line until the end of each of the scan periods and before the start of the next scan period
And a driving circuit for driving the display device. The method of claim 22,
The display device further includes a third gate driver,
And applying the gate-on voltage to a gate line of a third one of the plurality of gate lines in a section of n third scan intervals for the first frame by the third gate driver A method of driving a display device. 32. The method of claim 31,
Wherein the n first scan period, the n second scan period, and the n third scan period do not overlap each other. 32. The method of claim 32,
Each of the n first scan periods, the n second scan periods, and the n third scan periods each last for one scan time (1T)
Wherein an interval between the n first scan intervals, an interval on the n second scan intervals, and an interval on the n third scan intervals are a multiple of the 1 scan time (1T)
A method of driving a display device. 34. The method of claim 33,
Wherein the number of the ratios of the intervals between the start points of the neighboring first scan periods of the n first scan intervals is not a multiple of the number. 35. The method of claim 34,
A reset scan interval is further included at the end of the first frame,
Wherein when n is 3, a time interval between a start point of a first first scan interval and a start point of a second first scan interval of the n first scan intervals, a start point of the second first scan interval, Wherein a ratio of a time interval between the start point of one scanning period and a time interval between a start point of the third first scanning interval and a start point of the reset scanning interval is 1: 3: 7. 32. The method of claim 32,
Outputting a first scan start signal and a first gate clock signal to the first gate driver by the signal controller,
Outputting a second scan start signal and a second gate clock signal to the second gate driver by the signal controller, and
And outputting a third scan start signal and a third gate clock signal to the third gate driver by the signal controller
And a driving circuit for driving the display device. 32. The method of claim 31,
Wherein the data driver further comprises applying a data voltage having two or more levels to the data line. 32. The method of claim 31,
Applying the gate on voltage to the first gate line set, the second gate line set, and the third gate line set at the end of the first frame and applying a reset data voltage to the data line And a driving method of the display device. The method of claim 22,
Wherein the data driver further comprises applying a data voltage having two or more levels to the data line.
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